JPH0369189B2 - - Google Patents
Info
- Publication number
- JPH0369189B2 JPH0369189B2 JP59156801A JP15680184A JPH0369189B2 JP H0369189 B2 JPH0369189 B2 JP H0369189B2 JP 59156801 A JP59156801 A JP 59156801A JP 15680184 A JP15680184 A JP 15680184A JP H0369189 B2 JPH0369189 B2 JP H0369189B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- thick film
- circuit device
- film hybrid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000758 substrate Substances 0.000 claims description 18
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 15
- 239000000654 additive Substances 0.000 claims description 7
- 230000000996 additive effect Effects 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 239000005997 Calcium carbide Substances 0.000 claims description 4
- CLZWAWBPWVRRGI-UHFFFAOYSA-N tert-butyl 2-[2-[2-[2-[bis[2-[(2-methylpropan-2-yl)oxy]-2-oxoethyl]amino]-5-bromophenoxy]ethoxy]-4-methyl-n-[2-[(2-methylpropan-2-yl)oxy]-2-oxoethyl]anilino]acetate Chemical compound CC1=CC=C(N(CC(=O)OC(C)(C)C)CC(=O)OC(C)(C)C)C(OCCOC=2C(=CC=C(Br)C=2)N(CC(=O)OC(C)(C)C)CC(=O)OC(C)(C)C)=C1 CLZWAWBPWVRRGI-UHFFFAOYSA-N 0.000 claims description 4
- 229910052788 barium Inorganic materials 0.000 claims description 3
- DSAJWYNOEDNPEQ-UHFFFAOYSA-N barium atom Chemical compound [Ba] DSAJWYNOEDNPEQ-UHFFFAOYSA-N 0.000 claims description 3
- 150000001875 compounds Chemical class 0.000 claims description 3
- 229910052712 strontium Inorganic materials 0.000 claims description 3
- CIOAGBVUUVVLOB-UHFFFAOYSA-N strontium atom Chemical compound [Sr] CIOAGBVUUVVLOB-UHFFFAOYSA-N 0.000 claims description 3
- 239000012298 atmosphere Substances 0.000 claims description 2
- 238000010304 firing Methods 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 13
- 239000004065 semiconductor Substances 0.000 description 7
- 230000017525 heat dissipation Effects 0.000 description 6
- 230000010354 integration Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- -1 acetylide compound Chemical class 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 239000011195 cermet Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 150000000476 acetylides Chemical class 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
- H01L27/013—Thick-film circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Description
（産業上の利用分野）
本発明は厚膜混成集積回路装置に関し、特に熱
放散特性に優れているので、集積回路装置の小形
化および高密度化に適するものである。
（従来の技術）
半導体装置の熱放散特性の良否は装置自身の大
きさおよび集積度に重大な影響を与える。特にパ
ワー・モジユール等を搭載する厚膜混成集積回路
装置では熱放散性が装置自身の小形化および高集
積度化に著しい限界を与える。
従来、混成集積回路を構成する各回路素子はア
ルミナ基板上に固着されその熱伝導により熱放散
が行なわれて来た。アルミナ基板は電気的絶縁性
に優れ、機械的強度が大きく、更に熱膨張係数が
シリコンに近いなどの諸条件をある程度満たす良
好な材料ではあるが、熱伝導率が比較的良くない
のが欠点である。例えば、現在の半導体装置全般
に広く使用されている92％アルミナの熱伝導率ｋ
は約17（ｗ／mk）であり、99％アルミナでも高々
25（ｗ／mk）程度にすぎないものである。
（発明が解決しようとする問題点）
しかしながら、半導体技術分野の一般的な流れ
は小形化および高集積化を明らかに指向してお
り、厚膜混成集積回路装置もその例外ではない。
この厚膜混成集積回路装置の場合では、その小形
化・高集積化の問題は終始基板による熱伝導放散
特性の良否に深くかかわるので、比較的熱伝導率
の低いアルミナ基板を用いる限りこの技術要請に
対応することは難しい。従つて、アルミナを超え
る基板放熱特性を備えた厚膜混成集積回路装置の
出現が強く望まれている。
本発明の目的は、上記の情況に鑑み、優れた熱
放散特性を備えた厚膜混成集積回路装置を提供す
ることである。
（問題点を解決するための手段）
本発明の厚膜混成集積回路装置は、窒化アルミ
ニウムを主成分とし、炭化カルシウム，炭化スト
ロンチウム及び炭化バリウムのアセチドリ化合物
の少なくとも１種以上を添加剤として非酸化性雰
囲気内で焼成されて形成される電気絶縁性基板
と、この電気絶縁性基板に載置される回路素子と
を含んで構成される。
（作用）
すなわち、本発明の厚膜混成集積回路装置では
従来のアルミナに代えて窒化アルミニウムを主成
分とする電気絶縁性基板が使用される。特に炭化
カルシウム（CaC2），炭化ストロンチウム
（SrC2），炭化バリウム（BaC2）のアセチリド化
合物の少なくとも１種以上を、その含有量の合計
が0.02〜10重量％となるよう添加し焼結したもの
が実用性に富む。
第１表は、平均粒経が2μmの窒化アルミニウム
粉末に種々のアセチリド化合物を合計で２重量％
添加して混合し、室温で2000Kg／cm2の圧力を加え
て成形したうえ、1800℃の窒素雰囲気で２
(Industrial Field of Application) The present invention relates to a thick film hybrid integrated circuit device, and has particularly excellent heat dissipation characteristics, and is therefore suitable for downsizing and increasing the density of integrated circuit devices. (Prior Art) The quality of the heat dissipation characteristics of a semiconductor device has a significant influence on the size and degree of integration of the device itself. In particular, in thick-film hybrid integrated circuit devices equipped with power modules and the like, heat dissipation performance puts a significant limit on miniaturization and high integration of the device itself. Conventionally, each circuit element constituting a hybrid integrated circuit has been fixed on an alumina substrate, and heat has been dissipated by heat conduction. Although alumina substrates are good materials that meet various conditions to some extent, such as excellent electrical insulation, high mechanical strength, and a coefficient of thermal expansion close to that of silicon, their drawback is that their thermal conductivity is relatively poor. be. For example, the thermal conductivity of 92% alumina, which is widely used in current semiconductor devices, is
is approximately 17 (w/mk), and even 99% alumina is at most
It is only about 25 (w/mk). (Problems to be Solved by the Invention) However, the general trend in the semiconductor technology field is clearly toward miniaturization and higher integration, and thick film hybrid integrated circuit devices are no exception.
In the case of this thick film hybrid integrated circuit device, the issue of miniaturization and high integration is deeply related to the quality of heat conduction and dissipation characteristics of the substrate, so as long as an alumina substrate with relatively low thermal conductivity is used, this technology is required. It is difficult to respond to Therefore, there is a strong desire for a thick film hybrid integrated circuit device with substrate heat dissipation characteristics superior to that of alumina. SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a thick film hybrid integrated circuit device with excellent heat dissipation characteristics. (Means for Solving the Problems) The thick film hybrid integrated circuit device of the present invention contains aluminum nitride as a main component, and contains at least one acetide compound of calcium carbide, strontium carbide, and barium carbide as an additive in a non-oxidized form. The device includes an electrically insulating substrate formed by firing in a neutral atmosphere, and a circuit element placed on the electrically insulating substrate. (Function) That is, in the thick film hybrid integrated circuit device of the present invention, an electrically insulating substrate whose main component is aluminum nitride is used instead of the conventional alumina. In particular, at least one acetylide compound of calcium carbide (CaC 2 ), strontium carbide (SrC 2 ), and barium carbide (BaC 2 ) is added and sintered so that the total content is 0.02 to 10% by weight. Things are highly practical. Table 1 shows a total of 2% by weight of various acetylide compounds in aluminum nitride powder with an average particle size of 2μm.
The mixture was molded at room temperature under a pressure of 2000 kg/ cm2 , and then molded at 1800°C in a nitrogen atmosphere.
【表】【table】
【表】
時間焼結した場合の実験値であるが、この窒化ア
ルミニウム焼結体は室温における熱伝導率ｋが
80w／mk以上あることを示している。
また、第２表は、同じく平均粒径が2μmの窒化
アルミニウム粉末にアセチリド化合物の添加量を
変えて混合成形し、窒素雰囲気内で焼結した場合
の実験値である。この窒化アルミニウム焼結体は
少なくとも60w／mk以上の高熱導性を示す。
すなわち、このようにして作られた窒化アルミ
ニウム焼結体は、熱伝導率60〜160w／mk，比抵
抗1013Ωcm以上、機械的曲げ強度50Kg／mm2、熱膨
張率4.3×10-6／℃の特性を平均的に持ち、これ
をアルミナと比較すると、熱伝導率ｋで４〜８
倍、機械的強度で約1.5倍、熱膨張率で約３／４
となる。
従つて、この窒化アルミニウムを主成分とする
焼結体を絶縁基板として回路素子を載置した場合
には、その優れた熱伝導率ｋにより回路素子から
の発生熱量をアルミナの４〜８倍に達する効率で
吸収し放熱する。また銀ペーストなどの導電材料[Table] Experimental values obtained when sintered for hours, the thermal conductivity k of this aluminum nitride sintered body at room temperature is
This indicates that the power is 80w/mk or more. Furthermore, Table 2 shows experimental values obtained when aluminum nitride powder having an average particle size of 2 μm was mixed and molded with varying amounts of acetylide compound added, and sintered in a nitrogen atmosphere. This aluminum nitride sintered body exhibits high thermal conductivity of at least 60 w/mk or more. That is, the aluminum nitride sintered body made in this way has a thermal conductivity of 60 to 160 w/mk, a specific resistance of 10 13 Ωcm or more, a mechanical bending strength of 50 Kg/mm 2 , and a coefficient of thermal expansion of 4.3×10 -6 / ℃, and when compared with alumina, the thermal conductivity k is 4 to 8.
Approximately 1.5 times the mechanical strength, approximately 3/4 the thermal expansion coefficient
becomes. Therefore, when a circuit element is mounted on a sintered body whose main component is aluminum nitride as an insulating substrate, the amount of heat generated from the circuit element is 4 to 8 times that of alumina due to its excellent thermal conductivity. Absorbs and dissipates heat with maximum efficiency. Also conductive materials such as silver paste
【表】【table】
【表】
とのなじみも良好で、半導体素子，サーメツトか
らなる抵抗体およびコンデンサ・チツプなどの回
路素子を通常の技術で載置せしめ厚膜混成集積回
路を容易に構成せしめる。
以下図面を参照して本発明を詳細に説明する。
（実施例）
第１図は本発明厚膜混成集積回路装置の一実施
例を示す断面図である。本実施例では窒化アルミ
ニウム絶縁性基板１と、この主面に形成された銀
ペーストなどからなる導電配線２と、これら導電
配線２上にそれぞれ固着された半導体素子３，サ
ーメツト抵抗体４およびコンデンサ・チツプ５と
を含む。ここで６は金属接続体、７はガラス系ペ
ーストからなる抵抗体４の保護膜、８は放熱金属
板をそれぞれ示すものである。
窒化アルミニウムの熱膨張係数は4.3×10-6／
℃でアルミナよりも小さく、また金属との漏れそ
の他の諸条件は良く似ているので、これら回路素
子の載置作業はアルミナに準じて同一扱い得る。
従つて本実施例では窒化アルミニウム基板１は熱
伝導率ｋが最高となるようにアセチリド化合物の
添加量が選ばれている。
第２図は添加剤の添加量（重量％）と熱伝導率
ｋ（ｗ／mk）との関係を表わす曲線図で、第１表
および第２表を整理しグラフ化したものである。
これから明らかなように、炭化カルシウム
（CaC2）を添加した場合が最も高い熱伝導率を示
し、その他の場合もほぼこれと類似し２〜３％の
添加量のところにピークのあることが理解され
る。この図では個々の添加剤の効果をそれぞれ表
わすように作成されているが、それぞれの効果曲
線が類似していることからこれら３つを混合し添
加した場合でも、その合計添加量が加重平均値の
２〜３％のところに同じようなピーク点を持つ。
従つて窒化アルミニウム基板１は上記３つの添加
剤を混合し、総添加量を２〜３重量％としたもの
である。この場合の熱吸収効率はアルミナ基板の
約８倍である。
（発明の効果〕
本発明によれば、アルミナの約４〜８倍に達す
る熱吸収効率を持つ窒化アルミニウム基板を使用
しているので、バイポーラ半導体素子，ガリウム
砒素（CaAs）素子等の電力消費量の大きい回路
素子を載置した厚膜混成集積回路装置を実用に供
し得るように構成できることは、勿論、回路装置
の小形化および高集積化に顕著な効果を奏する。It is also compatible with [Table] and allows thick film hybrid integrated circuits to be easily constructed by mounting circuit elements such as semiconductor elements, cermet resistors, and capacitor chips using conventional techniques. The present invention will be described in detail below with reference to the drawings. (Embodiment) FIG. 1 is a sectional view showing an embodiment of the thick film hybrid integrated circuit device of the present invention. In this embodiment, an aluminum nitride insulating substrate 1, conductive wiring 2 made of silver paste or the like formed on the main surface thereof, a semiconductor element 3, a cermet resistor 4, and a capacitor fixed on the conductive wiring 2, respectively. Chip 5 is included. Here, 6 is a metal connection body, 7 is a protective film of the resistor 4 made of glass paste, and 8 is a heat dissipating metal plate. The thermal expansion coefficient of aluminum nitride is 4.3×10 -6 /
Celsius and is smaller than alumina, and leakage and other conditions are very similar to metals, so the mounting work for these circuit elements can be handled in the same manner as alumina.
Therefore, in this embodiment, the amount of the acetylide compound added to the aluminum nitride substrate 1 is selected so that the thermal conductivity k is the highest. FIG. 2 is a curve diagram showing the relationship between the additive amount (wt%) and thermal conductivity k (w/mk), and is a graph of Tables 1 and 2. As is clear from this, the case where calcium carbide (CaC 2 ) is added shows the highest thermal conductivity, and the other cases are almost similar, with a peak at the addition amount of 2 to 3%. be done. This diagram has been created to show the effects of each individual additive, but since the effect curves of each additive are similar, even if a mixture of these three is added, the total amount added will be the weighted average value. There is a similar peak point at 2 to 3% of the range.
Therefore, the aluminum nitride substrate 1 is a mixture of the above three additives, and the total amount added is 2 to 3% by weight. The heat absorption efficiency in this case is about 8 times that of the alumina substrate. (Effects of the Invention) According to the present invention, since an aluminum nitride substrate is used which has a heat absorption efficiency approximately 4 to 8 times that of alumina, the power consumption of bipolar semiconductor devices, gallium arsenide (CaAs) devices, etc. Of course, being able to configure a thick film hybrid integrated circuit device on which large circuit elements are placed for practical use has a remarkable effect on downsizing and increasing the degree of integration of the circuit device.
第１図は本発明厚膜混成集積回路装置の一実施
例を示す断面図、２図は添加剤の添加量（重量
％）と熱伝導率ｋ（ｗ／mk）との関係を表わす曲
線図である。
１……窒化アルミニウム基板、２……導電配線
（銀ペースト）、３……半導体素子、４……サーメ
ツト抵抗体、５……コンデンサ・チツプ、６……
金属接続導体、７……保護膜、８……放熱金属
板。
Fig. 1 is a cross-sectional view showing one embodiment of the thick film hybrid integrated circuit device of the present invention, and Fig. 2 is a curve diagram showing the relationship between the amount of additive (wt%) and thermal conductivity k (w/mk). It is. DESCRIPTION OF SYMBOLS 1... Aluminum nitride substrate, 2... Conductive wiring (silver paste), 3... Semiconductor element, 4... Cermet resistor, 5... Capacitor chip, 6...
Metal connection conductor, 7... protective film, 8... heat dissipation metal plate.
Claims (1)
ウム，炭化ストロンチウム及び炭化バリウムのア
セチドリ化合物の少なくとも１種以上を添加剤と
して非酸化性雰囲気内で焼成されて形成される電
気絶縁性基板と、この電気絶縁性基板に載置され
る回路素子とを有することを特徴とする厚膜混成
集積回路装置。 ２ 前記アセチドリ化合物の総添加量が0.02〜10
重量％に規定されていることを特徴とする特許請
求の範囲１項記載の厚膜混成集積回路装置。 ３ 前記回路素子が能動素子および抵抗体を含む
受動素子の少なくとも１つであることを特徴とす
る特許請求の範囲１ないし２項のいずれかに記載
の厚膜混成集積回路装置。 ４ 前記回路素子が金属層を介し電気絶縁性基板
に固着されていることを特徴とする特許請求の範
囲１ないし３項のいずれかに記載の厚膜混成集積
回路装置。[Scope of Claims] 1. An electrically insulating substrate formed by firing in a non-oxidizing atmosphere with aluminum nitride as the main component and at least one acetide compound of calcium carbide, strontium carbide, and barium carbide as an additive. and a circuit element mounted on the electrically insulating substrate. 2 The total amount of the acetide compound added is 0.02 to 10
2. The thick film hybrid integrated circuit device according to claim 1, wherein the thick film hybrid integrated circuit device is defined in weight %. 3. The thick film hybrid integrated circuit device according to claim 1, wherein the circuit element is at least one of an active element and a passive element including a resistor. 4. The thick film hybrid integrated circuit device according to claim 1, wherein the circuit element is fixed to an electrically insulating substrate via a metal layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15680184A JPS6135555A (en) | 1984-07-27 | 1984-07-27 | Thick film hybrid integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15680184A JPS6135555A (en) | 1984-07-27 | 1984-07-27 | Thick film hybrid integrated circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6135555A JPS6135555A (en) | 1986-02-20 |
| JPH0369189B2 true JPH0369189B2 (en) | 1991-10-31 |
Family
ID=15635615
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15680184A Granted JPS6135555A (en) | 1984-07-27 | 1984-07-27 | Thick film hybrid integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6135555A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2787953B2 (en) * | 1989-08-03 | 1998-08-20 | イビデン株式会社 | Electronic circuit board |
| JPH0379504U (en) * | 1989-12-07 | 1991-08-14 | ||
| JP2004303466A (en) | 2003-03-28 | 2004-10-28 | Canon Inc | Heater drive circuit |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60178688A (en) * | 1984-02-27 | 1985-09-12 | 株式会社東芝 | High thermal conductivity circuit board |
| JPS60178687A (en) * | 1984-02-27 | 1985-09-12 | 株式会社東芝 | High thermal conductivity circuit board |
-
1984
- 1984-07-27 JP JP15680184A patent/JPS6135555A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60178688A (en) * | 1984-02-27 | 1985-09-12 | 株式会社東芝 | High thermal conductivity circuit board |
| JPS60178687A (en) * | 1984-02-27 | 1985-09-12 | 株式会社東芝 | High thermal conductivity circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6135555A (en) | 1986-02-20 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |