JPH0368270A - Picture processor - Google Patents

Abstract

PURPOSE:To attain a background elimination processing at a background level in real time by taking a pixel within a prescribed density range as an object in the process of the scanning of an original and detecting background density through averaging and correcting the density below the prescribed density into white density. CONSTITUTION:A background level detection circuit 72 detects the background level of an original sequentially by sampling a density data D fed via a correction filter circuit 70 at the prescribed number of times within the range of density depending on an absolute white level and an absolute black level loaded to a data load interface circuit 71 and obtaining its average value. Moreover, the circuit 72 outputs the loaded initial elimination level to the circuit 71 for the initial averaging processing, that is, till the initial background level is detected. Furthermore, a background level elimination circuit 73 corrects the density data D of pixels below the detection background level from the circuit 72 or below into '0' (corresponding to white level density) and outputs the result, and outputs the inputted density data as it is as to other pixels whose density exceeds the detection background level.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an image processing device such as a copying machine or a facsimile machine, and more specifically, an image processing device that optically scans a document to read density information in predetermined pixel units. The present invention relates to an image processing apparatus that includes an image reading means and an image forming means that forms an image based on the density read by the image reading means.

[Prior Art] In this type of image processing equipment such as digital copying machines, basically, a document is optically scanned to read density information in predetermined pixel units, and a recording sheet is printed based on the read density information. An image is formed on the image. The specific structure of the scanning system in such an image processing apparatus is shown in FIG. 35, for example.

This is a light guide member 17 including a light source 16 and a selfoc lens, etc., located below the platen 13 on which the original i14 is placed.
and a one-dimensional image sensor 11 such as a CCD are arranged, and these together constitute a scanning section. The image sensor 1
A predetermined i! corresponding to the image on the document 14 is determined based on a detection signal for each cell corresponding to the amount of received light outputted from 1! ii
Density data for each cell is generated. In this way, manuscript 1
The density data obtained by scanning and reading 4 is sequentially subjected to correction processing, various image editing processing, etc. in the middle of the pixel, and then supplied to an image forming apparatus.For example, if it is supplied to a printer such as a laser printer, For example, a dot 1ibi image corresponding to the density data in pixel units is formed on a recording sheet in synchronization with the document scanning, and in the case of facsimile, it is supplied to the other party's station and printed by the printer section of the other party's station. A dot image corresponding to the density data in pixel units is formed on the recording sheet.

This type of image processing device always obtains an image with a clear contrast between the background part and the image part, even when processing various originals, such as normal white originals, originals with high background density such as new @ paper, and colored sheets. Next, a so-called background removal process is performed to relatively reduce the density of the background area.

This background removal process basically determines the background density of the original (referred to as the background level), and forcibly corrects the density below that level to white turbidity. Proposed.

For example, the entire Ij'A manuscript is scanned once to check the overall ta degree of the manuscript, the background level is determined from the result of the examination, and then the manuscript is scanned again and the density data read first. Image formation is performed based on true density data obtained by removing a predetermined background level (see Japanese Patent Laid-Open No. 1660/1983).

In addition, in the background removal process as described above, the document scanning time is at least 2.
Because it is impossible to perform real-time processing synchronized with image formation, for example, we have improved this by assuming that the background part of the document always has a lower density than the image part (close to white density). The following method has been proposed (see Japanese Unexamined Patent Publication No. 63-40469).As shown in FIG. , In the process of scanning the original and sequentially reading the ilJ degree data Q (D), among the read density data within the i density range D-D, the density on the whiter side is set to the background level D* at that point. At the same time, all densities below the determined background level D- are corrected to white density.Then, when scanning the document, the read image density remains unchanged in the image area, and the corrected white density is applied to the background area. Images are formed based on the respective images.

According to such background removal processing, the background level DI is determined in real time in synchronization with document scanning.
Efficient image formation can be achieved without sacrificing document reading time.

“Problems to be Solved by the Invention” Conventional image processing devices that perform background removal processing in real time in synchronization with document scanning, as described in J. 1 when the background density changes locally, such as a document created by cutting and pasting, or a document created by cutting and pasting paper with a background density close to white on a colored sheet. The background cannot be removed.

For example, as shown in FIG. 37, the background level D8 is always set to a density closer to the white density, so if there is even a partial part that is closer to the white background, that density level becomes the background level DI and is scanned. During the process, the density level does not rise above that level, and in the high-density part E (N), such as the cut and pasted part of a newspaper, the density exceeds the background level], so the read density information is kept as it is in the same way as the image part. This is because image formation is performed based on this.

Therefore, the first challenge of this Komei is to scan the original with the same 1g1
To perform background removal processing at a background level that follows the actual state of the document even if processing is performed full-time.

Second, it is possible to perform background removal processing that is more responsive to the condition of the document.

[Technical First Step for Solving the WJI Problem] As shown in FIG. and an image forming means 3 that forms an image based on the density information read by the image reading means 2! 6 L'[!
Assuming that the image processing device is a3,
The technical means for solving the first problem is to collect density information for pixels in a predetermined density range on each scanning line, as shown in FIG. 1(A). The background density detection means 4 detects the original background density DI by averaging, and every time the background density detection means 4 detects, the read density information is forcibly read for pixels whose density is less than or equal to the detected background density D1. and a background removing means 5 for correcting the white density to a predetermined white density.

The density range for determining the pixels to be subjected to the averaging process in the background l1rI density detection means 4 is set to a density range that can be regarded as the background level of various assumed originals. In the averaging process in the background density detecting means 4, if more pixels with a density within the density range are targeted, the followability to the light level of the image WAm will decrease, and conversely, the pixels to be averaged will be more As the amount decreases, the followability improves, but the background level and the actual shading level become close to each other, increasing the possibility that the density of the image portion will be removed. Therefore, the number of pixels to be averaged is determined to be the optimum number based on the above-mentioned followability and image removal.

Generally, the white density obtained by forcibly correcting the background removing means 5 is completely set to a density of ゛011.
This is not limited to, but lower than the density of the image part
J! If so, you can set it arbitrarily.

In addition, in order to solve the above second problem by setting the background level to a density level that more closely matches the condition of the original, the first
As shown in Figure (B), the background density DI of the document is detected by averaging density information in a predetermined density range predetermined for each predetermined pixel range on each scanning line. The density detecting means 4, the offset setting means 6 for setting the offset amount δ of the background III'1l density, and the detected original background density DI and the offset setting means 6 each time the background density detecting means 4 performs a detection. The background reference density creation means 7 creates the original background reference density DO based on the offset mδ set in A background removing means 8 for forcibly correcting the read density information to a predetermined white density is provided.

It is preferable that the offset setting means 6 be configured such that the user can arbitrarily set the offset amount δ according to the state of the image formed by the image forming means 3, from the viewpoint of obtaining an image more suited to the state of the document.

Furthermore, the second problem can be solved by not performing the background removal process on areas that do not require the background removal process, such as partial halftone images in the document, and only performing the background process on the desired areas. In order to solve the problem, in addition to each of the above components, as shown in FIGS. 1(C) and (D),
Area recognition means 9 for recognizing l1IE and area recognition means 9
The apparatus is further provided with a switching means 10 for effectively switching the background removing means 5 only for pixels belonging to the area E recognized in .

The region recognition means 9 has a configuration according to the designation of the region. For example, if the area is specified directly on the manuscript using a marker, the area will be recognized based on the detection results of the mark, and the coordinate system (editor pad) will be used to identify the area.
If the area is specified by the input coordinates from the input coordinates, the area will be recognized based on the input coordinates.

[Operation 1] During the process in which the image reading means 2 optically scans the original 1 and reads density information D@ in predetermined pixel units, the background density detection means 4 detects a predetermined density for each predetermined pixel range on each scanning line. The document background density DI is sequentially detected by averaging the range of density information. Then, each time the background detection means 4 performs detection, the detected background density D1
The background removing means 5 forcibly corrects the read eight density information of pixels having the following density to a predetermined white density. As a result, the image forming means 3 uses the read density for pixels that were not subject to correction by the background removal means 5 based on the original density, and for pixels that were subject to circumference correction, based on the corrected white density. Image formation is performed based on density.

In addition, the configuration that takes into account the offset ship δ is shown in Figure 1 (
In B), in the process of scanning one document, the image reading means 2 sets the detected FA background density D4 to the offset setting means 6 every time the document background density D4 is detected in the same manner as above. The background reference density creation means 7 creates the original background reference density DO based on the offset maximum δ.Then, the background removal means 8 extracts the read density information for pixels whose density is equal to or less than the original background reference density 1)o. For the pixels that are not subject to this correction, the read density information is forcibly corrected to a predetermined white density, and for the pixels that are subject to correction, the corrected white density is used as the image forming means 3. This is the basis for image formation in

The offset value δ is set to an amount corresponding to the range of variation in the background level of the target document within the range of -. for example,
The offset loading δ is set relatively large for originals with large variations in the background level, such as newspapers, and the offset loading δ is set relatively large for originals with small variations in the background level, such as color paper. target is set small.

In the configuration that realizes the background removal process for a partial area (see FIGS. 1(C) and (D)), the user can select the desired area 1dE.
The area recognition means 9 recognizes the specified area E for the document 1 in which the L box image reading means 2
In the process of reading the density information pixel by pixel, the switching means 10 effectively switches the background removing means 5 or 8 only for pixels that fall within the area recognized by the area recognition means 9. Therefore, an image is formed with the above-described background removal processing performed only on the specified area E, and an image is formed on the other areas based on the read density information as is.

[Example] A detailed explanation of the present invention will be provided below in the order of the table of contents.

Table of Contents ■, Basic configuration ■ 1 Image input unit ■ 9 Color image information generation unit ■, Background removal processing unit (1) Background removal for the entire document (2) Background removal within specified area V1 Image forming unit ■, Summary ■, Basic configuration FIG. 2 is a basic configuration block diagram showing an example of an image processing apparatus according to the present invention.

This example is an image processing apparatus that assumes an image configuration of two colors, for example, black (main color) and red (sub color). Further, the basic structure of the document scanning section in the image processing apparatus is the same as that shown in FIG. 35 above.

In FIG. 2, 11 is a full-color sensor that optically scans the original image, and 20 is a reading signal station that is sequentially output from the full-color sensor 11 in a time-division manner in cell units, and receives color component data (green: G, This full color sensor 11 and the sensor interface circuit 20 constitute an image input section. 50 is a color image information generation circuit that generates density information and color information for each pixel from each color component data (GBR) from the sensor interface circuit 20;
generates a sub color flag SCF corresponding to the sub color "red" and a main color flag MCF corresponding to the main color "black" as color information based on the density information of the 2561@ tone.70 is color image information. sit from the generation circuit 50
A correction/filter circuit that performs various corrections and filter processes on information and color information (SCF, MCF, etc.), 1
This is an editing/processing circuit that performs processing such as enlargement, reduction, color inversion, etc. on the density information and color information (SCF, MCF) that have passed through the correction/filter circuit 70. The background removal processing section according to the present invention is preferably configured between the color image information generation circuit 50 and the correction/filter circuit 70.

There is a part of the main color of low 11rx that should have been removed from the background (a part of the background part whose density is not completely 0'') adjacent to the sub-color (line diagram, etc.) where the density suddenly changes.
For example, when smoothing filter processing is performed on ii*, the density of the adjacent main color portion will be raised, so if background removal processing is performed after this filter processing, the main color portion whose density has increased to a certain extent will be increased. A phenomenon occurs in which the background is not removed and the main color is bordered on the outside of a portion of the sub color. In order to prevent such phenomena, it is preferable to perform the background 1ull removal process before the correction filter process.

The actual circuit configuration consists of a background removal circuit and a color image information generation circuit.
It is provided at the final stage of 0 or at the previous stage of the correction/filter circuit 70.

As described above, the correction/filter circuit 70 and the editing/filter circuit 70
Density information and color information (SCF, MCF) that have undergone various processes in the processing circuit 100 are provided to a specific image forming device via an interface circuit 140. This image forming device includes a laser printer 150 that performs two-color reproduction, an IIM transmitter/receiver I1170, etc.
Furthermore, a system embodiment is also possible in which the density information and color information are provided to the computer 180, stored in an auxiliary storage device (magnetic disk device, etc.) of the computer 180, and the information is used in various terminal devices. . When the laser printer 150 is connected, the entire system is configured as a two-color copying machine, and when the image transmitter/receiver 170 is connected, the entire system is configured as a facsimile machine.

(2) Original image input unit This image input unit and the color information generation unit, which will be explained in the next section (2), are integrated to embody the image reading means that is a component of the present invention.

For example, the full color sensor 11 has five C colors with a predetermined dot density (16 dots/am) as shown in FIG.
The CD sensor chips 11 (1) to 1.1 (5) are arranged in a so-called zigzag pattern while alternately moving back and forth with respect to the document scanning direction S, forming an integrated structure. Each CCD
As shown in FIG. 4, the sensor chips 11 (1) to 11 (5) have green G1jlB and red R filters (gelatin filters) for each light receiving surface of each diagonally partitioned cell (photoelectric conversion element). etc.) are provided in order.The adjacent green filter cell 12G and blue filter cell 12
1) and red filter cell 12'' form a set, and an output signal of a level corresponding to the amount of light received from each cell (corresponding to the reflectance of the document) is processed as a signal for one pixel P.

The sensor interface circuit 20 basically includes each CCD sensor chip 11 (1) to 11 (5) arranged in a staggered manner.
) based on the output signal from the color component signal (G.).

A correction function for aligning B, R) to one line, and converts each color component signal (G, B, R) serially processed as a signal from each cell of the CCD sensor chip into a parallel signal for each pixel P. It has a correction function to compensate for the deviation in the detected position of each color component signal (G, B, R) in one pixel P.

The circuit shown in FIG. 5 is a circuit that realizes the function of aligning the outputs from the staggered CCD sensor chips into one line.

In the figure, each CCD sensor chip 11 (1) to 1
1 (5), the signals are serially output cell by cell and are sent to the A/D via amplifier circuits 21 (1) to 21 (5).
It is input to conversion circuits 22 (1) to 22 (5). Each of the A/D conversion circuits 22 (1) to 22 (5) outputs the sensor output signal for each cell corresponding to the amount of received light as, for example, 8-bit data. Each of these A/D9
Latch circuits 23 (1) to 23 (5) for timing adjustment are provided after the m circuits 22 (1) to 22 (5). Regarding the CCD sensor chips 11 (2) and 11 (4), which are placed in front of the CCD sensor chip, a first-in, first-out FIFO memory 24.25 is provided after the latch circuits 23 (2) and 23 (4). It is provided. These FIFO memories 24 and 25 delay the output timing of color component signals for the systems of CCD sensor chips 11 (2) and 11 (4), and
Sensor chip 11(1), 11(33, 11(5)
This is to align the output timings of the same line signals for the systems. Therefore, while the write timing is determined to be a predetermined timing, the read timing (delay amount) is determined by the distance ( For example, 62.5μTrL) and the document scanning speed of the full color sensor 11.For example, if the scanning speed differs depending on the magnification of the image to be formed, the readout timing is determined according to the magnification. In this way, when making the read timing variable by multiplying by 4A, etc., the FIFO memory 24.2 is controlled assuming that the read timing is the slowest.
5 is determined (the memory capacity corresponds to the allowable delay amount).

A latch circuit 2 is provided after each FIFO memory 24.25.
6(2) and 26(4) were established(), while CCD
Sensor depth 11 (11, 11 (3), 11 (5)
For the system, the latch circuits 23(1) and 23(3)
).

23 (5) is followed by a direct latch circuit 26 (1)
.

26(3) and 26(5) are connected, and FIFO24, 2
Leading CCD sensor depth 11 (2) via 5
.

11 (The color component signals of the 41 systems and the color component signals of the other sensor chip systems are transferred to each latch 26 (1) to 26 (6).
), the images are treated as belonging to the same scanning line, and are transferred to the subsequent stage at a predetermined timing. Each latch 26 (11
~26 Looking at (5), we see that the color component signals of each CCD t?
G→B→R→G→B→
This is where the data is serially transferred in the order of R→...

The circuit shown in FIG. 6 is a circuit that realizes the function of converting each color component signal serially transferred in each CCD sensor depth system into a parallel signal for the 111th pixel as described in "2".

In the figure, each of the CCD sensor chips 11(1) to
11 Corresponding to (5), serial-parallel conversion circuit 30
(1) to 30 (5) are provided. Each of these serial-parallel conversion circuits 30 (i) (i=1...,
5) is a latch circuit 31g to which the color component signals (G, B, R) serially transferred as described above are input in parallel.
, 31b, 31r, each latch circuit l,
31G is synchronized with a clock signal (G clock) that becomes active when transferring color component signal G (green), 31b is synchronized with a clock signal (B clock) that becomes active when transferring color component signal B (blue), Historically, the 31r latches each color component signal in synchronization with a clock (R clock) that becomes active when the color component signal R (red) is transferred.Furthermore, each of the latch circuits 310 and 31b described above.

31 "In the subsequent stage, there is a tri-state wrap circuit 3 that latches pixel by pixel again in order to adjust the transfer timing.
2q, 32b, 32r are provided in J3, and each tri-state latch 32g, 32b.

32' is configured such that the previous stage latch data (color component signal) is re-latched at the same time at the fall timing of the R clock.Furthermore, these tri-state latch circuits 32G, 32b, and 32r receive an enable signal jHi. )<
i=1. ..., 5) controls whether the output is activated or not.

The above serial-parallel conversion circuit 30 (1) to 30 (5)
) is followed by a memory circuit 34 and a timing υll111 for controlling writing and reading of this memory circuit 34.
A circuit 36 is provided. The memory circuit 34 has a dedicated memory for each color component (G, B, R), and when loading the memory of each color component, the enable signal is sent from (1) → (2) → (3) → (4). ) → (5), and by changing the write address to υ11M1 according to a predetermined rule, one line of data is sequentially arranged in the memory for each color component (G, B, R). It is now possible to do so. Then, by sequentially reading out the data of each color component from each dedicated memory in parallel, the color component data of the middle pixel is sequentially transferred to the subsequent stage from one end of one line to the other.

Note that the resolution is converted using this memory circuit 34 as a boundary due to the difference between the loading timing and the read timing in the timing iI11wJ circuit 36. For example, the timing control circuit 36 controls the read timing so that the resolution in the system after the memory circuit 34 is 400 SPl.

The circuit diagram shown in Figure 7 shows each color component (G, B) in one pixel.
, R) is a circuit that realizes a correction function regarding the deviation of the detected position.

As shown in FIG. 4, due to the structure of the full color sensor 11-
Because the reading positions of each color component G, B, and R are spatially shifted within a pixel, if the signal from each cell is processed as a color component signal, other color pixels will occur at the boundary of the black image. This results in problems such as the occurrence of a phenomenon called ghosting. Therefore, in order to prevent the occurrence of such ghosts, this correction circuit is designed to make the reading positions of each color component appear more coincident. Specifically, the 8th
In the arrangement of each cell shown in the figure, when paying attention to pixel pn, the reading position of each color component is corrected so as to virtually become the position of cell Gn. The correction method is to perform a weighted average of the reading position of each color component in consideration of the adjacent pixel p n-1 so that it becomes the position of the cell Gn. That is, Gn - Gn... (1) an
-(an-1+2Bn)/3・(2)Rn-(2
Each color component data (Gn, an, Rn) is obtained by the calculation of Rn-1+Rn)/3.(3).

For example, there is a circuit shown in FIG. 7 as a circuit that realizes the above calculation.

Color component data input pixel by pixel by the circuit shown in FIG. 6 is input in parallel to the correction circuit. As for the G component system, the latch circuit 38
g is provided, and a latch circuit 38 is provided for the B component system.
A shifter 42 for shifting the data latched by the next latch circuit 41 and the latch circuit 38b by one bit is installed at the subsequent stage of b, and an adder 43 for adding the latch data of the latch circuit 41 and the shift data of the shifter 42. The addition result in this adder 43 is used as the address input, and
A look-up table (ROM) 44 is provided which outputs /3. Regarding the R component system, the next latch circuit 45 and latch circuit 4 are provided after the latch circuit 38r.
Thick 4 to shift the data latched to 5 by 1 bit
6 is provided, and an adder 46 that adds the latch data of the latch circuit 38 and the shift data of the shifter 46.
The addition result of this adder 46 is input to a look-up table (R
OM) 48 is provided.

With this configuration, the above equation (1) is realized in the G component system, and since shifting by 1 bit means twice the calculation, the above equation (2) and the R component system are realized in the daily component system. In this case, the above equation (3) is realized.

The above is the heavy-duty configuration of the image input unit composed of the full color sensor 11 and the sensor interface circuit 20. When scanning a document with the full color sensor 11, one
Each color component data (G, B,
R) are sequentially output.

Each color component signal that has been processed by the image input section as described above is transferred to the color image information generation section, which will be described next, through processing such as shading correction performed within the film.

(1) One-color image information generation section FIG. 9 shows a specific structure of the color image information generation circuit 50 in FIG.

In the figure, among the color component data transferred pixel by pixel from the sensor interface circuit 20, a subtraction circuit 51 inputs quarter data and R component data and calculates the difference (R-G), and 8 components. A subtraction circuit 52 is provided which inputs data and R component data and performs FA calculation of the difference (R-8).The subtraction results in each subtraction circuit 51 and 52 are stored in parallel at the address end of a lookup table 53. The lookup table 53 outputs the product of saturation C1 hue H of the pixel (mouth For example, the upper 5 bits are the result of (HXC), and the lower 3 bits are assigned to the color judgment output.

The contents of the lookup table 53 are defined as follows, for example.

As shown in Figure 10, the vertical axis represents the difference (RG) between the red (R) color component and the green (G) color component, and the red (R) color component and the blue (B) color component. If a color space is set with the horizontal axis being the difference (R-8) from the origin O, an arbitrary color can be specified based on the distance r from the origin O and the rotation angle θ.

The distance ``is a factor that mainly determines the saturation C, and the closer it is to the origin O in the color space, the closer it becomes to an achromatic color. Also, the rotation angle θ is a factor that mainly determines the hue.For example, “Red′°”Magenta′.

"Blue,""cyan,""green," and "yellow" are respectively distributed in the color space at a3 in the position surrounded by the broken line in FIG.

From the above relationship, (R-G) Day Hirotori 12-8
) data follows r=((R-G) + (R-8)2)↓゛(
The required distance from the origin @r, the same (RG) data and (
A color determination is made at a position in the color space specified by the rotation angle θ obtained from the R-B) data according to θ-jan'' ((RG)/(R-8)).

In addition, the chroma C is determined from the (R-G) data and the (R-8) data by the above formula, and the relationship between the distance from the origin and the chroma C, for example, as shown in Fig. 11 determined experimentally. It is determined according to the relationship shown in FIG.

Furthermore, the hue opening is determined by the relationship between the rotation angle θ and the hue [(, for example, according to the experimentally determined relationship shown in FIG. In FIG. 12, when the rotation angle θ is smaller than the predetermined value θ0, the hue aperture is forcibly set to PaO'''.

In this way, the color discrimination result, saturation C and hue mouth are both (R
-G) data and (R-8> data), the lookup table 53 which uses (R-G) and (R-8) from each subtraction circuit 51 and 52 as address inputs is calculated based on the above calculation. It is configured to realize processing such as color determination and determination, and output the color discrimination output and the product of saturation C and hue value (CX l-1).As described above, (
CX)-1') is expressed in 5 bits, and the color discrimination result is expressed in 3 bits.For example, when the parasitic circuit 55 in Table 1 is input manually, the R component data is multiplied by 0.3 times to 1 path 56. I am typing. Each multiplier circuit 54°55.5
The multiplication results in step 6 are respectively input to the adder circuit 57, and the addition result in this side control circuit 57 is VV -0,6G + 0.3R.
+O, IB are transferred to the subsequent stage as the brightness data of the pixel.

It is expressed as shown in Table 1 above.

The relationships shown in FIGS. 11 and 12 that determine the saturation C and the hue range are variously viewed depending on the color separation required of the system.

Further, in FIG. 9, each color component data inputted in parallel pixel by pixel is sent to a multiplication circuit 5 whose G component data is multiplied by 0.6.
4, and the B component data is 0.1 times the brightness data V above.
is generated by setting the G component data behind the color component data GBR to 11 and adding the values of the B component data and R component data to that value. This is because the spectral sensitivity (111 line) of the G component signal station in the image sensor (full color sensor 11) has characteristics close to the human specific luminous efficiency curve.

Each coefficient (the multiplication value in each multiplication circuit) in the formula for determining the brightness V above is the spectral sensitivity characteristic of the image sensor,
This is ultimately determined by the spectral phase separation of the exposure lamp.

In addition, as mentioned above, the spectral sensitivity characteristic of the G component signal is
1, it is also possible to use only the G component data as the brightness data V, depending on the ability required of the system.

The output regarding saturation and hue from the lookup table 53 (day It has a function of outputting color density data DC corresponding to .

Specifically, for each input above, Dc = KxCx mouth x v The color density data DC determined according to the following is output.

Here, K is a coefficient that varies depending on the color determination data.

This coefficient is used to match the brightness levels of chromatic colors and achromatic colors, since chromatic colors feel brighter than achromatic colors, and is determined experimentally in advance for each discrimination color. , the value is set to a value within a range of about 1.1 to 1.3, for example.

The color discrimination output (3 pits) from the lookup table 53 and the color selection data set in the latch circuit 60 are input to the matching circuit 59, and when the color discrimination output and the color selection data match, the matching circuit The output of 59 rises to the low level.This color selection data is set in the latch circuit 60 based on the operator's operation input or setting input from a dip switch, etc., and is reproduced as a nub color. The result is 3-bit data (see Table 1 above) corresponding to the color.The output of the matching circuit 59 is
It functions as a sub color flag SCF (color information) indicating whether or not the sub color (for example, red) is set in color selection, and also serves as an output selection signal (SEL) for the selection circuits 61 and 62. ing. The selection circuit 61 has a function of switching brightness data V and "O" data according to the state of the selection signal, and when the selection signal is at H level, ii
When the ON data and the selection signal are at the ON level, the brightness data ■ is output. The selection circuit 62 has a function of switching between the color density data [)C from the lookup table 58 and the data from the selection circuit 61 according to the state of the selection signal. The color density data Dc is output from the selection circuit 61 when the selection signal is at L level.

Further, the output bit of the selection circuit 61 is directly outputted to the OR circuit 6.
3, and the output of this OR circuit 63 functions as a main color flag MCF (color information) indicating whether or not it is the main color (for example, black), while the output of the selection circuit 62 is input as density data. Transferred to the next stage.

In the color image information generation circuit as described above, in the main color (black) region of l1Ili, the output of the matching circuit 59 becomes L level, and the brightness data V from the adding circuit 57 is directly transmitted to the selection circuits 61 and 62. The data is then transferred as density data D to a subsequent stage. At this time, the brightness data ■ is “O”
Since this is not the case, the main color flag MCF is at the low level, and since the output of the matching circuit 59 is at the high level, the sub color flag SCF is at the L level (see main color area E2 in FIG. 13). Further, in the sub-color area [(for example, red) of the original, the output of the matching circuit 59 becomes low level, and the color density data from the look-up table 58 is transferred to the subsequent stage as density data D via the selection circuit 62. Ru.

At this time, since the output of the selection circuit 61 is "011", the main color flag MCF becomes a low level, and since the output of the matching circuit 59 is a low level, the sub color flag SCF becomes a low level (sub color flag SCF in FIG. 13). (Refer to area taEs).Furthermore, the background area of the manuscript (density ``0''
>, since the output of the selection circuit 61 is OII and the output of the matching circuit 59 is also at L level, the density data D becomes "0°'" and both the main color flag MCF and sub color flag SCF become the level. (See background area En in FIG. 13).The above-mentioned calculation circuits are synchronized and driven pixel by pixel under the timing control circuit (not shown). The flags (MSF, SMF) are sequentially transferred to the next-stage capture/filter circuit 70 as data forming a pair of the same pixel.

In this way, density data D and color flag (MCF, 5C
In the correction/filter circuit 70 where F) is transferred in pairs for each pixel, correction processing is performed, for example, due to chromatic aberration of the reading optical system, bias in color sensitivity of the full color sensor 11, etc. Various correction processes such as ghost correction to prevent dots determined to be subcolor (red) from appearing as ghosts at the boundary with (white) and filter processing, such as emphasizing high frequencies, are also performed. Various filter processes such as MTF correction to prevent moiré and high-frequency cut correction to prevent moiré are performed.

(2) Background Removal Processing Unit In this background removal processing unit, the constituent elements of the present invention, such as a background density detection means, a background removal means, an offset setting means, and a background reference density creation means, are implemented, and the area recognition means and A switching means is also embodied. Hereinafter, "(1) Removal of background of entire document" and "(2) Removal of background within specified area" will be explained in order. In particular, specific aspects of the area recognition means and switching means will be explained in the section "(2) Background removal within designated area".

Before the various filter processes 1qj and the like in the correction/filter processing circuit 70 as described above, the background removal process 98 is performed on the density data D from the color image information generation circuit 50.

(1) Background Removal of Entire Document Figure 14t shows the basic configuration of a circuit for performing background removal processing.

43 in the figure, 71 is a data load interface circuit that loads data from the control tllcPU (path shown), and this data [l-do interface circuit 71
has an absolute white level of 111m and an absolute black level (BLEV
), initial removal L/H/L, (INITLEV),
Off-hit level (QSLm) four data are sequentially loaded in synchronization with the latch signal corresponding to each data.The specific configuration is as shown in FIG. 15, for example. Four latch circuits 75, 76, 77, 7 into which load data from CPLI is input in parallel
8, and latch signals are input independently to each latch circuit. By switching the latch signal in accordance with the output timing of each load data, the absolute mill level (IIILEV) can be adjusted to the latch circuit 75.
, the absolute black level (BLLEV) is sent to the latch circuit 76,
The initial removal level (INITLEV) is latched by the latch circuit 77, and the offset level (D3LEV) is latched by the latch circuit 78.

Here, the absolute white level (IIILEV) is the R low density level in the turbidity range that can be considered as the background level of various assumed originals, and is the same temperature as the absolute black level (BLLEV)! ! is the highest concentration level in the range. Further, the initial removal level (INITLEV) is a background level that is set until the first determination of the background level, and the offset level (D8LEV) is a U51 level that finely adjusts the detected background level.

Furthermore, in FIG. 14, 72 is a background level detection circuit that sequentially detects the background level of the original to be read;
This background level detection circuit 72 detects the absolute level (WI) loaded into the data load interface circuit 71.
By sampling the density data D provided through the above-mentioned correction/filter circuit 70 a predetermined number of times within the density range determined by the absolute black level (ILEV) and the absolute black level (BLL[V) and finding the average value, the background of the original is determined. Levels are detected sequentially. In addition, the background level detection circuit 72 performs the initial averaging at 51
11g, that is, 11g until the first ground flit level detection is performed.

The initial removal level (INITLEV) loaded into the data load interface circuit 71 is output.

Further, 73 is a background removal circuit, and this background 1111 removal circuit 73 sets density data D to '0' for pixels whose density is lower than the detected background level of the background level detection circuit 72.
(Corresponding to the whiteness level S) and is outputted, and for other pixels whose density exceeds the detected background level, the input density data D is output as is.

Note that the color flag (M
CF, 5CF) is transferred to the subsequent stage via the delay circuit 74, and is sent to the background level detection circuit 72 and the background removal circuit 73.
The relationship between the pair of density data D and the color flag that has undergone the background removal process in step 2 is maintained in the same way.

The concrete structure of the background level detection circuit 72 is as shown in FIG. 16, for example.

In the figure, 81 is a sampling circuit that samples density data D supplied pixel by pixel in synchronization with video clock CLK, and 82 is a sampling circuit that samples density data D that is supplied pixel by pixel in synchronization with video clock CLK.
The sampling circuit 81 is configured to sample the density data D by using the divided signal from the frequency dividing circuit 82 as a sampling clock. In addition to the sampling clock (divided signal), the frequency dividing circuit 82 generates a 1/4CLK signal (d) whose rising timing is further shifted from the sampling clock (C) as shown in the timing chart of FIG. There is.

83 is a comparison gate circuit, and this comparison gate circuit 83
The density data D sampled by the sampling circuit 81 is the absolute white level (14HLm) and the absolute black level (8Lm).
When the concentration is within the concentration range determined by LEV), the frequency dividing circuit 82
This passing signal has a function of passing the 1/40 LK signal from the 1/4 CLK signal (d
) is output as an addition counter signal (e) with a delay of one clock. Further, this comparison gate circuit 83 outputs an addition signal (e-) which is one clock earlier than the addition counter signal. 84
is an adder circuit, 85 is a latch circuit, and the density data D (8 bits) sampled by the sampling circuit 81 is shifted to the right by 2 bits and inputted to the adder circuit 84, and the density data is transferred to this 2-bit shift 1 for the above comparison. Gate circuit 83
The addition signal <e') is sequentially added to the numbing result latched in the latch circuit 85. Here, the density data shifted to the right by 2 bits has a value of 1/4 of the original density data D of 7. 86 is the initial removal level (
■This is a multiplexer that selects either the old TLEV) or the above addition result latched in the latch circuit 85, and the select terminal (SEL) of this multiplexer 86 is L.
Initial removal level (INITLm side, same as 11)
The latch circuit 85 side is selected depending on the level. Reference numeral 87 is a latch circuit that latches the data passed through the multiplexer 86, and the data latched by this latch circuit 87 is transferred to a subsequent stage as a detected background level.

Furthermore, 88 is a timing circuit, and this timing circuit 88 receives the sampling clock (C) from the frequency dividing circuit 82, the video valid signal (VVAD: which becomes a low level state during the valid main scanning period), and the comparison gate circuit. 8
The addition counter signal (e) from 3 is input, and various timing signals are created based on these input signal stations. Specifically, the internal addition counter (path shown) is designed to raise the addition counter output signal (f) for one clock every time the addition counter signal (e) falls four times. Addition clear eye No. 3 (
D) is output to the clear G3CH of the latch circuit 85. Further, a background latch signal (h) synchronized with the rising edge of the video valid signal @ (V, VAD) and the rising edge of the addition counter output signal (f) is outputted to the clock terminal CK of the latch circuit 87, and Valid signal (V.

A signal obtained by delaying VAD) by one video clock is output to the select terminal (SEL) of multiplexer 86 (see the timing chart in FIG. 17 for the timing state of the signal).

The ground jυ1 level detection circuit 72 having such a configuration has the first
The operation is performed according to the timing chart shown in FIG.

Scanning of each line starts and the video valid signal (V,
When VAD) rises, the latch circuit 85 is cleared by the addition clear signal @(g), and the background output latch signal (b) rises, causing the latch circuit 87 to latch the output of the multiplexer 86 at that point. Multiplexer 8
Since the select signal (SEL) for 6 is at L level at this point, the initial removal level (lNlT1.[V
) is latched by the latch circuit 87, and this initial cut removal level (INITLEV) is output as the first detected background level. In this state, in synchronization with the sampling clock (C) that rises every 4 video clocks < CLK),
The degree data D is sampled by the sampling circuit 81.

In the process, 1/4 value of the sampling density data D is input to the tightening circuit 84, and the sampling density data D is between the absolute white level (WIILEV) and the absolute black level (8L[, EV). In this case, the
) is output in relation to the 1/4 CLK signal (d), and the addition result in the addition circuit 84 is latched in the latch circuit 85 in synchronization with the addition signal (e''). White level (WIILEV) and absolute black level (8LLE)
When the density data D between V) is sampled four times, that is, when the addition counter signal (e) is output four times,
At the final output timing, the counter output J signal (
f) rises, and in synchronization with it, the background output latch signal (
h) rises. At the timing when this ground output latch signal station (h) rises, the select signal (S
EL) is already at the white level, and with the rise of the background output latch signal (h), the fourth addition signal (eM
The addition result latched in the latch circuit 85 is set in the latch circuit 87 via the multiplexer 86. The data newly set in the latch circuit 87 becomes the detection area 1111 level, but this detection background level is the level value obtained by adding the 174 values of the sampling density data D by 4 data and 1 data. For this reason, it is a simple average of the four sampled concentration data. After the detection background level is switched, that is, the addition clear signal (g > clears the addition result as it is set in the latch circuit 85. Thereafter, every time one 4 data of 174 values of 81 quasi-data D is added, the addition result is as follows. The average value of the 4-sampled data D is output as the detected background level, and the above-mentioned process is repeated starting from the first output level each time the scanning line is sequentially moved.

Further, to explain in relation to a specific 8 density distribution state in units of ti pixels, for example, when the read density data D becomes as shown in FIG. 18, the following will occur.

In units of 4 video clocks! The IIf data is sampled, but the averaging process, i.e. 1 as described above, is performed.
/4 l's 4 data addition process is as follows: ■→■→■−→
■ is the target. Here, since the a-degree data D sampled at 8, which is the fourth clock from ■, has a level lower than the absolute white level (BuLEV), it is excluded from the averaging process.

Then, the average value based on the a degree data D of the target ■■■■ becomes the detected background level DI during the next averaging process. While outputting the horizontal background level obtained by this 1/4 value 4 data addition process, ■→■→■
→ Bedeku addition of 1/4 ffJ for [phase] 9
Eight principles are performed. Here, since the density data D (absolute black level) sampled at B corresponding to the fourth clock from ■ is greater than the absolute black level (8LLm), it is excluded from the subject of the averaging process.

Then-C, as in the previous case, the average value of the target density data 1) becomes the detected background level during the next averaging process, and the 114 processes are repeated thereafter.

Note that the above absolute self level (WIll, EV) and absolute black level (BLLEV) vary depending on the assumed background level density range of the original as described above, but if the density data D is expressed in 8 bits as in this embodiment, O (white) to 255 (black)
For example, if the density is up to
EV) is “55”, absolute black level (BLLm is “°”)
In addition, the initial removal L/HLE (INrTl, EV) is set to 105''.
), absolute black level (for example, °° for each value of BLLm
It is set to 75″′.

A background removal circuit 73 performs background removal processing based on the detected background level from the background level detection circuit 72 as described above.
The specific configuration is shown in FIG. 19, for example.

In the figure, 91 is a latch circuit that latches the pixel-by-pixel density data D that has passed through the processing in the background level detection circuit 72, and 92 is a latch circuit that latches the detected background level obtained through the above-described processing. , 93 is an addition circuit that adds the detected background level set in the latch circuit 92 and the offset level (D3LEV) output from the CPU based on the operator's operation input, and 94 is a comparison circuit, which is similar to the one described above. The S degree data latched in the latch circuit 91 is compared with the addition result in the adder circuit 93, and when the density data D is equal to or less than the crimping result, a detection signal (white level) is output. here,
The addition result in the adder circuit 93 is the sum of the detected background level and the offset level (O3L[V), and the value is the document reference background density and becomes the bell Do. The output of the comparison circuit 94 is the detection output of pixels whose density is less than or equal to this document reference background density level DO. 95 is temperature data D or white density data latched in the latch circuit 91.
This multiplexer 95I selects the normal density data D side, and when the detection signal (white level) is output from the comparison circuit 94, it is based on the signal level. Te white S level “0”
You can select the PA side. Reference numeral 96 denotes a latch circuit at the output stage that latches the density data via the multiplexer 95, and the 8 density data set in this latch circuit 96 is transferred to the subsequent stage as density data that has undergone background removal processing.

In such a background removal circuit 73, the read S degree data D
Since the multiplexer 95 switches to the white density side in accordance with the detection output of the comparator circuit 94 when the density is less than the original reference ground 11111113 degree level DO, the read density data D and the set original reference background density level DO. For example, when the relationship becomes as shown in FIG. 20(a), the background removal process causes the output density data to have a density below the document reference background density level DO, as shown in FIG. 20(1)). The pixels are corrected to white density OII, and for pixels whose density exceeds the document reference background density level DO, the read density data D is transferred as is to the subsequent stage.

The above-mentioned offset level (D8LEV) is a value that more closely matches the detected background level to the actual document condition, since the detected background level obtained by averaging processing differs from the actual background density, for example, in an original with large density fluctuations. This is what is set to correct it.

Also, the background part and image part can be divided according to the user's preference! This offset level (O3LEV) is adjusted when adjusting i degrees. In this embodiment, the specific offset level (D5LEV) is, for example, ll2 with respect to the above-mentioned absolute white level (1411LEV) and absolute black level /L/ (BLLEV).
The density can be adjusted within a range of about 0 + 1.

In an image formed based on the density data obtained by detecting the background density level and removing the background based on the detected background density level as described above, the background part has a completely white density and is not part of the image. The contrast becomes clear. In addition, the detected background sti level is set to the absolute mill level (WIILEV) and the absolute black level (8LLEV).
) Read between 111! Since it is obtained from the average value of the i data, the detected background density level follows the actual background density fluctuation of the original. In case N), the detected background level follows the actual density level as shown by the broken line. Therefore, even if the document has a locally varying background density level, the formed image will have a uniform background area and will be easy to see with sufficient contrast with the image area.

Note that the specific configuration of the 1 m image forming section will be described later.

In addition, in the image processing apparatus according to this embodiment, image information of each pixel is converted into density data D and color flags (MCF, 5CF).
), but in the background removal process described above, the density of pixels whose density is lower than the original reference background density level Dθ is corrected to white density “0”, which makes it impossible to match the color flag. Therefore, a circuit that matches the density data and the color flag at a stage subsequent to the circuit that performs this background processing, specifically, a flag correction function that lowers the color flag of the element whose density data has been removed. A circuit will be installed.

(2) Background removal within specified area The background removal described above is performed on the entire target document, but for example, if a part of the document contains a halftone image (photo image, etc.), the background will be removed in that part. Removal and faithful tili! ii) Since image reproduction, that is, halftone reproduction, etc., will not be possible, background removal processing should be performed only on areas in the document that are designated as areas (texts, line drawings W4 area, etc.) that are not stable even after background removal. do.

In this example, for example, as shown in FIG. 22, the area V<
To directly recognize the area E on the document 14 surrounded by the marker M of a specific color determined for designation, go to (iaRecog).
The above-mentioned background removal process can be selectively performed on the area E(D) inside Em or outside E(D). In addition, the color of 7-ka is 2
Assuming a color, the areas heard in each color are separately recognized in a first area color (for example, yellow) and a second area color (for example, yellow). .

First, the basic configuration of the entire image processing is, for example, as shown in FIG. 23, in which an area recognition circuit 300 is added to the basic configuration described above (see FIG. 2). The color image information generation circuit 50 has a function of discriminating pixels of the above-mentioned -fi gamut colors and second area colors, and sends the discrimination results to the first area color flag ARCF1 and the second area color flag ARCF1.
It is output as 2. The area recognition circuit 300 determines whether each pixel is inside an area surrounded by markers of the -th area color based on the first area color flag ARCF1 and the second area color flag ARCF2 from the color image information generation circuit 50. It is determined whether it is inside the area or outside of the area covered by the marker of the second area color, and the result (ARDTl,
ARDT-2, ARoUT) is provided to the editing/processing circuit 100. Also, territory [! The area signal stations (ARDTl, ARDT2.AROLJT) from the detection circuit 300 are supplied, for example, to a circuit related to background removal processing provided at the front stage of the correction/filter circuit 70, and the area signal station ARDT
1. ARDT2. AROLJTk: Based on this, ground fill removal processing is executed only for pixels belonging to a desired area.

Here, a specific configuration of the output stage of the color image information generation circuit 50 having the function of determining pixels of the first area color and second area color is shown in FIG. 24, for example.

Of the color component data from the sensor interface circuit 20, R component data and G component data are input and the difference (R-
G), a reduction circuit 52 which inputs the same R component data and 8 component data and calculates the difference (R-8), and the calculation results of each reduction circuit 51 and 52. A look-up table 53 composed of ROMm with the address input as B, a multiplier circuit 54 that multiplies the G component data by 0.6, and B.
A multiplication circuit 55 that multiplies component data by 0.1, a multiplication circuit 56 that multiplies R component data by 0.3, and each multiplication circuit 54.5.
5. Add the multiplication results in 56 to obtain brightness data V=0.
6G + 0.3R + 0.1B, an addition circuit 57 which calculates 6G + 0.3R + 0.1B, and an addition circuit 57 which calculates read data from the lookup table 53 (color type 1 data and HXC).
The look-up table 58 for one density data having the I'<OM configuration in which the address input is the brightness data V which is the addition result in , is similar to that shown in FIG. 9 and hj.

The color discrimination output from the lookup table 53 and the color selection data corresponding to the subcolor set in the latch circuit 60 are input to the coincidence circuit 59, and the output of this coincidence circuit 59 becomes the subcolor flag SCF=. The dots also have the same configuration as shown in FIG. A selection circuit 61 for switching between brightness data V and "0" data, and a selection circuit 62 for changing 17J between the read data from the look-up table 58 and the output value of the selection circuit 61 are also provided, and each bit of the selection circuit 61 is becomes the main color flag MCF via the OR circuit 63, and the output of the selection circuit 62 becomes the density data D.

In addition to such a configuration, a latch circuit 64 for setting the second area color data and a matching circuit 65 for detecting a match between the set second area color data and the color discrimination data are provided. A latch circuit 66 for setting area color data and a matching circuit 67 for detecting a match between the set second area color data and same color discrimination data are provided.

The output of the minus number circuit 65 directly serves as the first region color flag ARCF1, and the output of the minus number circuit 67 directly serves as the second region color flag ARCF2. And above-
The output of the number circuit 59 is the select signal (SE
At the same time, the output of the minus number circuit 65°67 is inputted to the OR circuit 68 together with the output of the matching color 59, and the output of this OR circuit 68 becomes the select signal (5EL) of the selection circuit 61.
).

With this configuration, in the pixels of the -th region color,
At the same time that the first area color flag ARCFI rises, the "0" density data selected by the selection circuit 61 is transferred to the selection circuit 6.
2.

Therefore, the density data of the pixel of the first region color is “l Q
11. The color flags (MCF, 5CF) and the second area color flag ARCF2 fall, and only the first area color flag ARCF1 rises. Also,
Similarly, for the pixels of the second area color, the density data is IQH, the color flags (MCF, 5CF) and the first area color flag ARCFI fall, and the second area color flag ARC falls.
Only F2 is in a rising state.

The basic configuration of the area recognition circuit 300 that performs area determination based on the first area color flag ARCF1 and the second area color flag ARCF2 generated by the color image information generation circuit 5-O as described above is, for example. , as shown in FIG.

Referring to the figure, the first area color flag ARCF1 and the second area color flag ARCF2 (2 bits of 1 bit each) output from the above-mentioned color image information generation circuit 50 for each pixel are first sent to the connection correction circuit 301. I am typing. As shown in FIG. 26, this connection correction circuit 301 processes a mark M drawn on a document by substantially thickening it as shown by a broken line. Check the state of the region color flags in a matrix of lines x 15 clocks, and if the region color flag (ARCFl, ARCF2> of any pixel in the matrix is active, the region color flag (ARCFl, ARCF2) of the pixel of interest CO
2) is made active. This connection correction is performed to correct the discontinuity of the mark when the mark M covers the image part, because if there is an image such as a character under the mark M, the discrimination color in that part will be different from the marker color. This is a process that Note that when image reading is performed at, for example, 16 dots/line, the above 15 lines x
The connection correction process using a matrix of 15 clocks corrects mark discontinuities of about 1jI#I at most.

The connection correction circuit 301 realizes serial processing by time-divisionally processing the area color flags (ARCF1, ARCF2) which are input as two bits in parallel. Then, the correction output for the area color flag output from the connection correction circuit 301 is sent to the determination circuit 302.
is supplied to.

The determination circuit 302 examines the state of the area color flag supplied pixel by pixel via the connection correction circuit 301 in synchronization with the reading scan for each scanning line, and determines the status based on the results. Then, it is determined whether each pixel is inside or outside the area. Basically, ``pixels after the area color flag changes from the area where the area color flag is II O11 to ``1'' and then to 0'' are determined to be inside the area'', Further, pixels after the area color flag changes from the area where the area color flag is 1 to 0 are determined to be outside the area.

The determination result of the determination circuit 302 as described above is supplied to the output circuit 303. Then, the output circuit 303 outputs first area data AR that becomes active when each pixel is inside the area surrounded by the -th area color in synchronization with the reading scan.
DTI, second area data ARDT2 that becomes active when it is inside the area specified by the second area color, and out-of-area data AROUT that becomes active when it is outside each area (each data (1 level) active).

In addition, in FIG. 25, 304 is a timing circuit, and this timing circuit 304 receives a page start signal (P
The connection correction circuit 301, determination circuit 302, and output circuit 30
Timing signals are supplied to each circuit so that the processing at step 3 is performed at the same time as the reading scan +11].

The overall configuration of a circuit for realizing background removal within this designated area is shown in FIG. 28, for example. this is,
In a circuit configuration similar to the circuit shown in FIG. 14, the first area data ARD output from the area recognition circuit 300 is
CPU based on T1, second area data ARD T2, out-of-area data AROUT, and specified input from the user
The area selection signal from the side (not shown) is sent to the background removal circuit 73.
is supplied to.

The concrete configuration of the background removal circuit 73 to which each of these signals is supplied is shown in FIG. 29, for example. This has a selection circuit 97 added to the circuit shown in FIG. This selection circuit 97 determines whether the area designation information based on the designation input from the user matches any of the first area data ARDT1, second area data ARDT2, or out-of-area data AROLIT from the area recognition circuit 300 in the process of reading and scanning. At times, an area selection signal (low level) is output. The output signal of the comparator circuit 94 becomes a switching signal for the multiplexer 95 via an AND gate 98 whose gate is controlled by this region selection signal.

With such a circuit configuration, the AND gate 98 enters the permissive state only for the pixels in the area specified by the user, and
The background removal function described above becomes effective. Therefore, even if there is an area in the same document that does not require background removal, such as a halftone image, it is possible to perform background removal processing only on areas other than that area, making it possible to reproduce images with higher quality. Become.

For specifying the area, please refer to the document-L as described above.
In addition to using the marker M, you can also use the coordinate input device (editor pad) or use the numeric keypad to enter the area coordinates (1
A method of inputting r1 is also possible.

(5) Image forming section This image forming section embodies the image forming means which is a constituent element of Kibenmei.

As described above, the correction/filter circuit 70 and the &i collection/
The processing circuit 100 processes data D and color flags (MCF), including background processing, in various rows.
, 5CF) transmits and receives images to a laser printer 150, fax, etc. via an interface circuit 140.
It is transferred to the image forming unit R'a such as 0. The processing in this image forming device will be explained below using the laser printer 150 as an example. In this case, the entire copying machine is configured as described above.

Based on the above II II data D and color flag 2
The basic configuration of a laser printer 150 for forming color images is shown in FIG. 30, for example. The two-color image forming laser printer shown here uses an electrophotographic method, and forms a 1ilJ image of the main color ring and an image of the sub-color red in one image forming cycle. So-called 1 bus 2 colors (IP2C
) type of copying machine.

In FIG. 30, in order to perform the image forming process around the photosensitive drum 200, there is a band unit 201, a developer 11202 for sub color (red), a developer 203 for main color (black), and a pre-transfer coater 201. 208, Cleaning￥Al
F206 is dispensed, and the exposure position 121f of the subcolor is set before rj of the development 11i1202 for the subcolor.
The main color exposure position Ps is set immediately before the main color developing device 203, and the main color exposure position Pg is set respectively. Regarding the exposure system, the irradiation light from the image-integrating laser diode 161 for the main color is transmitted to the servo motor 16.
3, the polygon mirror 164 and f-θ lens 165 rotate at a constant speed, reflecting! 11167, 168, etc., to reach the exposure position pa+ of the main color, and the irradiation light from the laser diode 160 for including the image I'1m for the sub color is similarly directed to the polygon mirror 164.
And f-theta lens 165, more reflection! [The exposure level is set to reach the sub-color exposure position NFS via an optical system such as 166. Further, a corotron 204 for transfer and a daytack 205 for peeling off the recording sheet are arranged at the transfer position around the photosensitive drum 200, and at this position, the red toner formed on the photosensitive drum 200 by the respective developers 1202 and 203 is removed. The image and the black toner image are transferred all at once onto a recording sheet 210 that is conveyed from a paper feeding system. The recording sheet 210 on which the image has been transferred is further fixed in a fixing device 207 and then discharged onto, for example, a tray.

On the other hand, the laser diode 160 for writing the image Wi.
The control system of 161 is as follows.

The f:Ja data [)m and the color flag CF are supplied pixel by pixel via the image processing system interface circuit 140 described above, and the color flag CF1 . : A switching circuit 151 is provided which separates main color density data Dm (black density) and sub color density Ds (red density) based on the color density. In addition, in the above processing section, the color flag is divided into a main color flag MCF and a sub color flag SC.
However, the switching circuit 151
The color flag CF provided for is changed by the interface circuit 140 into a 1-bit configuration representing sub colors and other colors. Specifically, the sub color flag S
Only the CF is transferred from the interface circuit 140 to the subsequent stage. That is, the pixels in the fffjl area are treated as being included in the main color area, and the color flag CF that controls this switching circuit 151 is at low level for pixels in the sub color area, and at L level for i[i elements in other areas. I'm trying to make it happen.

A specific configuration of the switching circuit 151 is shown in FIG. 31, for example. That is, depending on the state of the color flag, the output is sent to two systems of input signals (A.

Two selection circuits 171 and 172 are provided to select from B), and the concentration data D is input to the input terminal B of the selection circuit 171 and the input terminal A of the selection circuit II 72, respectively, and the concentration data D is input to the input terminal B of the selection circuit 171 and the input terminal A of the selection circuit II 72, respectively. "O" data is input to the terminal A and the input terminal B on the opposite side of the selection circuit 172, respectively.

These selection circuits 171 and 172 are set to L level $111.
10 manually, and the input signal on the B side is selected by the H level control input, and the color flag C" is the corresponding u1-manpower. Then, one selection circuit 17
The output of 1 is sub color III! rIX data Ds1 The output of the other selection circuit 172 is the main color density data〇-
The image data is configured to be transferred to the subsequent stage in pixel units. In the switching circuit 151 having such a configuration, for pixels in the sub-color area, the corresponding sub-color density data D
s is transferred to the subsequent stage, while for pixels in other areas (main color area and background area), the corresponding main color density data D- is transferred to the subsequent stage.

The main color density data D− and the sub color density data Ds separated by this switching circuit 151 are divided into the main color density data D− and the sub color density data Ds, which are transferred to the first screen generator 15.
2, main color density data D- is input to the second screen generator 153.

Each of the screen generators 152 and 153 converts each density data Da, Ds, which is expressed by 8 bits and 256 gradations and which is transmitted through the switching circuit 151, into a laser diode modulation code for each pixel. Specifically 25
This is to convert the density data D expressed in 6M tone to the laser lighting area of each pixel. For example, as shown in FIG. SP3 is set, and the laser point pair area is determined according to the density data D by the number of divided pixels.

The modulation codes output from the screen generators 152 and 153 are set as shown in Table 2, for example.

Table 2 According to Table 2, it is possible to express W5 degrees in four stages for each pixel, as shown in FIGS. 33(a) to 33(d), for example.

In addition, as mentioned above, when converting the 256WU tone density data D into a four-stage code, the threshold values for each stage are determined based on the color reproduction characteristics (development characteristics) of each color, so that color reproduction faithful to the input density data is achieved. is set so that Therefore, the first screen generator 152 separates w4 based on the color reproduction characteristics of the sub color (red), and the second screen generator 153 separates w4 based on the color reproduction characteristics of the main color (black).
Ia is set.

The sub color modulation code SC from the first screen generator 152 is sent to the main color modulation code MC from the second screen generator 153 via a FIFO memory (first in, first out) 154 for one line.
are the respective corresponding ROs via the gap memory 156.
8 control circuit 155, second ROS tA 11 circuit 157
is being entered. As described above, the gap memory 156 is stored in the sub-color exposure position ffffPs because the sub-color exposure position ffffPs and the main color exposure position PII are separated by one gap Gp on the photosensitive drum 200 due to the arrangement of the respective developers 1N2O2, 203. This is to delay the transfer timing of the main color modulation code by an amount corresponding to the cap Gp in order to align the formation positions of the image and the main color image. Therefore, the gap memory 156
The timing of writing and reading is based on each of the above exposure positions PS,
It is determined by the gap Gp in pm and the rotation speed of the photosensitive drum.

The above-mentioned ROS hJ In [11il path 155['
+77J7- Generates a corresponding system of laser modulation signals based on the modulation code SC, and also generates the polygon mirror 16
A control signal for the servo motor 163 for four rotations is generated. Also, the second ROS mentioned above! , II WJ circuit 157 is -ROS 1lill 111 circuit 155
The laser modulation signal of the corresponding system is generated based on the main color modulation code MC upon receiving a synchronous signal from the main color modulation code MC.

Above-mentioned No.-ROS! , II The motor driver 162 drives the polygon mirror servo motor 163 at a constant speed based on the control signal from the ta11 circuit 155, and
In response to the sub-color modulation signal from the -RO3υ1tl11 circuit 155, the laser driver 158 connects the laser diode 160 for sub-color image 11141.
The second RO3ll+11 is turned on and off.
! Based on the main color modulation signal from the It circuit 157, a laser driver 159 turns on/off the image writing laser diode 161 for the main color.

By turning on/off the main color image writing laser diode 161 and the sub color image writing laser diode 160 as mentioned above,
An electrostatic latent image in a potential state corresponding to each color is formed on the photosensitive drum 200 uniformly charged by 1201, and for each electrostatic m image, red toner is developed by 1a 202 for the sub color, and red toner is developed by 202 for the main color. is the current [1203
A black toner Il image is formed by this. Then, the red and black toner images formed on the photosensitive drum 200 are transferred onto a recording sheet 210 that is held by a paper feeding system, and the recording sheet on which two colors have been reproduced is obtained through image fixation. be discharged.

In addition, in the image formation of the above-mentioned nub collar, FIG. 34 (
A latent image Zl is formed in which the exposed area becomes the image area as shown in a), and this latent image Zl is developed in the developing device 202 under the first developing bias V81 to form a sub-color (red) toner image. T1 is formed. In the above main color image formation, the non-exposed area becomes the image area as shown in FIG. 34(b). 122 is formed, and this latent image Z2 is transferred to the developing machine 2.
At step 03, the toner image Tl of the main color (black) is developed under the second developing bias VB2. Specifically, the polarities of these toner images Tl and T2 are balanced in a pre-transfer corotron 208, and then transferred all at once onto a recording sheet 210 in a transfer corotron 204.

■Summary In the above embodiment, every four times the density level between the absolute white level (WHLEV) and the absolute black level (BLLEV) is sampled, the simple average value thereof is detected as the background level, and the The density is corrected to density "O" and background removal is performed. This makes it possible to perform background removal processing that follows the actual density.

In addition, if a leap loop drawn on a document using a marker is recognized and background removal processing is performed only on the outside or inside of the closed loop area, even if there is a halftone image, etc. in the same document, the background in that part can be removed. By prohibiting the removal process, deterioration in image quality in that area due to the background removal process is prevented.

In the above embodiments, a copying machine that reproduces two colors has been described as an example, but the present invention can be applied to a monochrome copying machine, other image processing devices, and even a full-color reproduction image processing device. Application is also possible.

[Effects of the Invention] As described above, according to the present invention, the background density is detected by averaging for pixels within a predetermined density range in the process of original & S virtual scanning, and the Since the density is corrected to white density, even in real-time processing synchronized with document scanning, background removal processing is performed at a background level that follows the actual document cJ degree state. This allows you to create a manuscript created by cutting and pasting paper with a high background density such as newspaper onto paper with a background ml If that is close to white, or a paper that has a background ml If that is close to white, or a paper with a background that is close to white
Appropriate background removal can be achieved in real-time processing even for originals in which the background density changes locally, such as originals created by cutting and pasting paper sheets.

In addition, by performing the background removal process only on the specified area, it is possible to perform the background removal process more suited to the situation of the document, resulting in higher quality image reproduction.

4.L of the drawing! til$1 explanation FIG. 1 is a block diagram showing the configuration of the present invention, FIG. 2 is a block diagram showing an example of the basic configuration of an image processing apparatus according to the present invention,
3 is a diagram showing an example of the structure of a full color sensor, FIG. 4 is a diagram showing an example of the arrangement of each cell of the full color sensor, FIGS. 5 to 7 are circuit diagrams showing an example of the structure of a sensor interface circuit, and FIG. The figure shows an example of a cell configuration in pixel units.
FIG. 9 is a circuit diagram showing an example of the configuration of the color image information generation circuit;
Figure 0 is a diagram showing the state of discrimination colors in color space, Figure 11 is a diagram showing the relationship between distance 1111r from the origin in color space and saturation C, and Figure 12 is a diagram showing angle θ and hue in color space. H
FIG. 13 is a diagram showing the correspondence between density data and color flags, FIG. 14 is a diagram showing an example of the basic configuration of a circuit related to background removal, and FIG. 15 is a diagram of a data load interface circuit. FIG. 16 is a diagram showing an example of the configuration of the background level detection circuit, FIG. 17 is a timing chart showing the operation of each part, and FIG. A diagram showing the state of the detected background level,
FIG. 19 is a diagram showing a configuration example of a background removal circuit, FIG. 20 is a diagram showing a state of background removal, FIG. 21 is a diagram showing changes in the background level, FIG. 22 is a diagram showing markers for specifying an area, Second
Figure 3 is a diagram showing an example of the basic configuration of an image processing device that performs the function of background processing within a designated area, and Figure 24 is a diagram showing an example of the basic configuration of an image processing device that performs the function of background processing within a specified area.
FIG. 25 is a diagram showing an example of the basic configuration of the area recognition circuit, and FIG.
27 and 27 are diagrams explaining the concept of connection correction, and FIG.
29 is a diagram showing an example of the overall configuration of a circuit for realizing the function of removing background within a specified area. FIG.
Figure 0 is a diagram showing an example of the basic configuration of an electrophotographic two-color printer, Figure 31 is a diagram showing an example of the configuration of a circuit that separates density data using color flags, and Figure 32 is a diagram showing an example of the configuration of a circuit that separates density data using color flags. Figure 33 shows a basic example; Figure 33 shows the relationship between the laser modulation code corresponding to density data and the radar lighting state;
Fig. 34 shows an example of the development characteristics of the main color and one color, and Fig. 35 shows an example of the structure of the fJTt document scanning system. FIG. 6 is a diagram showing how the detected background level is reduced.

[Description of symbols] 1... Mouth; (Drawing 2... Image reading means 3... IIJ image forming means 4... Background density detection means 5.8... Background removal processing 6... Offset Setting means 7...Background reference density creation means 9...Area recognition means 10...Switching means 11...Full color sensor 20...Sensor interface circuit!]0...Color background information generation circuit 70.・・Correction/filter circuit 10 () ・・Edit・Power 0]21 (Circuit 140
...Interface circuit 150...Laser printer 170...Image transmitter/receiver 180...-''Nbuke 300...Area recognition circuit

Claims (4)

[Claims] (1) An image reading means (2) that optically scans the original (1) and reads density information (D) in predetermined pixel units, and based on the density information (D) read by the image reading means (2). The image processing apparatus is equipped with an image forming means (3) for forming an image, and averages the density information of pixels in a predetermined density range on each scanning line to calculate the original background density (
A background density detection means (4) that detects the background density (D^*), and a reading density of each pixel whose density is less than or equal to the detected background density (D^*) each time the background density detection means (4) detects the detected background density (D^*). An image processing apparatus comprising: a background removing means (5) for forcibly correcting the information (D) to a predetermined white density. (2) An image reading means (2) that optically scans the original (1) and reads density information (D) in predetermined pixel units, and based on the density information (D) read by the image reading means (2). an image forming means (3) for forming an image in which the original background density (
A background density detection means (4) for detecting D); an offset setting means (6) for setting an offset amount (δ) of the original background density; The detected original background density (D^*) and offset setting means (
background density creation means (7) that creates document background density information (D_0) based on the offset amount (δ) set in step 6); Image processing characterized by comprising a background removing means (8) for forcibly correcting read density information (D) of pixels having a density equal to or lower than a document background reference density (D_0) to a predetermined white density. Device. (3) An image reading means (2) that optically scans the original (1) and reads density information (D) in predetermined pixel units, and based on the density information (D) read by the image reading means (2). An image processing device (3) for forming an image with a document background density (
A background density detection means (4) for detecting D); and read density information for pixels whose density is less than or equal to the detected background density (D^*) every time detection is performed by the background density detection means (4). (D) forcibly correcting the white density to a predetermined white density, a background removing means (5), an area recognition means (9) for recognizing a specified area (E) on the original (1), and an area recognition means. (9) An image processing apparatus comprising: a switching means (10) for effectively switching the background removing means (5) only for pixels belonging to the area (E) recognized in step (9). (4) An image reading means (2) that optically scans the original (1) and reads density information (D) in predetermined pixel units, and based on the density information (2) read by the image reading means (2). The image processing apparatus is equipped with an image forming means (3) for forming an image, and averages the density information of pixels in a predetermined density range on each scanning line to calculate the original background density (
Detection is performed by the background density detection means (4) for detecting the background density D^*), the offset setting means (6) for setting the offset amount (δ) of the original background density, and the above-mentioned background density detection means (4). The detected original background density (D^*) and offset setting means (
A background density creation means (7) creates original background density information (D^0) based on the offset amount (δ) set in step 6); a background removal means (8) for forcibly correcting the read density information (D) of pixels whose density is lower than the specified original background reference density (D_0) to a predetermined white density; an area recognition means (9) that recognizes the area (E) that has been detected; and an area recognition means (9) that effectively switches the background removal means (8) only for pixels belonging to the area (E) recognized by the area recognition means (9). An image processing device comprising a switching means (10).