JPH03642B2 - - Google Patents

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention relates to a sequence circuit design device for designing and drawing a sequence circuit, and more specifically, when a designed sequence circuit spans multiple drawings, The present invention relates to a sequence circuit design device that automatically performs allocation to a sequence circuit.

[Prior Art] With the rapid development of computers in recent years, automatic design devices that automatically perform designing and drawing in various design fields are being developed. There is a sequence circuit design device for drafting.

By the way, as a sequence circuit, it usually becomes a continuous long circuit diagram according to its control operation, so it is not possible to draw the designed circuit as a single drawing as it is, but it is difficult to draw it as a single drawing in multiple drawings.
This results in configuring two sequence circuits. Therefore, when designing and drawing a sequence circuit using this sequence circuit design device, the circuit diagram drawn in each drawing is a circuit diagram representing a meaningful circuit for each block that constitutes the sequence circuit. It is desirable that

[Problems to be Solved by the Invention] However, with conventional sequence circuit design devices, when dividing one sequence circuit into multiple drawings and drawing them, the circuit is simply divided into predetermined amounts, divided, and drawn. Or, at the time of design, the designer designs the circuit with consideration for dividing it into drawings,
The method used was to draw a diagram for each specified circuit, which resulted in circuit diagrams that were extremely difficult to read, complicated the designer's work, and reduced work efficiency. It occurs. In other words, in the former case, one sequence circuit is simply divided mechanically and each circuit is drawn separately, so the circuits that appear in each drawing are meaningless, and unless you compare each drawing, the meaning of the circuit becomes meaningless. In the latter case, the designer has to consider dividing the circuit into drawings when designing the circuit, which takes time and reduces work efficiency. If a problem arises, or if a circuit is added or changed, it may no longer fit in the original drawing, or a blank drawing may be created, resulting in an unorganized drawing.
A problem arises in that the changed sequence circuit must be re-divided for each drawing.

Therefore, the present invention provides circuit information for each minimum unit circuit of a sequence circuit, so that the circuit can be designed without considering the drawing at the time of circuit design, and each drawing has a meaning. The purpose of this invention is to provide a sequence circuit design device that can be used as a circuit diagram and also allows for easy circuit changes.

[Means for Solving the Problems] The configuration of the present invention as a means for achieving the above object and solving the above problems is as shown in the block diagram of FIG. circuit information input means M1 for inputting the sequence circuit information as information; circuit information division means M2 for dividing the sequence circuit information in order to allocate the sequence circuit to a plurality of drawings; and creating drawings based on the divided sequence circuit information. A sequence circuit design apparatus comprising: a drafting means M3;
A circuit division information adding means M4 for giving model division information used when dividing a circuit; a circuit division information changing means M5 for arbitrarily changing the circuit division information; and a circuit division information changing means M5 for changing the circuit division information as desired; The gist of the present invention is a sequence circuit design device characterized by comprising: drawing allocation means M6 for dividing circuit information and allocating it to a plurality of drawings.

[Example] Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a schematic diagram showing the structure of the sequential circuit design apparatus of this embodiment in units of functional blocks and also showing the flow of data.

In the figure, 1 is a processing control section, 2 is a circuit design section,
3 is a circuit information processing unit, 4 is a drawing layout processing unit,
5 represents a drawing list output section, and 6 represents a drafting section.

Here, the processing control section 1 has a function of comprehensively controlling each of the sections 2 to 6 above, and this processing control section 1
The operation is executed by specifying each of the above parts in . Further, the circuit design section 2 executes the process of creating a sequence circuit according to the designer's operation, and the sequence circuit designed by the circuit design section 2 is printed on a paper roll as shown in FIG. As circuit diagram data 9 arranged in order, the circuit names are given and stored in the circuit diagram data file 10. Further, the circuit information processing unit 3 processes the layout state of the circuit diagram data 9 designed by the circuit design unit 2 and stored in the circuit diagram data file 10.
It is converted into circuit group data 11 consisting of the circuit configuration data of the minimum unit circuit and circuit division information, and stored in the circuit design data file 12 along with the circuit name, and this circuit group data 11 can be arbitrarily changed by the designer. It has a function and includes the circuit division information adding means M4 and the circuit division information changing means M5. Further, the drawing allocation processing unit 6 divides the sequence circuit into drawings based on the circuit group data 11, creates layout list data 13 and drawing data 14, and stores each data in a circuit design data file 12 and a drawing data file, respectively. 1
5, and the drawing allocation means M6
This includes: The drawing list output section 5 outputs the layout list data 13 stored in the circuit design data file 12 using a printer or the like, and the drawing section 6 outputs the layout list data 13 stored in the circuit design data file 12.
Based on the drawing data 14 stored in 5, a sequence circuit diagram divided into drawings as shown in FIG. 4 is drawn using an X-Y plotter or the like. The above-mentioned minimum unit circuits are, for example, A, B, and B in Fig. 3.
C. This refers to one circuit constituting the sequence circuit shown in . . . The circuit group data 11 is, as shown in FIG. The circuit information includes circuit division information used when the drawing allocation processing unit 4 divides the sequence circuit into each drawing, the circuit number of the circuit, and the next circuit number.

Next, FIG. 6 is a flowchart for explaining the operation of the circuit information processing section 3.

As shown in the figure, in the circuit information processing section 3, when the designer first specifies a desired circuit name in step 101, processing is started, and in step 102, the circuit diagram data 9 of the specified circuit name is converted into a circuit diagram. It is determined whether or not it is stored in the data file 10. If it is determined that the circuit diagram data 9 with this circuit name is not in the circuit diagram data file 10, this means that this circuit has not been designed yet, so it is determined that this is an input error on the part of the designer, and step 107, which will be described later, is performed.
to move to.

On the other hand, if the circuit diagram data 9 with the specified circuit name is found, the process moves to the following step 103, and the circuit diagram data 9 with this circuit name is saved in the circuit diagram data file 1.
0, and if circuit group data 11 with the same circuit name is stored in the circuit design data file 12, that circuit group data 11 is also called. Then, proceeding to step 104, for each minimum unit circuit constituting the circuit diagram data 9,
It is determined whether there is circuit group data 11 having the same circuit configuration data. Here this step 10
Processing 4 is performed when the circuit diagram data 9 with the specified circuit name has already been converted into circuit group data 11, and the circuit diagram data 9 is changed again by the designer in the circuit design department 2, or when the circuit diagram data 9 with the specified circuit name is changed again by the designer. Group data 1
When changing the circuit division information in step 1, the circuit diagram data 9 and the circuit group data 11 have minimum unit circuits with the same configuration. This is to prevent step 105 from being executed because it is determined that it is not necessary to execute it, and it is determined in step 104 that circuit configuration data identical to the minimum unit circuit of circuit diagram data 9 exists in circuit group data 11. If so, the process moves to step 106; otherwise, the process moves to the next step 105.

In step 105, circuit information creation/writing processing is executed as described above, but this processing is performed by writing circuit configuration data and circuit division information for each minimum unit circuit of the circuit diagram data 9 as shown in FIG. Create the circuit group data 11 by assigning the circuit number.
When converted to , it executes the following.
Specifically, electronic components such as coils and capacitors constituting the minimum unit circuit are created as circuit configuration data consisting of predetermined symbols or numbers, and circuit division information is obtained from the circuit diagram data 9 as shown in FIG. 20 is created and stored in the circuit design data file 12 as the circuit group data 11. As shown in FIG. 7, the circuit division information 20 includes information 2 representing the type of the minimum unit circuit.
1, and a first circuit flag 22 indicating whether or not the minimum unit circuit becomes the first circuit when creating a drawing.
and empty page information 23 indicating how many blank drawings to create after the drawing of this circuit.
There is an eighth circuit between this circuit and the previous minimum unit circuit.
Between the empty space information 24 indicating how much empty space S there is as shown in Figure A and the next circuit, there is an empty card C of the input/output card as shown in Figure 8 B.
Empty card 2 showing how much you need to take
5 information and the next circuit, there is empty line information 26 indicating how many empty lines L are present as shown in FIG. Empty card and empty line information 21, 24, 25 and 26 are created based on the circuit diagram data 9, and the leading circuit flag and empty page information 22 and 23 are set to zero.

Next, in step 106, the circuit diagram data 9
The above step 104 is performed for all the minimum unit circuits of
It is determined whether or not the above process has been executed, and if there is still a minimum unit circuit remaining, the process moves to step 104 to execute step 104 for the next circuit.

On the other hand, if it is determined in step 106 that the process of step 104 has been executed for all the minimum unit circuits, the process moves to the following step 107, where changes are made in the circuit group data 11 stored in the circuit design data file 12. Desired circuit group data 1
It is determined whether or not there is a 1, and if there is no 1, this circuit information processing is directly terminated. Note that the process in step 107 is executed according to the designer's instructions.

Next, if it is determined in step 107 that there is circuit group data 11 to be changed, the process moves to the following step 108, where the circuit name of the circuit group data 11 that is not to be changed is inputted, and at the same time, the process proceeds to step 109.
The circuit group data 11 is called at step 110.

In step 110, the above step 108 is performed.
The circuit group data 11 with the circuit name specified in step 1 is stored in the circuit design data file 12, and in step 109, the circuit group data 11 is stored in step 1.
09, it is determined whether or not it has been called. Then, the specified circuit group data 11 does not exist in the circuit design data file 12, and step 109 is performed.
If the call cannot be made in step 111, the designer is asked whether or not to call another circuit name from the circuit group data 11, and if the call is to be repeated, the process returns to step 108 to confirm. If not, this circuit information processing is immediately terminated.

Next, when it is determined in step 110 that the specified circuit group data is present in the circuit design data file 12, the process moves to step 112, and the designer is asked to input the circuit division information of the circuit group data 11 to be changed. Then, the process proceeds to step 113, where the circuit division information of the circuit group data 11 stored in the circuit design data file 12 is changed, and the process proceeds to step 1.
11. Note that the circuit division information that can be changed in step 112 is all information other than the circuit type 21 among the circuit division information 20 shown in FIG. All you have to do is set the circuit flag 22 to 1.
Furthermore, if it is desired to provide a blank drawing after one drawing is created, the number of pages can be inputted into the empty page information 23.

In this way, the circuit information processing unit 3 can store the designed circuit diagram data 9 as the circuit group data 11 in the circuit design data file 12, or can change the circuit group data 11 once stored. Now, based on the circuit group data 11, the operation of the drawing layout processing section 6 which divides the sequence circuit into drawings and creates the layout list data 13 and the drawing data 14 will be explained.

As shown in FIG. 9, the operation of the drawing layout processing section 6 is executed by the designer inputting the circuit name of the circuit group data 11 to which the designer wants to perform the drawing layout in step 200, and in step 201 The designated circuit group data 11 is called from the circuit design data file 12. And step 2
02, it is determined whether the circuit group data 11 exists in the circuit design data file 12,
In other words, it is determined in step 201 whether or not the specified circuit group data 11 could be called.
If the designated circuit group data 11 does not exist in the circuit design data file 12, the drawing allocation process is immediately terminated.

On the other hand, if the specified circuit group data 11 exists in the circuit design data file 12, the next step 20
In step 3, the designer is asked to input whether or not to execute drawing layout, and in step 204, the designer confirms this. If it is confirmed in step 204 that the process will not be executed, the drawing layout process is immediately terminated, whereas if it is confirmed that the process is to be executed, the process moves to the next step 205.

Then, in step 205, if there is a minimum unit circuit that must be paired on the drawing in the circuit group data 11 called in step 201, the designer inputs that circuit, and the designer inputs the circuit in step 205.
In Step 6, the page of the drawing from which to start drawing this circuit group data, ie, the first page, is input, and in Step 207, drawing layout is executed and the present drawing layout processing is completed.

Next, drawing layout in step 207 will be explained in detail based on FIGS. 10 to 13.

As shown in FIG. 10, in step 211, this process first calculates the number of empty pages by subtracting "1" from the value of the first page input in step 206. Then, the process moves to step 212. And step 21
In step 2, empty page processing as shown in FIG. 11 described later is executed based on this number of empty pages, and the next step 21
Move to 3.

In step 213, the drawing data 14 and layout list data 13 out of the circuit group data 11 are
Read the circuit information of the first minimum unit circuit that has not been created, and proceed to the next step 214 and step 21.
5, the page change process shown in FIG. 12 and the empty information and circuit configuration data process shown in FIG. 13 are executed, and the process moves to step 216. and step 216
Then, it is determined whether or not there is any circuit information in the circuit group data 11 for which the processing in steps 212 to 215 has not been performed, and if so, the process moves to step 212 again, and if not, the process ends.

Next, the empty page processing executed in step 212 is first executed in step 22, as shown in FIG.
At step 1, it is determined whether the number of empty pages calculated at step 211 is "0".
If the number of empty pages is "0", that is, if the designer specifies in step 206 that the sequence circuit is to be drawn from the first page of the drawing, the empty page process is immediately terminated; If the number is not "0", step 222
Then, drawing data 14 and layout list data 13 for the number of empty pages are created. Note that the drawing data 14 and layout list data 13 created here are for creating blank pages as many as the number of empty pages, and are used to create the same number of blank pages as the number of blank pages.
No circuit information is input at all, and only figure numbers, page numbers, or predetermined data used to create drawing frames are created. And the created layout list data 1
3 and drawing data 14 are stored in a circuit design data file 12 and a drawing data file 15, respectively.

Next, in the page change process executed in step 214, as shown in FIG. Determine whether it is set. If the head circuit flag is not set, the process moves to the next step 232, and the circuit type of the minimum unit circuit read in step 213 during the previous process is matched with the circuit type of the minimum unit circuit read this time. It is determined whether or not they match, and if they match, the process moves to the subsequent step 233.

In step 233, the circuit configuration data of the minimum unit circuit is checked and the common line, that is, the left and right signal lines in the circuit configuration data shown in FIG. 5 are connected to the previously read minimum unit circuit.
Determine whether the common line has been changed. If there is no change to this common line and it is connected to the previous minimum unit circuit, then step 23 follows.
4, add up the number of circuit lines, empty spaces, empty cards, and empty lines in the circuit information of the minimum unit circuit input since the page of the previous drawing was changed, and proceed to the next step. At step 235, it is determined whether the value is a value that can be drawn on one drawing. If the above-mentioned total value is a value that can be drawn, the process is immediately terminated.

On the other hand, if it is determined in step 231 that the first circuit flag is set, if it is determined in step 232 that there has been a change in the type of circuit, it is determined in step 233 that there has been a change in the common line. or if it is determined in step 235 that the total number of lines of circuit information input since the last drawing page was changed exceeds the value that can be drawn per drawing. A new page is created in the drawing data 14 and layout list data 13 in order to create a new page with the minimum unit circuit as the first circuit of the next drawing.

Here, step 234 and step 235 described above are performed.
This process is to ensure that the total number of lines of the minimum unit circuit read since the previous page of the drawing was updated does not exceed the number of lines that can be drawn per drawing. The number of lines in a circuit is the number of lines in the parallel part in the circuit diagram of one minimum unit circuit. For example, as in the circuit configuration data of the circuit number shown in Figure 5, there are two lines in the minimum unit circuit. If there are parallel components, the number of lines will be two. In steps 234 and 235, for example, the number of lines of the minimum unit circuit read this time is 3, the total number of lines read so far after changing the page of the drawing is 18, and the number of lines that can be drawn in the drawing is If it is 20, even if the remaining two lines can be drawn, those parts will be left blank and the minimal unit circuit read this time will be processed as the first circuit of the next new drawing. In other words, this prevents the possibility that if one minimum unit circuit is simply divided by the number of lines that can be drawn, the meaning of the circuit will be lost, resulting in a circuit diagram that is extremely difficult to read.

Next, as shown in FIG. 13, the blank information and circuit configuration data processing executed in step 215 is first performed in step 241.
In the circuit information of the minimum unit circuit read in step 3, it is determined whether the number of empty spaces is "0" or not. If the number of empty spaces is not "0", the process moves to the subsequent step 242, and an empty space is created in the drawing data 14 and layout list data 13 by the amount of this empty space.

Next, if it is determined in step 241 that the number of empty spaces is not "0", or if empty spaces are created in the drawing data 14 and layout list data 13 in step 242, the process moves to the following step 243. Next, layout list data 13 and drawing data 14 are created based on the circuit configuration data in the circuit information of the minimum unit circuit, and the process moves to the following step 244.

In step 244, it is determined whether the number of empty cards is "0" in the circuit information of the minimum unit circuit. If the number of empty cards is not "0", the process moves to step 245, and empty cards corresponding to the number of empty cards are created in the drawing data and layout list data.

If it is determined in step 244 that the number of empty cards is "0", or in step 245
Step 246 continues if the process has been executed.
Next, it is determined whether the number of empty lines is "0" in the circuit information of the minimum unit circuit. If the number of empty lines is "0", the main empty information and circuit configuration data processing is immediately terminated; on the other hand, if the number of empty lines is not "0", the process proceeds to step 247, and the processing is performed for the number of empty lines. only drawing data 14 and layout list data 1
3, create an empty line and end this process.

Here, the steps 242, 243, 245,
The drawing data 14 and layout list data 13 created in step 247 are written to predetermined pages of the drawing data file 15 and the circuit design file 12 each time. Further, as the created layout list data 13, for example, the first
As shown in FIG. 4, circuit information is sequentially written for each page, and this data can be output by the drawing list output section 5. Therefore, by looking at this data, the designer can know the layout state of the circuit diagram for each drawing.

As explained above, in the sequence circuit design apparatus of this embodiment, the circuit information processing section 3 analyzes the sequence circuit designed by the circuit design section 2 and stored in the circuit diagram data file 10 for each minimum unit circuit. In addition to creating the circuit group data 11, the circuit division information can be easily changed in the circuit information processing section 3 even after the circuit is designed. When allocating sequence circuits to each drawing, the 12th
Through the page change process shown in the figure, based on the circuit division information and circuit configuration data, one minimum unit circuit is allocated so that it will not be divided, and if the circuit type is different or the common line is changed. If so, I create a new drawing.

Therefore, each circuit diagram created can be meaningful and easy to understand. In addition, the designer does not need to consider the layout of drawings when designing the circuit, and one sequence circuit can be continuously created, thereby improving work efficiency. Furthermore, the layout list data can be outputted by the drawing list output section 5, and the circuit division information can also be easily changed by the circuit information processing section 13. Changes can be made more easily, and there is no need to draw the drawing each time and then make changes.

[Effects of the Invention] As detailed above, in the sequence circuit design device of the present invention, the designed sequence circuit is analyzed, circuit division information is created for each minimum unit circuit, and the circuit division information can be easily changed. When the sequence circuit is allocated to a plurality of drawings, the sequence circuit is divided based on the circuit division information and allocated to the drawings.

Therefore, when dividing a sequence circuit, it is executed for each minimum unit circuit, so it is not divided within the minimum unit circuit, and the designer has to take drawing layout into consideration when designing, as in the past. Each drawing can be made meaningful without any work, and work efficiency can be improved. Further, since the circuit division information can be easily changed after creating the sequence circuit, the work efficiency can be further improved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the present invention, and FIGS. 2 to 14 show an embodiment of the present invention.
FIG. 2 is a schematic configuration diagram showing the sequence circuit design apparatus of this embodiment, FIG. 3 is an explanatory diagram showing circuit diagram data 9, FIG. 4 is an explanatory diagram showing a drawing in which the sequence circuit is drawn, and FIG. is circuit group data 11
FIG. 6 is a flowchart showing the operation of the circuit information processing unit 3. FIG. 7 is an explanation of the circuit division information creation operation executed in the circuit information creation writing process of step 105 in FIG. 6. Explanatory diagram, Figure 8 A shows empty lines and empty spaces.
Figure 9 is an explanatory diagram for explaining empty cards, Figure 9 is a flowchart representing the operation of the drawing allocation processing section 4, Figure 10 is a flowchart representing the processing of step 207 shown in Figure 9, and Figure 11 is a flowchart representing the operation of step 207 shown in Figure 9. 10 is a flowchart showing empty page processing in step 212, FIG. 12 is a flowchart showing page change processing in step 214 shown in FIG. 10, and FIG. 13 is a flowchart showing empty page processing in step 215 shown in FIG. Flowchart showing circuit configuration data processing, FIG. 14 is layout list data 13
FIG. M1...Circuit information input means, M2...Circuit information division means, M3...Drawing means, M4...Circuit division information providing means, M5...Circuit division information changing means,
M6... Drawing layout means, 3... Circuit information processing unit, 4... Drawing layout processing unit, 9... Circuit diagram data, 11... Circuit group data, 13... Layout list data, 14... Drawing data.

Claims (1)

[Claims] 1. Circuit information input means for inputting a designed sequence circuit as sequence circuit information; Circuit information division means for dividing the sequence circuit information in order to allocate the sequence circuit to a plurality of drawings; a drafting means for creating a drawing based on the sequential circuit information, wherein the circuit information dividing means analyzes the sequence circuit information and divides the minimum number of the sequence circuit information. For each unit circuit information,
circuit division information providing means for providing circuit division information used in dividing a circuit; circuit division information changing means for arbitrarily changing the circuit division information; and said sequence circuit information based on said circuit division information. A sequence circuit design device comprising: drawing allocation means for dividing and allocating the divided drawings into multiple drawings;