JPH0363944U - - Google Patents
Info
- Publication number
- JPH0363944U JPH0363944U JP12545289U JP12545289U JPH0363944U JP H0363944 U JPH0363944 U JP H0363944U JP 12545289 U JP12545289 U JP 12545289U JP 12545289 U JP12545289 U JP 12545289U JP H0363944 U JPH0363944 U JP H0363944U
- Authority
- JP
- Japan
- Prior art keywords
- package
- external connection
- large number
- connection terminals
- semiconductor devices
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12545289U JPH0363944U (US07922777-20110412-C00004.png) | 1989-10-26 | 1989-10-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12545289U JPH0363944U (US07922777-20110412-C00004.png) | 1989-10-26 | 1989-10-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0363944U true JPH0363944U (US07922777-20110412-C00004.png) | 1991-06-21 |
Family
ID=31673322
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12545289U Pending JPH0363944U (US07922777-20110412-C00004.png) | 1989-10-26 | 1989-10-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0363944U (US07922777-20110412-C00004.png) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011160009A (ja) * | 1996-03-28 | 2011-08-18 | Intel Corp | 基板とこの基板の第１の面に搭載される集積回路ダイとの間の熱膨張差による応力を低減する方法 |
| JP2018093230A (ja) * | 2018-03-05 | 2018-06-14 | 東芝メモリ株式会社 | ストレージ装置、及び電子機器 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59151443A (ja) * | 1983-02-17 | 1984-08-29 | Fujitsu Ltd | 半導体装置 |
-
1989
- 1989-10-26 JP JP12545289U patent/JPH0363944U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59151443A (ja) * | 1983-02-17 | 1984-08-29 | Fujitsu Ltd | 半導体装置 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2011160009A (ja) * | 1996-03-28 | 2011-08-18 | Intel Corp | 基板とこの基板の第１の面に搭載される集積回路ダイとの間の熱膨張差による応力を低減する方法 |
| JP2018093230A (ja) * | 2018-03-05 | 2018-06-14 | 東芝メモリ株式会社 | ストレージ装置、及び電子機器 |
