JPH036342U

JPH036342U -

Info

Publication number: JPH036342U
Application number: JP1989065807U
Authority: JP
Priority date: 1989-06-07
Filing date: 1989-06-07
Publication date: 1991-01-22

Description

[Brief explanation of the drawing]

第１図乃至第３図はこの考案に係るトランシー
バのメモリ装置の実施例を示し、第１図はトラン
シーバのブロツク図、第２図はメモリ装置の構成
を示す図、第３図はこのトランシーバを制御する
マイクロコンピユータの要部のフローチヤートで
ある。主な符号の説明、１……トランシーバの本体、
２……受信用のＶＦＯ、３……送信用のＶＦＯ、
４……送受切換スイツチ、５……マイクロコンピ
ユータ、６……ＲＡＭ、６Ａ……第１のメモリエ
リア、６Ｂ……第２のメモリエリア、６Ｃ……第
３のメモリエリア、７……メモリスイツチ、８…
…呼び出しスイツチ、９……スプリツトスイツチ
、１０……表示器。 1 to 3 show an embodiment of the memory device of the transceiver according to this invention, FIG. 1 is a block diagram of the transceiver, FIG. 2 is a diagram showing the configuration of the memory device, and FIG. 3 is a diagram showing the structure of the transceiver. This is a flowchart of the main parts of the controlling microcomputer. Explanation of main symbols, 1... Body of transceiver,
2...VFO for reception, 3...VFO for transmission,
4... Transmission/reception selector switch, 5... Microcomputer, 6... RAM, 6A... First memory area, 6B... Second memory area, 6C... Third memory area, 7... Memory switch , 8...
...Call switch, 9...Split switch, 10...Display device.

Claims

[Claim for Utility Model Registration] In a transceiver that enables simplex communication and split communication, data areas of all memory channels on a memory device are divided into a first memory area that stores reception frequencies and a first memory area that stores transmission frequencies. a second memory area for storing data, and a third memory area for storing data identifying whether the communication is split communication or simplex communication.
1. A transceiver memory device comprising: a memory area;