JPH0350338U - - Google Patents

Info

Publication number
JPH0350338U
JPH0350338U JP1989110098U JP11009889U JPH0350338U JP H0350338 U JPH0350338 U JP H0350338U JP 1989110098 U JP1989110098 U JP 1989110098U JP 11009889 U JP11009889 U JP 11009889U JP H0350338 U JPH0350338 U JP H0350338U
Authority
JP
Japan
Prior art keywords
semiconductor device
substrate
mounted semiconductor
view
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1989110098U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1989110098U priority Critical patent/JPH0350338U/ja
Publication of JPH0350338U publication Critical patent/JPH0350338U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP1989110098U 1989-09-20 1989-09-20 Pending JPH0350338U (US20110232667A1-20110929-C00004.png)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1989110098U JPH0350338U (US20110232667A1-20110929-C00004.png) 1989-09-20 1989-09-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1989110098U JPH0350338U (US20110232667A1-20110929-C00004.png) 1989-09-20 1989-09-20

Publications (1)

Publication Number Publication Date
JPH0350338U true JPH0350338U (US20110232667A1-20110929-C00004.png) 1991-05-16

Family

ID=31658650

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1989110098U Pending JPH0350338U (US20110232667A1-20110929-C00004.png) 1989-09-20 1989-09-20

Country Status (1)

Country Link
JP (1) JPH0350338U (US20110232667A1-20110929-C00004.png)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11163409A (ja) * 1997-12-01 1999-06-18 Matsushita Electron Corp 発光装置
JP2004014857A (ja) * 2002-06-07 2004-01-15 Stanley Electric Co Ltd チップタイプ光半導体素子
JP2016015356A (ja) * 2014-06-30 2016-01-28 日亜化学工業株式会社 発光装置及びその製造方法
JP2016086047A (ja) * 2014-10-24 2016-05-19 日亜化学工業株式会社 発光装置の製造方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134040A (ja) * 1984-12-04 1986-06-21 Fuji Dengiyou Kk 半導体素子の製法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61134040A (ja) * 1984-12-04 1986-06-21 Fuji Dengiyou Kk 半導体素子の製法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11163409A (ja) * 1997-12-01 1999-06-18 Matsushita Electron Corp 発光装置
JP2004014857A (ja) * 2002-06-07 2004-01-15 Stanley Electric Co Ltd チップタイプ光半導体素子
JP2016015356A (ja) * 2014-06-30 2016-01-28 日亜化学工業株式会社 発光装置及びその製造方法
JP2016086047A (ja) * 2014-10-24 2016-05-19 日亜化学工業株式会社 発光装置の製造方法

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