JPH035018Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a motor control device.
In particular, the present invention relates to a motor control device that can obtain normal rotation according to a synchronization signal recorded on a disk.

If the digital signal is CLV (Constant Linear)
Digital audio disk (DAD) that uses a disk recorded using Velocity (constant linear velocity) method
system is proposed. In the case of CLV method,
The rotational speed of the disk must be changed depending on the position of the pick-up, but in current DAD systems, a synchronization signal is recorded on the disk along with the information signal, and the frequency is kept constant by detecting the synchronization signal. It controls the rotation of various motors.

Incidentally, the applicant of the present invention has previously filed an application for a motor control device as shown in FIG. 1, which is suitable for controlling the rotation of a DAD system using the CLV method. In FIG. 1, 1 is an input terminal to which an input signal consisting of a pulse train of a sync signal and an information signal detected from the disk is applied; 2 is a sync signal extraction circuit for extracting only the sync signal from the input signal; 3 4 is a first signal generating section that generates a proportional control signal according to the frequency of the synchronous signal obtained from the synchronous signal extracting circuit 2, and 4 is connected to the output of the synchronous signal extracting circuit 2 and shapes the waveform of the output. A monostable multivibrator, 5 a second signal generator that generates a phase control signal according to the output signal of the monostable multivibrator 4, 6 a motor, 7 a drive circuit for driving the motor 6, 8 a The drive circuit 7 includes the first signal generating section 3 or the second signal generating section 5.
and a switch control circuit 9 for controlling the state of the changeover switch 8 according to the state of the first signal generating section 3.

Therefore, the operation of the circuit shown in FIG. 1 is as follows. That is, immediately after the motor is started when the disk rotation is not normal, the electronic governor disposed in the drive circuit 7 operates to increase the rotation of the motor 6 to the first predetermined rotation speed. When the motor 6 reaches a first predetermined rotation speed, a synchronizing signal is obtained from the synchronizing signal extracting circuit 2, and a proportional control signal corresponding to the frequency of the pulse train of the synchronizing signal is transmitted to the first signal generating section 3. The proportional control signal is applied to the drive circuit 7, and the motor 6
is now proportionally controlled, and its rotation increases to a second predetermined rotation speed.

When the rotation of the motor 6 reaches the second rotation speed, the switch control circuit 9 is activated and the changeover switch 8 is placed in a state opposite to that shown in the figure. Therefore, after the rotation of the motor 6 reaches the second rotation speed, the output of the synchronizing signal extracting circuit 2 is passed through the monostable multivibrator 4 and then applied to the second signal generating section 5. The phase control signal obtained from the second signal generator 5 is applied to the drive circuit 7 via the changeover switch 8, and the motor 6 rotates under phase control. The circuit in Figure 1 is
The synchronizing signal extracting circuit 2 in FIG. 1 is suitable for normally rotating a disk recorded in the CLV system, and has a configuration as shown in FIG. 2. That is, the synchronization extraction circuit 2
The first detection circuit 11 detects the rising edge of the input signal applied to the input terminal 10, the first conversion circuit 12 converts the output pulse of the first detection circuit 11 into a voltage, and the first conversion circuit a first peak passing circuit 13 that passes the peaks of the output voltages of the 12 output voltages;
The first interface circuit 14 and the input terminal 10
a second detection circuit 15 that detects a falling edge of an input signal applied to the second detection circuit 15; a second conversion circuit 16 that converts the output pulse of the second detection circuit 15 into a voltage; and an output voltage of the second conversion circuit 16. a second peak passing circuit 17 for passing the peak of , a second interface circuit 18 , and an adder circuit 19 for adding the output signal of the first interface circuit 14 and the output signal of the second interface circuit 18 . It generates a pulse at the output terminal 20 according to the synchronizing signal. Then, the output terminal 2
Phase control of the motor 6 is performed using pulses corresponding to the synchronization signal obtained at 0, and proportional control of the motor 6 is performed using a signal obtained from the peak passing circuit 13 in the synchronization signal extracting circuit 2. has been made.

The present invention proposes a circuit configuration that is particularly effective for use in the above-mentioned peak-pass circuit 13, and will be described below based on embodiments with reference to the drawings. FIG. 3 shows an embodiment of the present invention.
21 is an input terminal connected to the first detection circuit 12 of FIG. 2; 22 is a transistor whose base is connected to the input terminal 21 via a resistor 23 and whose collector is connected to the power supply (+Vcc) via a resistor 24; 25 is a capacitor connected between the emitter of the transistor 22 and the ground, 26 is a discharge resistor of the capacitor 25, and 27 is a capacitor connected to the first interface circuit 14 from which a pulse according to the synchronization signal is obtained. 1 output terminal and 28 are second output terminals for supplying the terminal voltage of the capacitor 25 to the first signal generating section 3 for generating a proportional control signal.

The input terminal 21 has signals from the first detection circuit 12 to the fourth detection circuit 12.
A signal as shown in Figure A is applied. In FIG. 4A, voltages A to E represent synchronizing signals, and the others represent voltages representing information signals. When a signal as shown in FIG. 4A is applied to the input terminal 21 in FIG. 3, a signal as shown in FIG. 4C is applied to the first output terminal 27 connected to the collector of the transistor 22. Further, the transistor 22
The fourth output terminal is connected to the second output terminal 28 connected to the emitter of
A signal as shown in Figure B is generated. For example, voltage A
is applied to the input terminal 21, the transistor 2
2 is turned on, the capacitor 25 is charged to a value corresponding to the voltage A, and then the capacitor 25 and the discharge resistor 2 having a large resistance value (for example, 1 MΩ) are connected.
It is discharged according to the discharge time constant determined by 6 and 6. Therefore, the output voltage obtained at the second output terminal 28 is as shown in FIG. and C) includes the second
As the voltage available at the output terminal 28 also increases and the motor 6 rotates faster and the disk rotates faster, the voltage corresponding to the synchronization signal becomes lower and the voltage available at the second output terminal 28 (for example D and E) becomes higher. The voltage applied will be lower. Therefore, since the voltage obtained at the second output terminal 28 corresponds to the rotation of the disk, it is necessary to apply the voltage obtained at the second output terminal 28 to the first signal generating section 3 for proportional control. For example, proportional control of the motor 6 can be performed. Incidentally, the first signal generating section 3 is provided with a detecting means to detect the voltage level of the signal applied to the first signal generating section 3 from the second output terminal 28, and the voltage level is set to a predetermined value (for example, If the switch control circuit 9 is driven when the voltage drops to 4V), the switch control circuit 9 is activated and the changeover switch 8 is switched.
Transition from proportional control state to phase control state.

On the other hand, when a voltage as shown in FIG. 4A is applied to the input terminal 21, the voltage (A,
B, C, D, and E), transistor 22 turns on each time it is applied. Therefore, the collector voltage of the transistor 22 decreases to the emitter voltage of the transistor 22 every time a voltage corresponding to the synchronization signal is applied. Therefore, an output pulse as shown in FIG. 4C is obtained at the first output terminal 27,
The signals are applied to the interface circuit 14, added by the adder circuit 19, and used for phase control.

As described above, according to the present invention, by devising the circuit configuration of the peak passing circuit of the synchronous signal extracting circuit, the peak passing circuit can also be used as a circuit for obtaining signals for proportional control of the motor. Since it is made available for use, it is possible to achieve simplification by sharing the circuit, and it is a practical device that can perform proportional control of the motor with a simple circuit.

[Brief explanation of drawings]

Fig. 1 is a circuit block diagram for explaining the present invention, Fig. 2 is a circuit block diagram showing its synchronization extraction circuit, Fig. 3 is a circuit diagram showing an embodiment of the present invention, and Fig. 4 is a circuit block diagram showing the synchronization extraction circuit thereof. It is a characteristic diagram for explaining the present invention. Explanation of main drawing numbers, 2... Synchronous signal extraction circuit, 13... First peak passing circuit, 22... Transistor, 25... Capacitor, 26... Discharging resistor.

Claims (1)

[Scope of utility model registration request] A motor control device for rotating the disk so that a synchronization signal detected from the disk has a predetermined frequency, and a first control means for proportionally controlling the motor using the synchronization signal. ,
a second control means for controlling the phase of the motor using the synchronization signal; a changeover switch that switches between the first control means and the second control means and connects them to a drive circuit of the motor; and detection means for detecting the synchronization signal, the detection means comprising:
A transistor with an input terminal connected to the base,
circuit means for extracting only a synchronizing signal from an applied input signal and generating it at the collector of the transistor; The second control means is operated using a signal generated at the collector of the transistor constituting the circuit means to control the phase of the motor, and the emitter voltage of the transistor is used to control the phase of the motor. A motor control device characterized in that it operates to perform proportional control of the motor.