JPH0348564B2 - - Google Patents

Description

Detailed Description of the Invention (Technical Field of the Invention) The present invention relates to a magnetic recording device that can automatically set the optimum recording bias current, optimum recording level, and optimum recording equalizer characteristics for a magnetic tape having any characteristics. This invention relates to a playback device, in particular, one in which the recording bias current is automatically adjusted under the control of a microprocessor.

(Prior art) There are various types of magnetic tapes used in magnetic recording and reproducing devices, such as L/H tape, chrome tape, and metal tape, and magnetic recording and reproducing devices are usually adjusted using the standard magnetic tape for each type. However, there are large differences in characteristics even among magnetic tapes of the same type, and it is difficult to set all the recording characteristics optimally for these various magnetic tapes.

Therefore, in order to optimally set the recording characteristics according to various magnetic tapes, a magnetic recording/playback device that automatically adjusts the recording bias current has been known, for example, as seen in Japanese Patent Publication No. 765/1983. There is. This magnetic recording/playback device records a reference signal while varying the recording bias current stepwise, and also plays back the recorded signal, and adjusts the maximum playback output based on the change in the playback signal caused by varying the recording bias current. This automatically sets the recording bias current value.

However, in this conventional magnetic recording/playback device that automatically adjusts the recording bias current, the bias variable means is directly controlled by the playback signal in order to vary the recording bias current stepwise.
The disadvantage was that it took a long time to make adjustments, and that accurate adjustments were not possible.

(Object of the Invention) The present invention has been made in view of the above-mentioned conventional drawbacks, and is a magnetic recording/playback device capable of automatically adjusting the optimum recording bias current setting for various magnetic tapes in a short time and with high precision. Our goal is to provide the following.

(Summary of the Invention) The present invention comprises: means for varying a recording bias current over a predetermined range; means for recording and reproducing a reference recording signal; means for D-converting the signals and storing them in respective registers; and calculating means for selecting the maximum value of the recorded playback signal or a value in the vicinity thereof from among the comparatively calculated values based on the stored contents of the storage means over a predetermined range. and means for storing a recording bias current value corresponding to the value of the recording/playback signal selected by the calculating means.

(Example) Hereinafter, the present invention will be explained in detail with reference to the drawings.

Following the flow shown in flowchart 1 in Figure 7, the process from start to end will be explained in detail along with other drawings.
When the operator presses the AUTO key 100, the magnetic recording and reproducing device starts. As shown in Figure 2, a stored program type microcomputer is built-in, and its instructions can be written into it.
The contents of the ROM 34 are sent to the CPU via the bus line 33.
35 reads out. Then, execute the first command (A) to initialize the recording bias current, recording level, and recording equalizer.

That is, for recording bias current, PIA13
Parallel binary initial data is output from the port output PD of the DA (digital to analog) converter 3.
0 to the corresponding DC level. The DC level is controlled by an impedance control circuit 39 via a buffer amplifier 31, for example.
The bias current value to the recording head 4 of the bias oscillator 32 which oscillates at 100KHz is controlled. In this case, as shown in the bias current versus reference recording/playback output in FIG. 3, data 3F(H) is output from the port output PD of the PIA 13, and almost no recording bias current flows. In addition, the initial setting of the recording level is
Appropriate binary data is outputted via the port output PB of the PIA 13 and converted to a DC level by the DA converter 24. The DC level is controlled by the VCA 22 via the buffer amplifier 23,
Recording amplifier gain is set to an appropriate value. Similarly, for the initial setting of the recording equalizer, appropriate binary data is output from the port output PC of the PIA 13 and converted to a DC level by the DA converter 28. The DC level controls the variable capacitance circuit via the buffer amplifier 27, and sets the capacitance value to an appropriate value. As a result, the recording equalizer control circuit 25 is set to appropriate equalizer characteristics by the value of the coil L and the value of the variable capacitance circuit C.

Next, the CPU 35 executes tape running start (B). As a result, a drive mechanism (not shown) becomes operational, causing the reels 1 and 2 to rotate, and the tape 12 to slide over the recording head 4 and the reproducing head 3. Then, a selection command for a reference signal (for example, 333 Hz) 16 is issued from the port output P ₅ of the PIA 13, and the switch circuit 19 is controlled to create a 333 Hz reference signal. A control command to turn on the switch circuit 6b is also issued from the port output _P2 of the PIA 13.

Next, the CPU 35 executes (C) of flowchart 1.

That is, with the initial data 3F(H) from the port output PD of the PIA 13 being output, a reference signal of 333 Hz is recorded for a certain period of time and is reproduced from the reproduction head 3. The reproduced output is rectified by a rectifier circuit 7 and converted to a DC level. The hold circuit 8 absorbs some level fluctuations in this value. Its output is applied to one end of the comparison input of comparator 10. Comparator 10 and D-A converter 11
constitutes a part of a successive approximation type AD (analog-digital) converter, and the output of the comparator 10 is inverted when the output level of the hold circuit 8 and the level of the DA converter 11 match; Output is PIA
₁₃ , and the binary data of the port output PA at that time becomes an A-D converted value of the playback output level of the 333Hz standard recording and playback signal. This binary data is immediately stored at address 8700 (H) of RAM 36.
It goes without saying that the DC level of the hold circuit 8 may be directly A/D converted and applied to the port of the PIA 13.

When this operation is finished, the reset signal is instantaneously released from port output _P3 , the reset circuit 9 resets the output of the hold circuit 8, and the next port output
PD binary data was subtracted by 1 from 3F(H)
3E(H) is output. This increases the impedance current. Accordingly, the 333Hz playback signal also increases and the corresponding port output PA A-
D conversion data is stored at address 8701(H).

As mentioned above, each time the binary data from the port output PD is increased by 1, it becomes 333.
The reproduction signal level of Hz is converted to digital data, and the storage address is added one by one, and the data of the port output PA is stored at each address on the RAM 36. In this embodiment, the data from the port output PD is The binary data of is increased by 1, but it is also possible to subtract 1 from the maximum value, or to move back and forth between the maximum and minimum values so as to approach the median value. The state of change can be changed freely. In this embodiment, up to address 873F(H), that is,
After dividing the bias current by 64 from the minimum to the maximum and storing the data, the CPU 35 executes the next instruction (D) in flowchart 1.

In other words, read the data from address 8700(H) to address (873F(H)), calculate the largest value among the data, or the value before or after it, and calculate the value corresponding to that address. port output
PD binary data is saved to another register.

However, if a dropout or an extreme drop in level is detected as a result of an operation, an instruction is given to either start over from the beginning without saving it to the register as miss data, or to process the operation as miss data.

Next, execute instruction (E) in flowchart 1.

That is, in this case, since the purpose is to repeat the same thing three times and extract average data, instructions (C) to (D) are repeated three times. It goes without saying that the larger the number of times, the more accurate data can be obtained, but this number is appropriately determined in consideration of the increase in search time.

Next, the CPU 35 executes the instruction (F) in flowchart 1.

In other words, three pieces of port output PD binary data saved in each register are obtained.
The average value of the binary data of the port output PD is calculated by averaging them. Then, the average value data is saved in a register as optimum bias current setting data. At the same time, the optimum recording bias current is fixed for subsequent adjustments.

Once the recording bias current settings are completed,
Next, the CPU 35 executes the instruction (G) in flowchart 1.

That is, as shown in the recording level variable characteristics in Figure 4, first, data of 00 (H) is output to the port output PB of PIA13, VCA22 is controlled, and recording and playback is performed with the recording level of 333Hz minimized. do. The DC-converted output of the playback output is sent to comparator 1.
0 is applied, and binary data corresponding to the level is output from the port output PA, and the D-A
The changed output is also applied to the other input terminal of the comparator 10, a comparison is made between the two, and the port output
Determine whether matching data is applied to _P1 .
If a matching output cannot be obtained from the port input _P3 , increase the data of the port output PB by 1, increase the recording level using the VCA 22, compare the reference level and the recording playback output again using the comparator 10, and check whether a matching output can be obtained. Determine whether

In this way, the port outputs PB at regular time intervals.
is incremented by 1 and compared each time until a matching output is obtained. When a matching output is obtained at point X in FIG. 4, the port PB output data at that time is saved in a register. This is the execution of the instruction () in flowchart 1.
In this case as well, the method is not limited to increasing the data from 00(H), but can be changed freely, such as decreasing the data from 3F(H).

The next execution command (J) repeats the recording level search three times and stores each match data in the register each time. In this case as well, it goes without saying that the greater the number of searches, the better.

The level setting data saved in the register No. 3 by the next execution command (K) is averaged to determine the final recording level setting data. The data is then saved in the register and fixed as the output data of the port output PB for the next recording equalizer adjustment.

In the next command (L), a 333Hz release signal is output from port output _P5 , turning off the switch circuit 19, and a high-frequency reference signal (for example, 10K) is output from port output _P6 .
Hz) selection signal is output to turn on the switch circuit 18. Then, binary data 00 (H) is outputted from the port output Pc, which is converted from D to A to control a variable capacitance circuit whose capacitance changes according to a DC control signal.
This variable capacitance circuit includes, for example, a circuit system using gain adjustment of an electronic variable capacitor circuit such as a Miller integration circuit. In this example, data 00(H)
In this case, the equivalent capacitance of the variable capacitance circuit is small, and as the data increases, the equivalent capacitance also increases. When the capacitance is small, the peaking resonance frequency is 10KHz.
The resonance frequency is set to be much higher than 10 KHz as the capacitance value increases. In this case as well, the search is performed in the same manner as when setting the recording level. That is, the binary data of the port output Pc is increased by 1 from 00(H), and each time the 10KHz recording/playback output and the reference level are compared in the comparator 11 until a matching output appears at the port input _P1 . . and
When the CPU 35 executes the instruction (M) and a matching output appears, the CPU 35 executes the instruction (N) and saves the binary data of the port output PD to the register. Then, the CPU 35 executes the instruction (C) in the program in the same manner as the previous instructions (E) and (J). The data of the port output Pc saved in the three registers are averaged by instruction P to obtain the data of the optimum recording equalizer.

Also, this recording equalizer characteristic can be varied by dividing it into 64 sections, similar to when adjusting the recording bias and recording level, but the accuracy can be further improved by increasing the number of divisions.

When the recording bias current, recording level, and recording equalizer characteristics are set in this way, the CPU 35 reads the command (Q) and stops the tape running. At the same time, a 10KHz signal reset control signal is output from port output P6, and a switch circuit is output from port output _P2 . 6b off signal is output. Then, the operator presses the tape key 102 in FIG.
When you press , all the data for the recording bias current, recording level, and recording equalizer for the magnetic tape used this time will be stored at an appropriate address in RAM 36.
Once stored, all data can be recalled by pressing this key at any time. Manual switch 105 is a switch that works in conjunction with switch Sw1, and allows you to freely select resistances R ₁ to _{R 3.} Some people may want to change the high frequency characteristics to some extent by varying the Q of the peaking characteristics. The frequency characteristics can be varied to some extent.

Further, the switch circuit 37 is a switch that mechanically detects whether or not there is a half tab on the chrome tape and turns it on and off. In addition, in case some people really want to adjust the recording equalizer characteristics by themselves, a switch circuit 29 is provided that can be switched in conjunction with an external operation switch.
VR can be varied and adjusted.

In this way, when the normal recording button is pressed next time to start the recording operation, a control signal to set the playback output output terminal 14 is output from the port output P7 to turn on the switch circuit 6a, and an output signal from the port output _P4 is Audio input terminal 15
At the same time, the switch circuit 20 for connecting the switch circuit 20 is turned on, and the contact point of the switch circuit 40 is switched to the opposite side to the position shown in the figure to enable the sound quality change by switching with the switch SW of the sound quality switching circuit 38.

Further, FIG. 6 shows a part of a specific circuit diagram designed in an actual experiment for the circuit block shown in FIG. 2 for reference.

(Effects of the Invention) As explained above, since the present invention is a computer-controlled automatic recording bias current adjustment using a microprocessor, the adjustment can be performed with high precision in a short time, and the reliability of the data is high. You can get something.

Further, when adjusting the recording bias current, even if there is an extreme level fluctuation due to dropout or uneven coating on the magnetic tape, it can be reliably detected and has the unique effect of preventing malfunctions.

[Brief explanation of drawings]

FIG. 1 is an operation panel used in the magnetic recording and reproducing device of the present invention, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIGS. 3 to 5 are characteristic diagrams for explaining its operation. Figure 6 is a specific circuit diagram of Figure 2,
FIG. 7 is a flowchart showing the flow of operations. 13...PIA, 26...ROM, 35...
CPU, 36...RAM, 39...impedance control circuit.

Claims (1)

[Claims] 1. means for varying a recording bias current over a predetermined range; means for recording and reproducing a reference recording signal; and A-D converting the recording and reproducing signal in accordance with the recording bias current varying means. and a calculation means for selecting the maximum value of the recording/playback signal or a value in the vicinity thereof from among the comparison calculations based on the stored contents of the storage means over a predetermined range; 1. A magnetic recording and reproducing apparatus comprising: means for storing a recording bias current value corresponding to the value of the recording and reproducing signal selected by the calculating means.