JPH0346879U - - Google Patents

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Publication number
JPH0346879U
JPH0346879U JP8857390U JP8857390U JPH0346879U JP H0346879 U JPH0346879 U JP H0346879U JP 8857390 U JP8857390 U JP 8857390U JP 8857390 U JP8857390 U JP 8857390U JP H0346879 U JPH0346879 U JP H0346879U
Authority
JP
Japan
Prior art keywords
signal
angle
diagram showing
clock signal
wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8857390U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8857390U priority Critical patent/JPH0346879U/ja
Publication of JPH0346879U publication Critical patent/JPH0346879U/ja
Pending legal-status Critical Current

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  • Radar Systems Or Details Thereof (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案による反響探知装置をレーダ
に適用した例を示すブロツク図、第2図はそのタ
イミングメモリ33の記憶内容の例を示す図、第
3図は第1図の動作を説明するための図、第4図
は第1図中の角度同期回路34の具体例を示す図
、第5図はタイミングメモリ用の複数の領域に各
探知レンジを対応させた例を示す図、第6図はタ
イミングメモリ33の1ワードのビツト数以上の
タイミング信号を発生する例を示すブロツク図、
第7図は角度信号と送信繰り返しパルスとが非同
期のレーダにこの考案を適用した例を示すブロツ
ク図、第8図はリタイミングを行わないレーダに
この考案を適用した例を示すブロツク図である。
FIG. 1 is a block diagram showing an example in which the echo detection device according to this invention is applied to a radar, FIG. 2 is a diagram showing an example of the stored contents of the timing memory 33, and FIG. 3 explains the operation of FIG. 1. FIG. 4 is a diagram showing a specific example of the angle synchronization circuit 34 in FIG. 1, FIG. 5 is a diagram showing an example in which each detection range corresponds to a plurality of areas for timing memory, and FIG. The figure is a block diagram showing an example of generating timing signals that are greater than the number of bits in one word of the timing memory 33.
Fig. 7 is a block diagram showing an example in which this invention is applied to a radar in which the angle signal and the transmitted repetition pulse are asynchronous, and Fig. 8 is a block diagram showing an example in which this invention is applied to a radar that does not perform retiming. .

補正 平2.9.21 実用新案登録請求の範囲を次のように補正する
Amendment September 21, 2002 The scope of claims for utility model registration is amended as follows.

【実用新案登録請求の範囲】 送受波指向性ビームを回動すると共に指向性ビ
ームから波動パルスを送波しその波動パルスの反
射波を受波し、その受波した反射波信号をデジタ
ル信号に変換し、その変換したデジタル信号をメ
モリに記憶し、その記憶したデジタル信号を読み
出し、読み出したデジタル信号をアナログ信号に
変換してPPI表示器へ表示信号として供給し、
上記送受波指向性ビームの回動角度位置に応じた
角度信号(以下PPI用角度信号と記す)を掃引
信号発生回路へ供給し、その掃引信号発生回路の
出力掃引信号で上記PPI表示器を掃引し、角度
マーカ設定器よりの設定角度に応じた角度信号(
以下マーカ用角度信号と記す)を、角度マーカ表
示期間に、上記PPI用角度信号に代えて上記掃
引信号発生回路へ供給して上記PPI表示器に角
度マーカを表示するようにした反響探知装置にお
いて、 上記波動パルスの繰返し周期において、上記メ
モリを読み出す期間以外の期間に、上記角度マー
カを表示する期間を決定する電子カーソルゲート
を発生する手段と、 設定したオフセツト値と対応した直流信号を発
生するオフセツト信号発生手段と、 そのオフセツト信号発生手段からの直流信号を
、上記電子カーソルゲートの期間に上記掃引信号
発生回路の掃引信号に重畳する手段と、 を設けたことを特徴とする反響探知装置。 図面の簡単な説明を次のように補正する。 明細書23頁9行「ブロツク図、第2図は」を
「ブロツク図、第1図Aは第1図中の掃引信号発
生回路29x,29yの具体例を示すブロツク図
、第2図は」と訂正する。 明細書23頁12行「は第1図中の」を「はこ
の考案による装置の表示例を示す図、第5図は第
1図中の」と訂正する。 明細書23頁14行〜16行「第6図は……ブ
ロツク図、」を削除する。 明細書23頁19〜20行「第8図は……ブロ
ツク図である。」を「第8図は従来の角度マーカ
の表示を示す図、第9図は従来のPPI掃引と角
度マーカ掃引とのタイミングを示す図である。」
と訂正する。
[Claim for Utility Model Registration] Rotating a directional transmitting and receiving beam, transmitting a wave pulse from the directional beam , receiving a reflected wave of the wave pulse, and converting the received reflected wave signal into a digital signal. converting the converted digital signal, storing the converted digital signal in a memory, reading out the stored digital signal, converting the read digital signal into an analog signal and supplying it to a PPI display as a display signal,
An angle signal (hereinafter referred to as PPI angle signal) corresponding to the rotation angle position of the transmitting/receiving directional beam is supplied to a sweep signal generation circuit, and the PPI display is swept with the output sweep signal of the sweep signal generation circuit. Then, the angle signal (
In an echo detection device, an angle signal (hereinafter referred to as a marker angle signal) is supplied to the sweep signal generation circuit instead of the PPI angle signal during the angle marker display period to display the angle marker on the PPI display. , means for generating an electronic cursor gate for determining a period for displaying the angle marker during a period other than the period for reading the memory in the repetition period of the wave pulse; and generating a DC signal corresponding to the set offset value. An echo detection device comprising: offset signal generation means; and means for superimposing a DC signal from the offset signal generation means on the sweep signal of the sweep signal generation circuit during the period of the electronic cursor gate. The brief description of the drawing has been amended as follows. Page 23 of the specification, line 9, ``Block diagram, FIG. 2 is'' changed to ``Block diagram, FIG. I am corrected. In the specification, page 23, line 12, ``is in FIG. 1'' is corrected to ``is a diagram showing an example of display of the device according to this invention, and FIG. 5 is in FIG. 1''. Delete ``Figure 6 is a block diagram'' on page 23 of the specification, lines 14 to 16. Page 23 of the specification, lines 19-20, ``Figure 8 is a block diagram.'' was changed to ``Figure 8 is a diagram showing a conventional angle marker display, and Figure 9 is a diagram showing a conventional PPI sweep and angle marker sweep.'' This is a diagram showing the timing of
I am corrected.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 送受波指向性ビームを回動すると共に指向性ビ
ームから波動パルスを送波しその波動パルスの反
射波を受波する反響探知装置において、クロツク
信号を発生するクロツク信号源と、そのクロツク
信号を計数してアドレスを発生するアドレスカウ
ンタと、そのアドレスにより読み出され、上記波
動パルスを発生するためのトリガパルス、上記受
信した反射波の信号を処理するタイミングゲート
を発生するタイミングメモリとを具備することを
特徴とする反響探知装置。
In an echo detector that rotates a directional beam for transmission and reception, transmits a wave pulse from the directional beam, and receives the reflected wave of the wave pulse, the clock signal source that generates the clock signal and the clock signal are counted. and a timing memory that is read out according to the address and generates a trigger pulse for generating the wave pulse and a timing gate for processing the signal of the received reflected wave. An echo detection device featuring:
JP8857390U 1990-08-24 1990-08-24 Pending JPH0346879U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8857390U JPH0346879U (en) 1990-08-24 1990-08-24

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8857390U JPH0346879U (en) 1990-08-24 1990-08-24

Publications (1)

Publication Number Publication Date
JPH0346879U true JPH0346879U (en) 1991-04-30

Family

ID=31638177

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8857390U Pending JPH0346879U (en) 1990-08-24 1990-08-24

Country Status (1)

Country Link
JP (1) JPH0346879U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5926083A (en) * 1982-08-02 1984-02-10 Tokyo Keiki Co Ltd Ppi display device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5926083A (en) * 1982-08-02 1984-02-10 Tokyo Keiki Co Ltd Ppi display device

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