JPH0346630Y2 - - Google Patents

Description

[Detailed description of the invention] [Industrial field of application] The invention is an automatic chroma level control system that controls the color signal level according to the signal level of a color burst signal extracted by a sample hold circuit every horizontal period. Control (ACC:
The present invention relates to a sampling pulse generation circuit for an automatic chroma level control (chroma level control) circuit, and is applied, for example, to a reproduction system of a video tape recorder using a chroma low-frequency conversion method.

[Summary of the idea]

The present invention provides a sampling pulse generation circuit for an ACC circuit that extracts a color burst signal from an envelope-detected color signal using a sample and hold circuit, and controls the color signal level according to the signal level of the color burst signal. By clamping the envelope detection output of the color signal, it is possible to prevent the width of the sampling pulse from changing due to APL (Average Picture Level) fluctuations of the color signal, and to avoid S/N deterioration of the color signal due to the ACC circuit. This is what I did.

[Conventional technology]

Generally, in a home video tape recorder (VTR), the luminance signal (Y) is FM (Frequency).
A chroma low-frequency conversion method is adopted in which the carrier frequency of the chroma (color) signal (including color burst signals) is converted to a low-frequency modulation signal and recorded on the magnetic tape.

The playback system in a VTR using this chroma low-frequency conversion method separates the FM luminance signal and low-frequency conversion chroma signal from the reproduced RF signal obtained from the magnetic tape.
The above FM luminance signal is demodulated to reproduce the luminance signal (Y), the low frequency converted chroma signal is high frequency converted to the regular chroma carrier frequency to reproduce the chrominance signal, and these are combined to produce a reproduced video signal. I'm starting to get more.

At this time, an ACC circuit is used to stabilize the signal level of the color signal. In addition, VTRs equipped with so-called high-speed ACC circuits that control the signal level of color signals at a higher speed than normal ACC circuits, for example, stabilize the signal level at the beginning of the video signal after vertical blanking, are known. It is being

An example of the configuration of a VTR playback system equipped with such a high-speed ACC circuit is shown in FIG.

In FIG. 2, the regenerative RF signal obtained by the magnetic head 20 is transmitted to a regenerative amplifier (AMP) 21.
The signal is supplied to a low pass filter (LPF) 22 and a high pass filter (HPF) 27 via the filter.
A low-pass converted chroma signal is obtained from the low-pass filter 22, and an FM luminance signal is obtained from the high-pass filter 27.

The low-frequency converted chroma signal output from the low-pass filter 22 is supplied to the frequency conversion circuit (CONV) 24 via the ACC circuit 23, where it is converted to a chroma signal with a regular chroma carrier frequency of 3.58MHz, and then Pass filter (BPF)
The signal is supplied to the high-speed ACC circuit 26 via 25.

The FM luminance signal output from the high-pass filter 27 passes through a limiter circuit (LIM) 28 and is demodulated by a de-modulator (DEM) 29 to become a reproduced luminance signal. This reproduced luminance signal is
The signal is supplied to the signal synthesis circuit 32 via an amplifier (AMP).

The signal synthesis circuit 32 synthesizes a reproduced video signal from the chroma signal output from the high-speed ACC circuit 26 and the reproduced luminance signal demodulated by the de-modulator (DEM) 29.

The high-speed ACC circuit 26 extracts a color burst signal from the chroma signal supplied from the bandpass filter 25, and controls the signal level of the chroma signal according to the signal level.

In order to perform this control operation, the high-speed ACC circuit 26 first supplies a chroma signal (including a color burst signal) as shown in FIG. An envelope detection output signal as shown in Figure B is obtained. This output signal is supplied to a sample hold circuit (S/H) 26b and a level comparator (CMP) 26i. And this level comparator (CMP)
The output pulse of 26i is the logical product circuit (AND) 2
It is supplied every 6 hours.

On the other hand, the reproduced luminance signal output from the amplifier 31 is supplied to a synchronous separation circuit (SEP) 26e,
The horizontal synchronization signal is separated by this synchronization separation circuit 26e. This horizontal synchronizing signal is supplied to a mono multivibrator (MMV) 26g via a half-H killer circuit (HHK) 26f that removes equivalent pulses within the vertical blanking period. This mono-multivibrator 26g supplies pulses approximately located in the color burst signal portion to the AND circuit 26h, as shown in FIG. 3C.

The AND circuit 26h takes the AND of the pulse output from the level comparator 26i and the pulse output from the mono-multivibrator 26g, and sends a pulse as shown in FIG. 3D to the sample and hold circuit 26b. supply The AND output pulse from the AND circuit 26h is the sampling pulse of the sample and hold circuit 26b. The sample hold circuit 26b
samples and holds the color burst signal portion of the envelope detection output signal. The output signal from this sample hold 26b is supplied to a DC amplifier (DCAMP) 26d as a control signal. This control signal causes the ACC amplifier 26 to
The gain of d is controlled.

Furthermore, since the AND circuit 26h does not output a pulse during the rest period of the color burst signal within the vertical blanking period, the sample and hold circuit 26b holds the color burst level immediately before the vertical blanking period, and the color burst signal is The high-speed ACC operation immediately after the pause period is performed immediately.

In this way, the sample hold circuit 26b
The gain of the ACC amplifier 26d is controlled according to the signal level of the color burst signal obtained by the above, and the chroma signal level is stabilized.

[Problem that the invention attempts to solve]

The color signal supplied to the high-speed ACC circuit mentioned above changes in amplitude etc. depending on the image situation.
When the color signal changes, the envelope detection circuit 2
The APL of the output of 6a fluctuates. For this reason,
Even if the amplitude of the color burst signal is constant, the output of the envelope detection circuit 26a will be accompanied by fluctuations in the DC level.

For example, when the color burst signal portion of the envelope detection output signal with fluctuations as shown in FIG. 4 is input to the comparator 26i, the output of the comparator 26i causes a pulse width fluctuation of Δt.

Therefore, the sampling pulse of the sample-and-hold circuit 26b obtained by logically multiplying the output pulse of the comparator 26i and the output pulse of the mono-multivibrator 26g having this pulse width variation will vary.

Generally, in the sample hold 26b,
The peak value of the color burst portion of the envelope detection output signal is sampled and held, but as mentioned above, if there is a width variation in the sampling pulse, the sampling value will fluctuate, causing a sampling error or spike-like noise. The output of the sample and hold circuit 26b is used to control the gain of the ACC amplifier 26d via the DC amplifier 26c, so if it contains noise, it will affect the output of the ACC amplifier 26d. , which degrades the signal-to-noise ratio of the color signal.

The actual envelope detection output signal is not trapezoidal as shown in Figure 4, but the waveform is rounded due to band deterioration and has a roughly triangular shape, so noise generation due to sampling pulse width fluctuations is noticeable. become.

As described above, the conventional high-speed ACC circuit has a problem in that the SN ratio of the color signal deteriorates due to variations in the width of the sampling pulse.

Therefore, in view of the above-mentioned conventional problems, the present invention provides a sampling pulse generation circuit that generates stable sampling pulses without width fluctuations, and enables high-speed ACC operation under the best conditions. The purpose is to obtain color signals with a good ratio.

[Means for solving problems]

In order to solve the conventional problems as described above, the present invention provides automatic chroma level control that controls the color signal level according to the signal level of the color burst signal extracted by a sample hold circuit every horizontal period. A sampling pulse generation circuit for a circuit includes an envelope detection circuit to which the color signal input to the automatic chroma level control circuit is supplied, a clamp circuit to clamp the output signal of this envelope detection circuit, and this clamp. A comparator to which the output signal of the circuit is supplied, a pulse generation circuit that outputs a predetermined pulse at the position of the color burst signal based on the horizontal synchronization signal, and an AND output of the output of the comparator and the output of the pulse generation circuit. and an AND circuit that supplies the sample and hold circuit as a sampling pulse.

[Effect]

In the sampling pulse generation circuit according to the present invention, the envelope detection output signal of the color signal obtained by the envelope detection circuit is clamped by the clamp circuit, then pulsed by the comparator and synchronized with the horizontal synchronization signal by the AND circuit. Output as a sampling pulse.

At this time, since the envelope detection output signal is clamped to a predetermined signal level by the clamp circuit, the sampling pulse is not affected by the APL fluctuation of the color signal.

〔Example〕

Hereinafter, one embodiment of the sampling pulse generation circuit according to the present invention will be described in detail with reference to the drawings.

Figure 1 is a block diagram showing the configuration of an embodiment of a high-speed ACC circuit to which the present invention is applied.
The ACC circuit is used, for example, in the reproduction system of the VTR shown in FIG. 2 mentioned above.

In the embodiment shown in the block diagram of FIG. 1, the envelope detection circuit (DET) 2 and the ACC amplifier (ACCAMP) 12 of the sampling pulse generation circuit 1
is supplied with a color signal C separated from the reproduced signal.

The ACC amplifier 12 controls the signal level of the input color signal C to a predetermined level and supplies the color signal C to the signal synthesis circuit 11. Then, the signal synthesis circuit 11 synthesizes the luminance signal Y separated and demodulated from the reproduced signal and the input color signal C, and outputs a composite video signal.

Further, an envelope detection output signal obtained by detecting the input color signal C by the envelope detection circuit 2 is supplied to a sample hold circuit (S/H) 3 and a clamp circuit (CLP) 5.

The clamp circuit 5 receives the input color signal C.
The envelope detection output signal, which fluctuates with the APL fluctuation, is clamped to determine the lowest signal level, and the output thereof is supplied to the comparator (COM) 6.
The clamped envelope detection output signal is shaped by the comparator 6 into a pulse waveform suitable for a logic circuit, and is supplied to an AND circuit (AND) 10.

The AND circuit 10 is supplied with a pulse formed based on a horizontal synchronization signal separated from the luminance signal Y.

That is, a horizontal synchronization signal is separated from the luminance signal Y by a synchronization separation circuit (SEP) 7, and this horizontal synchronization signal is supplied to a mono multivibrator (MMV) 9 via a half H killer circuit (HHK) 8. The mono-multivibrator 9 is triggered by the horizontal synchronizing signal and supplies the AND circuit 10 with a pulse having a predetermined width that falls within the period of the color burst signal.

The AND circuit 10 takes the AND of the pulse supplied from the comparator 6 and the pulse supplied from the mono-multivibrator 9, and the rising timing is determined by the rising edge of the output of the comparator and the falling timing. supplies a pulse determined by the fall of the output of the mono-multivibrator 3 to the sample hold as a sampling pulse. Here, the AND circuit 10 does not output a sampling pulse during the pause period of the color burst signal within the vertical blanking period.

The sample and hold circuit 3 samples and holds a portion of the color burst signal from the envelope detection output signal using the sampling pulse.
The signal sampled and held here is supplied to the ACC amplifier 12 via the DC amplifier (DCAMP) 4 and used for gain control of the ACC amplifier 12.

In this way, the color signal output from the ACC amplifier 12 is controlled according to the signal level of the color burst signal.

At this time, since the sampling pulse is generated using the clamped envelope detection output signal of the input color signal C, the sampling pulse is not affected even if there is an APL fluctuation in the input color signal C. The SN ratio of the color signal output from the ACC amplifier 12 becomes good.

Further, since no sampling pulse is generated during the pause period of the color burst signal within the vertical blanking period, the sample hold circuit 3
The signal level of the color burst signal immediately before the vertical blanking pulse is held. Therefore, the high-speed ACC operation after the rest period of the color burst signal is quickly performed.

[Effect of idea]

As is clear from the description of the embodiments above, in the sampling pulse generation circuit according to the present invention, the clamping is performed after the envelope detection output signal is clamped, so the sampling pulse is extremely stable regardless of APL fluctuations. becomes. Therefore,
By applying this invention to high-speed ACC circuits,
It is possible to avoid deterioration of the SN ratio of the color signal, obtain a color signal with a good SN ratio, and fully achieve the intended purpose.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment in which the present invention is applied to a high-speed ACC circuit. Figure 2 shows high-speed ACC using a conventional sampling pulse generation circuit.
FIG. 3 is a waveform diagram for explaining the operation of the conventional sampling pulse generation circuit, and FIG. 4 is a block diagram showing the configuration of a reproduction system of a VTR having a circuit, and FIG. 4 is a waveform diagram for explaining the operation of the conventional sampling pulse generation circuit. FIG. 1... Sampling pulse generation circuit, 2... Envelope detection circuit, 3... Sample hold circuit, 5
...Clamp circuit, 6...Comparator, 9...
Mono multivibrator, 10...AND circuit.

Claims (1)

[Scope of Claim for Utility Model Registration] In a sampling pulse generation circuit for an automatic chroma level control circuit that controls a color signal level according to the signal level of a color burst signal extracted by a sample and hold circuit every horizontal period, An envelope detection circuit to which the color signal input to the automatic chroma level control circuit is supplied, a clamp circuit to clamp the output signal of this envelope detection circuit, and a comparator to which the output signal of this clamp circuit is supplied. a pulse generation circuit that outputs a predetermined pulse at the position of the color burst signal based on the horizontal synchronization signal; and an AND output of the output of the comparator and the output of the pulse generation circuit as a sampling pulse to the sample hold circuit. 1. A sampling pulse generation circuit comprising: an AND circuit that supplies