JPH0345940B2 - - Google Patents
Info
- Publication number
- JPH0345940B2 JPH0345940B2 JP58217829A JP21782983A JPH0345940B2 JP H0345940 B2 JPH0345940 B2 JP H0345940B2 JP 58217829 A JP58217829 A JP 58217829A JP 21782983 A JP21782983 A JP 21782983A JP H0345940 B2 JPH0345940 B2 JP H0345940B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- apd
- converter
- temperature compensation
- temperature
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- HODRFAVLXIFVTR-RKDXNWHRSA-N tevenel Chemical compound NS(=O)(=O)C1=CC=C([C@@H](O)[C@@H](CO)NC(=O)C(Cl)Cl)C=C1 HODRFAVLXIFVTR-RKDXNWHRSA-N 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 3
- 101710170230 Antimicrobial peptide 1 Proteins 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
- H04B10/66—Non-coherent receivers, e.g. using direct detection
- H04B10/69—Electrical arrangements in the receiver
- H04B10/691—Arrangements for optimizing the photodetector in the receiver
- H04B10/6911—Photodiode bias control, e.g. for compensating temperature variations
Description
【発明の詳細な説明】
本発明は、光受信回路におけるAPD（アバラン
シエ・フオト・ダイオード）の温度補償回路に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a temperature compensation circuit for an APD (avalanche photo diode) in an optical receiving circuit.
従来、APDを用いた光受信回路として、第１
図に示すごとき回路が多く採用されている。この
図において、APDのカソード側は、抵抗R1を介
して地気に接続され、さらにコンデンサC1を介
してAMP１に接続されている。また、APDのア
ノード側は、バイパスコンデンサC2により地気
に接続され、さらに抵抗R2を介してDC−DC変
換器２の出力側に接続されている。このDC−DC
変換器２は、直流の低電圧を入力して直流の高電
圧を出力側、すなわちＡ点に出力する。このDC
−DC変換器２の入力側はAMP３の出力側および
抵抗R4に接続される。また、AMP３の正入力端
子は抵抗R3を介して地気に接続され、負入力端
子は抵抗R4の他端および抵抗R5に接続されてい
る。そして、抵抗R5の他端を介して可変抵抗RV
の可変端Ｂ点に接続される。可変抵抗RVの固定
側は、一端が地気に接続され、他端が温度補償用
ダイオードRCを介して電源Vccに接続されてい
る。このような従来の光を電気に変換する光受信
回路において、増倍率Ｍで表わせるAPDに必要
な電圧を上記DC−DC変換器２により与えると、
APDに低いエネルギーの光が入射した場合、こ
のAPD内を流れる電流はＭ倍されてAMP１によ
り増幅することが出来る。また、周囲温度の変化
によつて生ずるAPDの特性の変化を補償するた
めめに、APDに与えられるDC−DC変換器２の
出力電圧が、温度補償用ダイオードRCの温度変
化に対応して変化する入力電圧にしたがつて自動
的に制御されている。また、可変抵抗RVは、そ
の調整によつて増倍率Ｍの値を好ましい値に設定
するために用いられる。 Conventionally, as an optical receiver circuit using APD, the first
The circuit shown in the figure is often used. In this figure, the cathode side of the APD is connected to the ground via a resistor R1 and further connected to AMP1 via a capacitor C1 . Further, the anode side of the APD is connected to the ground through a bypass capacitor C2 , and further connected to the output side of the DC-DC converter 2 via a resistor R2 . This DC−DC
The converter 2 inputs a low DC voltage and outputs a high DC voltage to the output side, that is, to the point A. This DC
- the input side of the DC converter 2 is connected to the output side of the AMP 3 and to the resistor R 4 ; Further, the positive input terminal of AMP3 is connected to the ground via resistor R3 , and the negative input terminal is connected to the other end of resistor R4 and resistor R5 . and variable resistor RV through the other end of resistor R5
is connected to the variable end point B. One end of the fixed side of the variable resistor RV is connected to the ground, and the other end is connected to the power supply Vcc via a temperature compensation diode RC. In such a conventional optical receiving circuit that converts light into electricity, when the voltage necessary for the APD expressed by the multiplication factor M is applied by the DC-DC converter 2,
When low energy light enters the APD, the current flowing within the APD is multiplied by M and can be amplified by the AMP1. In addition, in order to compensate for changes in the characteristics of the APD caused by changes in the ambient temperature, the output voltage of the DC-DC converter 2 applied to the APD changes in response to changes in the temperature of the temperature compensation diode RC. It is automatically controlled according to the input voltage. Further, the variable resistor RV is used to set the value of the multiplication factor M to a preferable value by adjusting the variable resistor RV.
しかしながら、このような回路では、APDの
増倍率Ｍの温度変動は、RCの温度特性とDC−
DC変換器２の温度特性との関連によつて決まる
ことになる。すなわち、第１図において、Ａ点の
電位をVout，Ｂ点の電位をVinとし、又、DC−
DC変換器２自身の利得をG0としたとき、Ｂ点か
らＡ点までの回路の利得G1は、
G1＝Vput／Vio＝R4／R5・G0 ……(1)
となる。なお、R4とR5は抵抗R4およびR5の抵抗
値としてそれぞれ流用したものである。この(1)式
から明らかなように、温度変化によりDC−DC変
換器２の利得G0が変動すると、上記Ｂ点からＡ
点までの回路の利得G1も変化することになり、
RCの温度特性だけで補正することができないと
いう欠点があつた。 However, in such a circuit, the temperature fluctuation of the APD multiplication factor M depends on the temperature characteristics of the RC and the DC-
It is determined by the relationship with the temperature characteristics of the DC converter 2. That is, in Fig. 1, the potential at point A is Vout, the potential at point B is Vin, and DC-
When the gain of the DC converter 2 itself is G 0 , the gain G 1 of the circuit from point B to point A is: G 1 = V put / V io = R 4 / R 5 · G 0 ... (1) becomes. Note that R 4 and R 5 are respectively used as the resistance values of resistors R 4 and R 5 . As is clear from this equation (1), when the gain G0 of the DC-DC converter 2 changes due to temperature change, from the above point B to A.
The gain G 1 of the circuit up to the point will also change,
The drawback was that it could not be corrected solely based on the temperature characteristics of the RC.
本発明の目的は、DC−DC変換器と増幅器との
縦続回路に帰還ループを付加することによつて、
DC−DC変換器の温度変動による影響を除き、補
償用ダイオードの特性のみに依存させてAPDの
温度による変動を補正するとともに、増倍率Ｍを
自由に可変することのできるAPDの温度補償回
路を提供することにある。 The object of the present invention is to add a feedback loop to a cascade circuit of a DC-DC converter and an amplifier, thereby achieving
The APD temperature compensation circuit eliminates the influence of temperature fluctuations in the DC-DC converter and compensates for temperature fluctuations in the APD by relying only on the characteristics of the compensation diode, and can freely vary the multiplication factor M. It is about providing.
本発明によれば、温度補償用ダイオードと増倍
率調整用可変抵抗器とを接続してなる可変入力電
圧発生回路と、該可変入力電圧発生回路の出力電
圧をうけ、APDの増倍用バイアス電圧を発生す
るための増幅器とDC−DC変換器とからなる縦続
回路と、該縦続回路の出力電圧をバイアスとして
APDに供給する回路と、前記縦続回路の出力側
から前記増幅器の入力側に帰還回路を介して負帰
還をかけるループとを備えたことを特徴とする
APDの温度補償回路が得られる。 According to the present invention, there is provided a variable input voltage generation circuit formed by connecting a temperature compensation diode and a variable resistor for adjusting the multiplication factor, and a bias voltage for multiplication of the APD that receives the output voltage of the variable input voltage generation circuit. A cascade circuit consisting of an amplifier and a DC-DC converter to generate the voltage, and the output voltage of the cascade circuit as a bias.
The present invention is characterized by comprising a circuit that supplies the APD, and a loop that applies negative feedback from the output side of the cascade circuit to the input side of the amplifier via a feedback circuit.
A temperature compensation circuit for APD is obtained.
次に、本発明によるAPDの温度補償回路につ
いて実施例を挙げ、図面を参照して説明する。 Next, an example of a temperature compensation circuit for an APD according to the present invention will be described with reference to the drawings.
第２図は本発明による実施例の回路図を示した
ものである。この図において、第１図と同一の機
能はそれぞれ同一の符号で示し、特に、その説明
を繰り返えさない。第２図において、DC−DC変
換器２の出力側は、直列に接続された抵抗R11と
R12とを介して地気に接続されている。また、抵
抗R11およびR12の直列の接続点はAMP３の正入
力端子に接続されている。そのほか、DC−DC変
換器２とAMP３との間の接続、およびAMP３の
負入力端子と可変抵抗器RVを経て温度補償用ダ
イオードRCとの間の接続については、第１図の
従来例と変りがない。 FIG. 2 shows a circuit diagram of an embodiment according to the present invention. In this figure, the same functions as in FIG. 1 are indicated by the same reference numerals, and their explanations will not be repeated. In Figure 2, the output side of DC-DC converter 2 is connected to a resistor R11 connected in series.
Connected to earth via R12 . Further, the series connection point of resistors R 11 and R 12 is connected to the positive input terminal of AMP3. In addition, the connection between the DC-DC converter 2 and AMP3 and the connection between the negative input terminal of AMP3 and the temperature compensation diode RC via the variable resistor RV are different from the conventional example shown in Figure 1. There is no.
上記のごとく構成されたAPDの温度補償回路
において、DC−DC変換器２の利得をG0、AMP
３の増幅率をμ、帰還回路の減衰率をβとすれ
ば、Ｂ点からＡ点までの回路の利得G2は、
G2＝μG0／１＋μβG0 ……(2)
となる。(2)式において、μ＝（R4＋R5）／R5、β
＝R12／（R11＋R12）である。なお、R4，R5およ
びR11，R12はいずれも回路図の抵抗R4，R5およ
びR11，R12の抵抗値としてそれぞれ流用した。
ここで、ループ回路全体の利得分μG0を１／βよ
り充分大きくとれば、ループ回路全体の利得G2
は、
G2≒１／β＝（R11＋R12）／R12 ……(3)
により表わされる。但し、１／β≪μG0である。
この(3)式によつて、上記全体の回路の利得G2が
抵抗R11とR12の電圧分割比だけで定められ、DC
−DC変換器２の利得の変化に影響されないこと
が判る。その結果、APDの温度特性を補償する
ような温度特性を持つRCのみによつて温度によ
る変動を補正することが出来る。又、Ｍ調整用の
可変抵抗RVにより自由に増倍率Ｍの値を設定す
ることが出来る。 In the temperature compensation circuit of the APD configured as described above, the gain of the DC-DC converter 2 is set to G 0 and AMP
3, the gain G 2 of the circuit from point B to point A is G 2 =μG 0 /1+μβG 0 (2). In formula (2), μ=(R 4 + R 5 )/R 5 , β
=R 12 /(R 11 +R 12 ). Note that R 4 , R 5 and R 11 , R 12 were all used as the resistance values of resistors R 4 , R 5 and R 11 , R 12 in the circuit diagram, respectively.
Here, if the gain μG 0 of the entire loop circuit is set to be sufficiently larger than 1/β, the gain of the entire loop circuit G 2
is expressed by G 2 ≒1/β=(R 11 +R 12 )/R 12 (3). However, 1/β≪μG 0 .
According to this equation (3), the gain G 2 of the above-mentioned entire circuit is determined only by the voltage division ratio of resistors R 11 and R 12 , and the DC
- It can be seen that it is not affected by the change in the gain of the DC converter 2. As a result, variations due to temperature can be corrected only by RC having temperature characteristics that compensate for the temperature characteristics of the APD. Furthermore, the value of the multiplication factor M can be freely set using the variable resistor RV for adjusting M.
以上の説明により明らかなように、本発明によ
れば、温度補償用のダイオードを介して入力電圧
をうけ、APDの増倍用バイアス電圧を発生する
ための増幅器とDC−DC変換器とからなる縦続回
路に帰還ループを付加することによつて、APD
の温度による変動を補償用ダイオードの特性のみ
に依存させて補正できることは勿論、可変抵抗器
RVの調整により増倍率の自由な選定が可能とな
り、温度補償の信頼性を向上すべく、得られる効
果は大きい。 As is clear from the above description, the present invention includes an amplifier and a DC-DC converter that receive an input voltage via a temperature compensation diode and generate a bias voltage for multiplication of the APD. By adding a feedback loop to the cascade circuit, APD
It goes without saying that temperature-related fluctuations can be corrected by relying only on the characteristics of the compensation diode, and variable resistors
By adjusting the RV, it is possible to freely select the multiplication factor, which has a great effect on improving the reliability of temperature compensation.
第１図は従来の温度補償機能を備えたAPD使
用の光受信回路を示す図、第２図は本発明による
実施例の光受信回路を示す図である。図におい
て、１，３は増幅器、２はDC−DC変換器、
APDはアバランシユ・フオト・ダイオード、C1，
C2はコンデンサ、R1〜R5，R11，R12は抵抗、RC
は温度補償用ダイオード、RVは可変抵抗器であ
る。
FIG. 1 is a diagram showing a conventional optical receiving circuit using an APD having a temperature compensation function, and FIG. 2 is a diagram showing an optical receiving circuit according to an embodiment of the present invention. In the figure, 1 and 3 are amplifiers, 2 is a DC-DC converter,
APD is an avalanche photo diode, C 1 ,
C2 is a capacitor, R1 to R5 , R11 , R12 are resistors, RC
is a temperature compensation diode, and RV is a variable resistor.
Claims (1)
抗器とを接続してなる可変入力電圧発生回路と、
該可変入力電圧発生回路の出力電圧をうけ、
APDの増倍用バイアス電圧を発生するための増
幅器とDC−DC変換器とからなる縦続回路と、該
縦続回路の出力電圧をバイアスとしてAPDに供
給する回路と、前記縦続回路の出力側から前記増
幅器の入力側に帰還回路を介して負帰還をかける
ループとを備えたことを特徴とする、APDの温
度補償回路。1. A variable input voltage generation circuit formed by connecting a temperature compensation diode and a variable resistor for adjusting the multiplication factor;
Receiving the output voltage of the variable input voltage generation circuit,
a cascade circuit consisting of an amplifier and a DC-DC converter for generating a bias voltage for multiplication of the APD; a circuit that supplies the output voltage of the cascade circuit as a bias to the APD; A temperature compensation circuit for an APD, characterized by comprising a loop that applies negative feedback to the input side of an amplifier via a feedback circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58217829A JPS60111540A (en) | 1983-11-21 | 1983-11-21 | Temperature compensating circuit of apd |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58217829A JPS60111540A (en) | 1983-11-21 | 1983-11-21 | Temperature compensating circuit of apd |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60111540A JPS60111540A (en) | 1985-06-18 |
| JPH0345940B2 true JPH0345940B2 (en) | 1991-07-12 |
Family
ID=16710397
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58217829A Granted JPS60111540A (en) | 1983-11-21 | 1983-11-21 | Temperature compensating circuit of apd |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60111540A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2511015Y2 (en) * | 1987-03-09 | 1996-09-18 | 日本電気株式会社 | Avalanche photo diode bias application circuit |
| JP2686036B2 (en) * | 1993-07-09 | 1997-12-08 | 浜松ホトニクス株式会社 | Avalanche photodiode bias circuit |
| JP3421103B2 (en) * | 1993-12-20 | 2003-06-30 | 浜松ホトニクス株式会社 | Photodetection circuit using avalanche photodiode |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57101443A (en) * | 1980-12-17 | 1982-06-24 | Fujitsu Ltd | Bias controlling circuit |
-
1983
- 1983-11-21 JP JP58217829A patent/JPS60111540A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57101443A (en) * | 1980-12-17 | 1982-06-24 | Fujitsu Ltd | Bias controlling circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60111540A (en) | 1985-06-18 |
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