JPH0344454B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a frequency characteristic variable circuit used, for example, in video equipment.

An object of the present invention is to divide an input signal supplied to an adder circuit, which is one of the elements constituting a cosine equalizer, into two signals, and to adjust the gain of one of the signals by changing an external control voltage. Even if the gain of the amplifier is changed by supplying the signal to the adder circuit through a variable amplifier and changing the external control voltage, the output characteristic of the adder circuit is the gain at a certain frequency. By providing a variable frequency characteristic circuit configured such that the gain at frequencies above and below this specific frequency changes almost like a seesaw with the specific frequency as a fulcrum, the amplifier's The objective is to control the gain using a control voltage to obtain arbitrary frequency characteristics without causing group delay time distortion.

In addition, here, "without causing group delay time distortion"
It means "so small that it can be ignored."
It also includes the meaning.

Conventionally, there has been no circuit that can arbitrarily change the frequency characteristics of a variable frequency characteristic circuit using a cosine equalizer by using an external DC voltage or a digital control signal.

FIG. 1 is a conceptual diagram of a delay circuit used in a cosine equalizer, where 1 is a signal source, 2 is a characteristic impedance, and 3 is a delay line, the length of which is l. The delay line of this cosine equalizer uses either the input side or the output side without termination. In practice, a lumped constant type delay line circuit as shown in FIG. 2 is often used.

A feature of this cosine equalizer is that it can peak any frequency characteristic without causing group delay time distortion. In Fig. 2, C and 2c are capacitances, and 2L is self-inductance.

Figure 3 shows an example of a frequency characteristic variable circuit using a conventional cosine equalizer, and shows the signal input terminal 4.
The input signal Vi passes through a capacitor 5 and is separated into two signal systems by a first transistor 9, one of which is connected from the emitter of the first transistor 9 to the base ground via a capacitor 10 and a variable resistor 11. It is supplied to the emitter of the second transistor 16. If the emitter output impedance of the first transistor 9 is ignored as it is very small, the gain of this signal system is calculated by setting the resistance value of the load resistor 18 of the second transistor 16 as R _L , and the value of the variable resistor 11 as R L. If the resistance value is _R
It is obtained by R _L /R _X.

In addition, in another signal system of the input signal Vi separated from the collector side of the first transistor 9, the input signal Vi is amplified by the first transistor 9 and sent to the second transistor 16 via the delay line 17. Supplied to the collector. Therefore, the gain of this signal system is R _L /(R _{E R}
(note that the polarity is ignored and R _E is the resistance value of the emitter resistor 8 of the first transistor 9).

Since the signals of the two signal systems are added at the collector of the second transistor 16, the collector of the second transistor 16 may be considered an adder (addition circuit) here.

Next, considering the delay line 17, the signal output terminal 2
The output voltage V ₀ of 1 is V ₀ = −ViR _L /R _E R _X {1+R _E R _X / _R
)}=-Vi{R _L /R _E R _X +R _L /R _X (1-cosβl)}...
(1).

Here, β is the phase constant, β=2π/λ=ω√
LC l is the length of the delay line, λ is the wavelength, and
The symbol means parallel.

Therefore, as long as R _X does not become extremely small,
By adjusting _R.sub.X , various characteristics in which the gain changes from low to high frequencies as shown in FIG. 4 can be obtained.

Further, the maximum value of the output is when cosβl=-1.

Here, if the delay amount of the delay line 17 is τ, the peak frequency _P at which the gain is maximum is given by _P = 1/2τ (2).

FIG. 5 shows an embodiment of the variable frequency characteristic circuit of the present invention. In this figure, 22 is a signal input terminal, 23 is a resistor equal to the characteristic impedance of the delay line 24 and its resistance value is R ₀ , 25 is a power supply terminal, 27 is a first transistor 26 and a second transistor 30 28 is an amplifier whose amplification degree changes depending on the DC voltage supplied to the external DC voltage input terminal 29 ( _the embodiment is a non-inverting amplifier), 31 is a second The load resistance of the transistor 30 whose resistance value is R _L ,
32 is a signal output terminal. Here, depending on the overall circuit configuration, an inverting amplifier may be used as the amplifier 28. In addition, in Figure 5, the capacitor and transistor 2 for cutting the DC component are shown.
Bias resistors 6 and 30 are omitted. Also,
First transistor 26 and second transistor 3
0 acts as an adder.

Here, the emitter output impedance of the first transistor 26 is the resistance value of the emitter resistor 27.
Ignore it as very small compared to R _E ,
If the amplification degree of the amplifier 28 whose amplification degree changes depending on the external DC voltage is _A
The output voltage V ₀ is V ₀ =ViR _L /R _E (1-A _X R _L /R _E・1/R _L /R _E
cosβl)=ViR _L /R _E (1−A _X cosβl)...(3).

Therefore, with such a configuration, the amplifier 28
Even if the degree of amplification changes, the gain can be kept constant at a certain frequency.

That is, in the above equation (3), when cosβl=0, V ₀ =ViR _L / _RE (4), and the gain is constant at the frequency where cosβl=0. Letting this frequency be _c , it is given by _c = 1/2 _P = 1/4τ (5).

A certain frequency is a frequency that is half of the peak frequency _P at which the gain is maximum, as seen from equation (5).

When the amplification degree of the amplifier 28 is changed at frequencies where cosβl=0, the output characteristics change as if on a seesaw with _C as the fulcrum, as shown in FIG.

The frequency characteristic variable circuit having such a configuration is expected to have a wide range of applications. Furthermore, if a large amount of variation is desired, a plurality of frequency characteristic variable circuits as shown in FIG. 5 may be connected in cascade. In this case, various amounts of change can be obtained by combining changes in the external DC voltages applied to the amplifiers of the respective circuits.

In addition, in the case of cascading connections as described above, if the peak frequency _P at which the gain is maximum is different from that of other circuits, not only the amount of change but also the frequency characteristics will vary depending on the change in the DC voltage applied externally to the amplifier of the circuit. Various combinations can be made.

Further, an external DC voltage input terminal of the amplifier,
By connecting a DA converter, you can digitally change the characteristics of the variable frequency characteristic circuit.

As explained above, the variable frequency characteristic circuit of the present invention has a frequency characteristic that does not generate group delay time distortion and has a maximum gain at a high peak frequency.
By changing the gain of the amplifier, which is one of the components of this variable frequency characteristic circuit, by using an external control voltage, the gain can be adjusted at a certain frequency, that is, at frequencies above and below half of the peak frequency. can be changed to any frequency characteristic that changes like a seesaw with the above-mentioned specific frequency as the fulcrum, and its applications are extremely wide.

[Brief explanation of drawings]

Figure 1 is a conceptual diagram of a delay line circuit used in a cosine equalizer, Figure 2 is a configuration diagram of an example of a delay line actually used, Figure 3 is a configuration diagram of an example of a conventional variable frequency characteristic circuit, and Figure 4 5 is a block diagram of an embodiment of the frequency characteristic variable circuit of the present invention, and FIG. 6 is a frequency characteristic diagram thereof. 22...Signal input terminal, 24...Delay line, 23
...Resistance equal to the characteristic impedance of the delay line 24, 25...Power supply terminal, 26...First transistor, 30...Second transistor, 27...
... Common emitter resistance of the first and second transistors, 28 ... An amplifier whose amplification degree changes depending on an external control voltage, 29 ... Input terminal for an external control voltage, 31 ... Second transistor 30 load resistance, 32...signal output terminal.

Claims (1)

[Claims] 1. A signal input terminal is connected to the delay line and an amplifier whose gain changes according to a change in an external control voltage through a resistor having a resistance equal to the characteristic impedance of the delay line, respectively, The delay line is connected to the base of the first transistor, the amplifier is connected to the base of the second transistor, and a common emitter resistor is connected between the emitters of the first and second transistors. Features variable frequency characteristics circuit. 2. The frequency characteristic variable circuit according to claim 1, wherein a DC voltage is changed as the control voltage of the amplifier. 3 Using a digital signal as the amplifier control voltage
The frequency characteristic variable circuit according to claim 1, wherein the frequency characteristic is changed by DA conversion. 4. Connect the signal input terminals to the delay line and an amplifier whose gain changes according to changes in external control voltage through resistors having resistances equal to the characteristic impedance of the delay line, and connect the delay line to the first a frequency characteristic variable circuit configured by connecting the amplifier to the base of a second transistor, connecting the amplifier to the base of a second transistor, and connecting a common emitter resistor between the emitters of the first and second transistors. A variable frequency characteristic circuit characterized by multiple stages connected in cascade. 5. The frequency characteristic variable circuit according to claim 4, wherein a DC voltage is changed as the control voltage of the amplifier. 6 Using a digital signal as the amplifier control voltage
The frequency characteristic variable circuit according to claim 4, wherein the frequency characteristic is changed by DA conversion. 7. The variable frequency characteristic circuit according to claim 4, wherein a specific frequency of each of the variable frequency characteristic circuits connected in series in multiple stages is different from that of the others.