JPH0340401B2 - - Google Patents

Description

Claim 1: Representing the difference between a control signal 18 indicative of a desired value of a controlled characteristic parameter of a load 12 of a servomechanism and a feedback signal from a transducer 14 representing the actual value of said controlled characteristic parameter. a power amplifier 10 coupled as its input with the output of the summer, the output of the power amplifier driving the load 12 so as to equalize the actual value and the desired value; a sense amplifier for detecting the uncontrolled displacement of the actual value of the load 12 from the desired value; , and in response to the sensed displacement, activates an inhibiter 20, 22, thereby discharging the load 12 from the power amplifier 10 thereafter.
monitors 24, 30 that prohibit the supply of energy to
a demand controller 48 coupled to receive bipolar demand signals 50, 52; detecting the polarity of the signals 50, 52 and having a magnitude sufficient to saturate the output of the power amplifier 10 when provided as the control signal 18 in the absence of the feedback signal; test signal generators 54, 62 for generating test signals 72 having the same polarity as 50, 52; and means (56, 60, 62) for repeatedly replacing the request signals 50, 52 with the test signals and providing them as the control signals 18; ), the duration of each substitution of the test signal and the request signal does not substantially change the drive provided to the load 12 from the value it would be provided if the substitution did not occur. so that the power amplifier 10 is used as the sense amplifier for the monitors 24, 30, the monitors detecting the out-of-control displacements of the output of the power amplifier. means (24) for monitoring the saturation state; and said monitoring means (24);
4) activating the inhibiter if the output of the power amplifier 10 fails to change its saturation state in response to the test signal replacing the request signal; A servomechanism, characterized in that it comprises means (30).

2 the request signal 5 based on the test signal 72;
The time between successive permutations of 0,52 is longer than the longest period of saturation of the output of the power amplifier 10 during normal operation of the servomechanism, and when the feedback signal is not present. characterized in that the load 12 is shorter than the time required to acquire energy that could lead to destruction;
A servo mechanism according to claim 1.

3. The request controller 48 receives as a first input a numeric portion 50 of the request word, receives a test word 54 as a second input, and selects either the first or second input in response to a selection input 58. a digital-to-analog converter 6 comprising a multiplexer 56 configured to select and output one of the following as an output, the output of the multiplexer deriving an analog output signal for use as the control signal 18;
2, said control signal is applied as a numerical input to
the magnitude represented by the magnitude of the binary number represented by the numerical input, and the polarity selection input 5
a polarity indicating portion 52 of said request word 50, 52;
is provided directly to the digital-to-analog converter 62 as the polarity selection input to the digital-to-analog converter 62 so that the digital-to-analog converter 62 accepts the request regardless of the polarity of the request words 50, 52. 3. A servomechanism as claimed in claim 1 or claim 2, providing an analog output signal 18 for said test word of the same polarity as an output signal 18 for words 50,52.

4. The request controller 48 comprises a regular free-running timer 60 that provides the selection input 58 to the multiplexer 56, so that the multiplexer 56 regularly outputs as its output sequence:
4. Selecting the test word for a first predetermined period and selecting the numerical portion 50 of the request word 50, 52 for a subsequent second predetermined period. Servo mechanism.

5 The monitors 24 and 30 are connected to the power amplifier 1
a sensor 26, 28, 32, 34, 3 coupled to monitor an output of 0 and operative to provide an output indicative of each case in which the output of the power amplifier 10 enters or exits saturation;
6, 38, 40, the sensor 2 is operable to provide an output indicating that a timekeeping operation is being performed;
6, 28, 32, 34, 36, 38, 40, and the sensor 2
a retriggerable timer 42 operable to be triggered or retriggered to begin or resume said timing operation upon receiving each indication from 6, 28, 32, 34, 36, 38, and comprising: the duration of the timing operation is longer than the duration between successive replacements;
The suppressor 20, 22 is activated only when the retriggerable timer 42 is not in the timing operation state.
The servo mechanism according to any one of claims 1 to 4, which activates the servo mechanism.

6. The retriggerable timer 42 is operable to place a register 44 in a first state when the timer operation is not in progress, and the register 44 is responsive to an externally applied reset signal 46.
The register 44 is configured to activate the inhibiters 20, 22 in the first state and disable the inhibiters 20, 22 in the second state. The power amplifier 10 is operable to activate the power amplifier 10 at the moment the retriggerable timer 42 completes the timing operation without being retriggered during the timing operation and upon an externally applied reset. 6. The servo mechanism according to claim 5, wherein the servo mechanism is prohibited from supplying energy to the load 12 from the moment the signal is applied.

7 The sensors 26, 28, 32, 34, 36,
38 and 40 receive the output of the power amplifier 10 as a first input, receive a first reference level (+VEREF) as a second input, and set the output of the power amplifier 10 to the first reference level. (+
a first comparator 26 operable to provide a theoretical output indicative of whether the output is greater than or less than VEREF; (−
VEREF) and is operable to provide a logic output indicating whether the output of the power amplifier 10 is greater or less than the second reference level (-VEREF);
A servo mechanism according to claim 5 or 6.

8 receiving the output of the first comparator 26 as a first input;
8 as a second input and is operable to provide an output pulse each time the output of the first comparator 26 or the output of the second comparator 28 changes its respective indication. The pulse generation circuits 32, 34,
8. The servo mechanism according to claim 7, comprising: 36, 38, 40.

9 the inhibiter includes a switch 2 operable to disconnect the output of the power amplifier 10 from the load 12 in response to the monitors 24, 30;
Claims 1 to 8, comprising: 0,22
The servo mechanism described in any of paragraphs.

10 During the operation of the switches 20 and 22,
10. The servomechanism of claim 9, further comprising an energy dissipator for removing energy from the load.

11. The servomechanism is used to position a read/write head assembly in a disk data storage device, the power amplifier is constituted by a voltage amplifier 10, and the load 12 is an electric motor driving the head assembly. , a servo mechanism according to any one of claims 1 to 10.

12 The switch is an electromagnetic relay 20, 22, and the energy dissipator is the power amplifier 10.
12. A set of secondary contacts of said relay for shorting an input terminal of said motor following disconnection of said motor from said output of said relay.
Servo mechanism described in section.

13 The test word 54 is the digital
a plurality of parallel signals representing the smallest binary number that, when provided as the input to analog converter 62, causes the analog output signal 18 to be large enough to saturate the power amplifier in the absence of the feedback signal; A servomechanism according to any one of claims 3 to 12, which is a binary digit word.

14 The test word 54 is the digital
When provided as the input to the analog converter 62, the analog output signal 18 is generated when the output of the power amplifier 10 is already saturated as a result of supplying a predetermined amount of power to the load 12. even a plurality of binary digit words representing the smallest binary digit that is large enough to change the saturation state of the output of the power amplifier 10. servo mechanism.

Description This invention relates to a servomechanism for controlling an output in response to a demand signal by subtracting a feedback signal from that signal and providing the difference therebetween as an input to a load driving power amplifier. , and an object of the invention is to provide a servomechanism that is protected by disconnecting in the absence of a feedback signal or when its output is overloaded.

Although the invention is hereinafter described with respect to a servomechanism for positioning a read/write transducer in a disk data storage device, it should be understood that this is an example of this application and not a limitation. It is.

The use of feedback servomechanisms to radially position read/write transducers over rotating disks in disk data storage devices is well known. Transducers are typically expensive, fragile, and
Moreover, it cannot withstand collision with the end stopper that defines the limit of its positioning range.

Power in its servomechanism in the absence of a feedback transducer signal, such as caused by an easily and cheaply corrected defect such as a bad electrical connection, the end of the bulb's life, or a defective photocell. The amplifier is responsive only to the input request signal to provide uncontrolled acceleration energy to the read/write transducer, thereby preventing read/write transducers from being damaged by single or repeated collisions with the end stop. The write transducer will need to be replaced.

In operation of such a servomechanism, the power amplifier is configured such that it should not remain in saturation for longer than a predetermined period defined by the frequency response and damping factor of the servomechanism;
and arranging to monitor the output of the power amplifier and to disable it if it remains in saturation in any way for longer than said predetermined period of time, as described in UK Patent Application No. 8019533
and 8115851, it is possible, but if the servomechanism becomes uncontrollable, the power amplifier should remain saturated for a period that exceeds the period corresponding to the protection of the servomechanism. There are cases in which it would be advantageous and desirable to be configured as such, and there are also cases in which such a mechanism is not appropriate. One such set of cases occurs when the head positioning servomechanism in the disk file is switched to a speed control mode to perform most of the total movement of the heads between data storage tracks. To minimize the time of travel, the power amplifier saturates for a time consistent with giving its load maximum acceleration and braking forces, thereby giving the head speeds that can cause considerable damage. It is desirable to configure it so that it stays close to. In order to minimize automatically induced speed ringing in the load, it is advantageous to configure the damping factor of the servomechanism to be greater than 1, the configuration also prohibiting saturation polarity reversal.

The present invention provides a method in which the request signal is repeatedly replaced by a test signal of the same polarity as the request signal, and the duration of each instant of said replacement is such that the drive to the load does not substantially change during said replacement. , and the time between successive replacements is longer than the longest period of saturation of the power amplifier during proper operation of the servomechanism, but is destructive to the load if the feedback signal is lost. the test signal saturates the power amplifier in the absence of the feedback signal and changes the saturation state of the output of the power amplifier in the presence of the feedback signal. of sufficient amplitude to
and the output of the power amplifier is monitored, and if the output of the power amplifier cannot be so changed by the test signal, the power amplifier is prevented from sending output to the load. It's in the mechanism.

In a preferred embodiment, the feedback servomechanism for positioning the head on the disk file includes a request signal controller that alternates between an input request signal and a test signal. The demand signal controller preferably comprises a digital-to-analog converter, in which case the input demand signal is preferably a word of parallel binary digits, and the controller preferably includes the two The output of the converter is applied as an input to the saturation connection of the servomechanism, with the forward and test words being applied alternately. The parallel binary words preferably comprise binary digits indicating the polarity of the signal to be applied to the saturation connection, in which case the controller specifies that the test words have the same polarity-indicating binary digits. do.

The output of the power amplifier of the servomechanism is preferably
Given as input to the monitor. The monitor preferably provides an output indicative of said power amplifier being saturated, in which case said monitor preferably includes a pair of voltage comparators, a second voltage comparator providing an indication of positive saturation of the output of said power amplifier. one and a second one giving an indication of negative saturation of the output of the power amplifier. The output of the comparator is preferably provided as an input to a discriminator circuit for determining whether the output of the power amplifier is correctly responding to the test signal and disabling the output if it is not responding correctly. It will be done.

The request signal controller preferably provides a test signal at regular time intervals, in which case the discriminator circuit
A timer is provided which is triggered again by each change in the saturation state of the output of the power amplifier. A timer in a triggered state is preferably a necessary condition of the output of the power amplifier not to be disabled.

The output of the power amplifier is preferably disabled by a relay that disconnects it from its load. Once disabled, the output of the power amplifier preferably remains disabled until reset by an externally applied signal. Whenever a power amplifier is disabled, its load is preferably damped.

The invention will be further explained by way of example in the following description together with the accompanying drawings, in which: FIG. 1 schematically shows a preferred embodiment of the invention. FIG.

FIG. 2A shows an exemplary request waveform, and FIG. 2B shows the associated power amplifier output waveform.

FIG. 1 is a schematic diagram of a preferred embodiment.

A head positioning servomechanism for controlling the radial position of a magnetic read/write head on a rotating magnetic disk in a disk data storage device for storage of retrievable information data includes a power amplifier 10 and a voice. A coil positioning actuator 12, a position transducer 14 and a summation connection 16 are provided. This type of servomechanism is well known in industry. The voice coil actuator 12 comprises a cylindrical coil of wire within a radial magnetic field. The coil is mechanically connected to the head and exerts a displacing force in conjunction with the current flowing through the coil. A position transducer 14 is mechanically coupled to the read/write head and provides an output selectively indicative of either the radial position of the head on the rotating disk or the radial velocity of the head across the disk. give a signal. For purposes of illustrating this invention,
The position transducer 14 has as its output:
Assume that it is chosen to give a signal proportional to the velocity of the head. The output of transducer 16 is connected as a subtraction input to summation connection 16. A speed request signal is connected as a summing input to summation connection 16 via request coupling 18.
The output of summing connection 16 is the difference between its addition and subtraction inputs and is connected to the input of power amplifier 10 as an error signal. The power amplifier 10 is
It provides an amplified representation of that input as operating energy to the coil of actuator 12.

This servomechanism may be compensated for stability in the feedback path, preferably via the transducer 14, but may also be compensated in the power amplifier 10, or by a combination of partial compensation in both. It can also be corrected.

If transducer 14 is selected to provide a head position indicating output, the servo loop will be a position control loop as opposed to the velocity control loop described above. Both types of loops are the subject of this invention. The servo mechanism is
It need not be part of a disk file, but may be part of any device that requires its servomechanism to be shut down in the event of a failure.

A selectable energizable relay coil 20 controls a switch 22. When relay coil 20 is not energized, the output of power amplifier 10 is connected to actuator 12. When the relay coil 20 is energized, the actuator 12 is shorted,
The kinetic energy possessed by the read/write head is therefore electrically dissipated by the current induced by the radial magnetic field of the actuator coil, which is then disconnected from the power amplifier 10.

The output of power amplifier 10 is connected as an input to monitor 24. The monitor 24 is connected to the power amplifier 10
A first comparator 26 detects positive saturation in the output of the power amplifier 10, and a second comparator 28 detects negative saturation in the output of the power amplifier 10.

The output of the power amplifier 10 is connected to the non-inverting input of the first comparator 26 and the positive reference voltage +VE REF is connected to the inverting input of the first comparator 26 . The positive reference voltage +VE REF is
Somewhat smaller than the positive saturation voltage of power amplifier 10. In this way, the first comparator 26
Whenever power amplifier 10 is at or near positive saturation, it provides a logically true output.

The output of the power amplifier 10 is connected to the second input as an inverting input.
is connected to the comparator 28 of the negative reference voltage −
VE REF is connected to the non-inverting input of the second comparator 28. Its negative reference voltage −VE
REF is somewhat less negative than the negative saturation output level of power amplifier 10. The second comparator 28 provides a logically true output whenever the power amplifier output is at or near negative saturation.

It should be understood that there are other methods for detecting saturation. Power amplifier 10 need not have a bipolar output; it is then only necessary to detect whether its output is saturated or unsaturated.

The outputs of the first and second comparators 28, 26 are connected as inputs to a discrimination circuit 30. The combination of the first inverter 32 and the first exclusive OR gate 34 causes the first comparator 2
Whenever the output of 6 changes from logical true to logical false or from logical false to logical true, a short logical true signal is applied to the output of the first exclusive OR gate. A pulse is given.

Second inverter 36 and second exclusive OR
The combination of gates 38 causes a second exclusive A short logically true pulse is applied to the output of OR gate 38.

The output of the first exclusive OR gate 34 and the second
The output of the OR gate 38 is given as an input to the OR gate 40, which gate is connected to the power amplifier 1.
Whenever the 0 output changes to or from positive or negative saturation, it gives a short logically true pulse as the output.

The output of the OR gate 40 is used as a trigger input.
A retriggerable monostable timer 42 is provided.
Whenever monostable 42 receives a trigger pulse, it begins a timing operation. During timing operation, monostable 42 provides a logically true output.
If yet another trigger pulse is received before the end of the timing operation, the timing operation is restarted and the output of monostable 42 remains logically true. If the trigger pulse is not received before the end of the timing operation, the monostable 42
The output of is inverted to logical false. Thus, if monostable 42 receives a trigger pulse before the end of each timing operation, its output will remain logically true.

The output of monostable 42 is provided to R/S flip-flop 44 as a setting input. An external reset signal is provided to flip-flop 44 via reset line 46. Flip-flop 44 is set whenever the signal from the output of monostable 42 is logically false and is reset whenever the signal on external reset line 46 is logically false. Whenever flip-flop 44 is set, it provides a logically true output signal, and whenever it is reset, it provides a logically false output signal.

The output of flip-flop 44 is connected to relay coil 20 via a power driver (not shown) so that whenever the output of flip-flop 44 is logically true, relay coil 20 is operated and switch 22 is activated. If actuator 12 is disconnected from the output of power amplifier 10 and actuator coil 12 is shorted, but the output of the flip-flop is logically false, relay coil 20 is not operated and switch 22 is
connects the output of power amplifier 10 to actuator 12 .

A speed request signal is provided to request coupling 18 by request controller 48 .

Controller 48 receives a 7-bit parallel binary request word indicating the desired speed of the read/write head via 7-wire request bus 50 along with a binary digit indicating polarity on code line 52. Whenever the signal on code line 52 is logically true, the word on request bus 50 is taken as positive, and whenever the signal on code line 52 is logically false, the request bus The words above 50 are taken as negative.

A test word generator 54 provides as output a 7-bit parallel binary digit test word. Generator 54 may be a semiconductor device such as a ROM, or may be a simple construction such as a diode, resistor and the like.

A 7-bit request word from request bus 54 is provided as a first input to multiplexer 56. The 7-bit test word from generator 54 is
It is provided as a second input to multiplexer 56. Whenever the signal on control input 58 of multiplexer 56 is logically true, multiplexer 56 provides the 7-bit request word as an output. Whenever the signal on control input 58 of multiplexer 56 is logically false, multiplexer 56 outputs 7 from generator 54 as an output.
Give a bit test word.

Free-running timer 60 is connected as an output to multiplexer 56 as a control input.
It provides a signal that is logically true except for logically false periods of 100 microsecond periods regularly spaced at 5 millisecond intervals.

Multiplexer 56 thus controls timer 60
In response to the output of , it provides as output a request word with 100 microsecond intervals of test words alternating every 5 milliseconds.

The output of multiplexer 56 is provided as a number input to bidirectional digital to analog converter 62. The sign bit on code line 52 is provided to converter 62 as an output polarity control input. Converter 62 provides an analog output signal whose magnitude is proportional to the magnitude of the binary word provided at the number input and whose direction is positive and sign if the sign bit is logically true. Negative if the bit is logically false. The analog output of converter 62 is provided as the demand signal of demand coupling 18.

The specific repetition period and duration over which the test word on the output of multiplexer 56 is applied is a matter of design choice. In this case a duty cycle of 2% is chosen so that it does not significantly interfere with the average level of the request signal of the request coupling 18 and thus avoids unnecessary restrictions on the range of the request. The repetition frequency is selected to, first, avoid causing resonance in the actuator 12, and second, to provide a longer than normal period of saturation of the power amplifier 10 during transient acceleration conditions. . The duration for which the test word is given is
The voltage instantaneously present at the input to actuator 12 is chosen so that it is too short to cause a significant current change in the inductance of the actuator 12 coil. The duty cycle can be corrected by increasing the size of the request word so that the average level of the analog request signal in request coupling 18 is the same as when no test word is provided.

The power amplifier 10 has a high gain and a high band. The gain is such that the binary word 0000001 presented at the input to converter 62 in the absence of a feedback signal from transducer 14 is
The output of the amplifier 10 can be saturated. The binary word 0000001 is thus selected as the test word provided by generator 54. If the gain of amplifier 10 is small, another binary word is used as a test word,
That word is the smallest binary number that would saturate the output of amplifier 10 when applied to converter 62 in the absence of feedback. The selection of the smallest binary number for saturation of amplifier 10 is not limiting. A larger binary number may be selected. However, the smallest number represents the preferred mode of operation of the circuit.

FIG. 2A shows an exemplary analog request signal for request coupling 18 that may be provided to cause a servomechanism to move the read/write head between tracks. The vertical axis shows applied voltage and the horizontal axis shows time. The analog request signal includes an acceleration period 64 during which the read/write head speeds up, a cruise period 66 during which the head moves at a constant speed, and a deceleration period 68 during which the speed of the head is reduced to zero. The remaining period 70 is meant to be the period during which the head is required to remain stationary. The request signal profile is generated externally as a sequence of binary request words in response to head position on the disk, and the manner of its generation forms no part of this invention. The particular contours shown are selected to incorporate each aspect of the servomechanism's operation.

The analog request signal is the level of the test word,
This is interrupted by regularly repeated test spikes 72 such that the signal drops to the voltage level represented in this case by word 0000001.

FIG. 2B shows an exemplary power amplifier 10 output waveform that may be associated with the requirement profile of FIG. 2A. The vertical axis shows the output voltage, and the horizontal axis shows time,
It is on the same scale and in the same reference as the horizontal time axis of Figure 2A.

In operation of the servomechanism, a correction is made so that the feedback voltage, in this case the output of transducer 14, is equal to the required voltage, in this example the contour of FIG. 2A. If there were no feedback signal, power amplifier 10 would be driven into saturation by the demand signal. A test signal of the same polarity as the request signal is sent to the power amplifier 10 with the same sense.
maintain saturation. The output of amplifier 10 would not change in this way and its operation would be detected as a malfunction.

In step 2B, during acceleration period 64, the average output level of power amplifier 10 is made to cause acceleration of the read/write head. test spike 7
2 is applied, the feedback voltage is substantially equal to the required voltage and the output of power amplifier 10 wanders around the average level in the positive half of its range. The output of the actual power amplifier 10 will exhibit deviations into both positive and negative saturation based on the loop gain of the servomechanism. This lasts for a specific period of time based on the servomechanism's bandwidth and damping factor. Even when the servomechanism is severely damped, short saturation periods typically occur during changes between rest, acceleration, and deceleration. Therefore, the repetition period of test spike 72 is selected to be greater than such saturation period.

Whenever test spike 72 is applied, each transition of the output of amplifier 10 into negative saturation retrigger monostable 42 and keep its output operational.

During the cruise period 66, the average power of amplifier 10 is just sufficient to overcome friction. Whenever test spike 72 is applied again, negative saturation occurs and monostable 42 is retriggered.

During the deceleration period 68, the output of amplifier 10 goes negative and, on average, maintains a level sufficient to decelerate the read/write head. Again, whenever test spike 72 is applied, amplifier 1
An output of 0 will go into negative saturation and retrigger the monostable 42.

During the rest period, the test spike 72 has a changed polarity relative to the average analog request signal;
and causes positive saturation of the output of amplifier 10.
This also retrigger the monostable 42.

Due to transient conditions within the servomechanism, test spike 72 cannot ensure a saturated response. Such a condition can occur when amplifier 10 is already saturated. In this case, in order to retrigger the monostable 42, it is sufficient for the test spike 72 to bring the amplifier 10 out of saturation without necessarily inducing saturation in the opposite direction.

The invention can be used not only to detect loss of feedback signals, but also to determine when unnecessarily high loads are being applied. For example, if the friction or inertia of the load increases in a given example, and the feedback signal from position transducer 14 does not match the analog demand signal, the difference between the demand signal and the feedback signal A condition will arise where the magnitude of the spike 72 is greater than the magnitude of the spike 72 and is therefore overdriven to the point where the application of the test spike 72 to the power amplifier 10 will not cause an alternation in saturation in the amplifier 10. A fair selection of test words, with a value greater than the minimum required to saturate amplifier 10 in the absence of feedback, will cause at what level of overload monostable 42 fails to retrigger and relay 20 becomes active. Determine whether the servo mechanism is shut off.

Test spike 72 is provided as an analog signal, such as a request signal, rather than a binary word. In a multi-mode servomechanism, the level of test spikes may be made selectable for each mode. One or more different test signals may be applied subsequently. Request controller 48
All operations except for the digital-to-analog converter 62 and/or the discrimination circuit 30 in
It may also be incorporated within the operation of a digital processor. The test spikes 72 may not be applied on a regular basis, and the decision to shut off or not to shut off the servomechanism may be made based on the spike-by-spike response conditions rather than the sufficient frequency of the response.