JPH0339870U - - Google Patents
Info
- Publication number
- JPH0339870U JPH0339870U JP9481489U JP9481489U JPH0339870U JP H0339870 U JPH0339870 U JP H0339870U JP 9481489 U JP9481489 U JP 9481489U JP 9481489 U JP9481489 U JP 9481489U JP H0339870 U JPH0339870 U JP H0339870U
- Authority
- JP
- Japan
- Prior art keywords
- separation part
- substrate
- solder layer
- laminated
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000926 separation method Methods 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
Description
第１図は本考案の実施例の平面図、第２図は本
考案の実施例のＡ−Ａ断面図、第３図は本考案の
実施例を分割した状態の平面図を示す。 １……基板、２……分離部、３……印刷回路、
５……半田層。
考案の実施例のＡ−Ａ断面図、第３図は本考案の
実施例を分割した状態の平面図を示す。 １……基板、２……分離部、３……印刷回路、
５……半田層。
Claims (1)
- 基板を分離部に沿つて２枚以上に分離しうるプ
リント配線板において、分離部の近くの印刷回路
の表面に半田層を積層することを特徴とするプリ
ント配線板。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9481489U JPH0339870U (ja) | 1989-08-12 | 1989-08-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9481489U JPH0339870U (ja) | 1989-08-12 | 1989-08-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0339870U true JPH0339870U (ja) | 1991-04-17 |
Family
ID=31644126
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9481489U Pending JPH0339870U (ja) | 1989-08-12 | 1989-08-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0339870U (ja) |
-
1989
- 1989-08-12 JP JP9481489U patent/JPH0339870U/ja active Pending