JPH0338716A - Peripheral controller - Google Patents

Peripheral controller

Info

Publication number
JPH0338716A
JPH0338716A JP1174657A JP17465789A JPH0338716A JP H0338716 A JPH0338716 A JP H0338716A JP 1174657 A JP1174657 A JP 1174657A JP 17465789 A JP17465789 A JP 17465789A JP H0338716 A JPH0338716 A JP H0338716A
Authority
JP
Japan
Prior art keywords
deck
medium
address
host device
decks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1174657A
Other languages
Japanese (ja)
Inventor
Yoshiaki Mori
森 善昭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1174657A priority Critical patent/JPH0338716A/en
Publication of JPH0338716A publication Critical patent/JPH0338716A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To enable a host device to carry on a due process with no consciousness of occurrence of a deck fault by changing the correspondence between the logical and physical addresses of the deck within a peripheral controller and moving a medium via an access means. CONSTITUTION:If a fault occurs at a deck #0, for example, a microprogram processing part 13 checks the deck state storage part 121 in a deck control table 12 to search such a deck that contains no medium loaded and is not occupied by a host device. If a deck having a logical address '7' is not used yet, a medium is taken out of a deck #0 having a physical address '0' and given to an access means 3. Then an instruction is produced to load the medium into a deck #7 of a physical address '0'. Furthermore, the correspondence is changed between the logical and physical addresses of an address conversion means 11. Thus, it seems to the host device as if a fault occurred at the deck of the logical address '7'. Then an input/output request is normally carried out as it is with a logical address '0'.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は周辺制御装置に関し、特に複数の記録再生用の
デツキと媒体格納用のセルと媒体移動用のアクセサとを
備えたライブラリ型の周辺装置を制御する周辺制御装置
に関する。
[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a peripheral control device, and in particular to a library-type peripheral equipped with a plurality of decks for recording and reproducing, cells for storing media, and accessors for moving media. The present invention relates to a peripheral control device that controls a device.

〔従来の技術〕[Conventional technology]

従来、この種の周辺制御装置は、上位装置から指示され
た動作を実行中にデツキに障害が発生して処理が正常に
完了しなかった場合、デツキの異常を上位装置に報告す
るのみであった。この異常の報告を受けると、上位装置
はソフトウェア命令によつ、アクセサでこの媒体を他の
デツキに移動させてロードし直し、エラー回復処理のた
めに再位置付けをして処理を再開させる必要があった。
Conventionally, this type of peripheral control device only reports the deck abnormality to the higher-level device if a problem occurs in the deck and the process is not completed normally while executing an operation instructed by the higher-level device. Ta. When this abnormality is reported, the host device must use the accessor to move the medium to another deck, reload it, reposition it for error recovery processing, and restart processing according to software instructions. there were.

さらに、周辺制御装置が大容量のバッファを有し、書込
み命令時はバッファにデータが格納された時点で命令の
終了を報告し、非同期で媒体への書込みを行う様な周辺
制御装置の場合には、上位装置は上述した媒体の移動の
前にバッファ内の未書込みデータを回収しなければなら
ず、そのための記憶領域の確保、バッファ内データの回
収、媒体の移動、エラー回復処理のための再位置付け、
回収した未書込みデータの書込みなどの一連の処理を実
行してから処理を再開する様になっている。
Furthermore, in the case of a peripheral control unit that has a large-capacity buffer, and when a write command is issued, it reports the end of the command as soon as data is stored in the buffer, and writes to the medium asynchronously. In this case, the host device must collect the unwritten data in the buffer before moving the medium as described above, and for this purpose, it must secure a storage area, collect the data in the buffer, move the medium, and perform error recovery processing. repositioning,
The process is restarted after executing a series of processes such as writing collected unwritten data.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述したように従来の周辺制御装置では、デツキの障害
が発生した場合に、上位装置は実行中の処理を中断して
エラー回復処理を指示しなければならない。
As described above, in the conventional peripheral control device, when a deck failure occurs, the host device must interrupt the process being executed and instruct the error recovery process.

特に、大容量のバッファを持ち上位装置の書込み命令に
対して非同期に媒体へデータを書込む様な周辺制御装置
の場合には、上位装置はバッファ内の未書込みデータを
回収しなければならない。
In particular, in the case of a peripheral control device that has a large capacity buffer and writes data to a medium asynchronously in response to a write command from a host device, the host device must collect unwritten data in the buffer.

この場合、すでに上位装置からの書込み命令に対して周
辺制御装置は終了報告を行なっているため、上位装置は
改めて、バッファ内データを回収するための記憶領域を
確保しなければならず、この記憶領域が確保できない場
合にはエラー回復処理が行えず、処理を中断しなければ
ならない。
In this case, since the peripheral control unit has already reported completion in response to the write command from the higher-level device, the higher-level device must again secure a storage area to retrieve the data in the buffer. If the area cannot be secured, error recovery processing cannot be performed and processing must be interrupted.

〔課題を解決するための手段〕[Means to solve the problem]

本発明の周辺制御装置は、媒体に対してデータの書込み
、読出しを行う複数のデツキと、媒体格納用のセルと、
前記セルとデツキ間およびデツキ相互間で媒体の移動を
行うためのアjセサとを有するライブラリ型の周辺装置
を制御する周辺制御装置において、前記各デツキの物理
アドレスと上位装置からの入出力要求時に使用される論
理アドレスとの対応を記憶し任意に変更可能なアドレス
変換手段と、前記各デツキに対応してそのデツキに媒体
がロードされているか否か及び上位装置からの命令によ
って占有されているか否か等の情報を記憶したデツキ状
態記憶部とデツキ障害発生時に回復処理のために必要な
位置情報などを保持するためのエラー情報記憶部とを含
むデツキ情報管理手段と、上位装置からの命令を実行中
のデツキに障害が発生したとき前記デツキ情報管理手段
を参照して未使用中のデツキを探し障害の発生したデツ
キの媒体を移動させて回復処理の実行を指示すると共に
前記アドレス変換手段の対応するデツキ部分の記憶を変
更する障害処理手段とを備えて構成される。
The peripheral control device of the present invention includes a plurality of decks for writing and reading data to and from a medium, cells for storing the medium,
In a peripheral control device that controls a library-type peripheral device having the cell and an accessor for moving media between decks and between decks, the physical address of each deck and an input/output request from a higher-level device are provided. address translation means that stores the correspondence with the logical address used at the time and can be arbitrarily changed; deck information management means, which includes a deck status storage unit that stores information such as whether or not a deck is present, and an error information storage unit that stores position information necessary for recovery processing when a deck failure occurs; When a failure occurs in a deck that is executing an instruction, the deck information management means is referred to to find an unused deck, move the medium of the deck where the failure has occurred, and instruct execution of recovery processing, and the address conversion and fault processing means for changing the memory of the corresponding deck portion of the means.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の周辺制御装置を用いたライブラリ型磁
気テープクサブシステムの一構成例を不すブロック図で
ある。
FIG. 1 is a block diagram showing an example of the configuration of a library type magnetic tape subsystem using the peripheral control device of the present invention.

周辺制御装置1に接続されているライブラリ型磁気テー
プ装置は、媒体へデータの書込み、読出しを行う8台の
デツキ#0〜#7と、媒体を格納するセル2と、各デツ
キ#0〜#7とセル2の間で媒体を移動するアクセサ3
とから構成されてい5− る。
The library-type magnetic tape device connected to the peripheral control device 1 has eight decks #0 to #7 that write and read data to and from media, a cell 2 that stores the media, and each deck #0 to #7. Accessor 3 for moving media between 7 and cell 2
It consists of 5-.

周辺制御装置1は、デツキの論理アドレスを物理アドレ
スに変換するアドレス手段11と、各デツキの論理アド
レスに対応した各種制御情報を格納するデツキ制御テー
ブル12と、上位装置との入出力命令の受渡し、上位装
置とバッファ14との間のデータ転送制御などを行うI
10制御部15と、デツキ#O〜#7とバッファ14間
のデータ転送制御、D/A変換などを行うREAD/W
RITE回路16と、複数台接続されたデツキ#0〜#
7からアドレス変換手段11が示す物理アドレを持つデ
ツキの選択及びそのデツキとの間のデータ転送制御など
を行うインタフェース回路17と、デツキへの書込みデ
ータあるいは読出しデータを格納するバッファ14と、
I10制御部15.READ/WRITE回路16への
データ転送開始指示などの周辺制御装置1の動作を指示
するマイクロプログラム処理部13から構成されている
。なお、アドレス変換手段11はここでは第2図に示す
様に論理アドレス111に対応ず6− る物理アドレス1120表として記憶されている。
The peripheral control device 1 includes an address means 11 that converts a logical address of a deck into a physical address, a deck control table 12 that stores various control information corresponding to the logical address of each deck, and exchanges input/output commands with a host device. , an I that controls data transfer between the host device and the buffer 14, etc.
10 control unit 15 and a READ/W that performs data transfer control between decks #O to #7 and buffer 14, D/A conversion, etc.
RITE circuit 16 and multiple connected decks #0 to #
an interface circuit 17 that selects a deck having the physical address indicated by the address conversion means 11 from 7 and controls data transfer to and from the deck; a buffer 14 that stores write data or read data to the deck;
I10 control unit 15. It consists of a microprogram processing section 13 that instructs the operations of the peripheral control device 1, such as instructing the READ/WRITE circuit 16 to start data transfer. Note that the address conversion means 11 is stored here as a table of physical addresses 1120 corresponding to the logical addresses 111, as shown in FIG.

各デツキの論理アドレスに対応したデツキ制御テーブル
12には、それぞれデツキに媒体がロードされているか
、上位装置から占有されているか等を示すデツキ状態記
憶部121と障害発生時の位置情報等を記憶するエラー
情報記憶部122が含まれている。アドレス変換手段1
1の初期状態での論理アドレス111と物理アドレス1
12の対応は第2図(a)に示す様になっている。従っ
て、上位装置が論理アドレス「0」のデツキ#0にロー
ドされている媒体に対して書込みを実行しようとした場
合は、マイクロプログラム処理部13はI10制御部1
5にデータ転送開始の指示を行ってデータをバッファ1
4へ格納させ、媒体への書込みを実行する際には指定さ
れたデツキの論理アドレス「0」をアドレス変換手段1
1へ送る。
The deck control table 12 corresponding to the logical address of each deck stores information such as a deck status storage unit 121 indicating whether a medium is loaded on the deck, whether the deck is occupied by a host device, etc., and location information at the time of failure. An error information storage unit 122 is included. Address conversion means 1
Logical address 111 and physical address 1 in the initial state of 1
The correspondence of 12 is as shown in FIG. 2(a). Therefore, when the host device attempts to write to a medium loaded on deck #0 with logical address "0", the microprogram processing section 13
5 to start data transfer and transfer the data to buffer 1.
4, and when writing to the medium, the logical address "0" of the specified deck is stored in the address conversion means 1.
Send to 1.

アドレス変換手段11はこの論理アドレスに対応する物
理アドレス112.すなわちこの場合「0」がインタフ
ェース回路17へ送られデツキ#0が選択される。デツ
キが選択されると、マイクロプログラム処理部13はR
EAD/WRITE回路16にバッファ14のデータの
転送開始を指示し、デツキ#0にロードされている媒体
にデータが書込まれる。
The address conversion means 11 converts the physical address 112 . That is, in this case, "0" is sent to the interface circuit 17 and deck #0 is selected. When the deck is selected, the microprogram processing section 13
The EAD/WRITE circuit 16 is instructed to start transferring the data in the buffer 14, and the data is written to the medium loaded on deck #0.

デツキ#0で障害が発生して処理が実行できなくなると
、マイクロフログラム処理部13はデツキ制御テーブル
12内のデツキ状態記憶部121を調べ、媒体がロード
されておらず上位装置から占有もされていないデツキを
探す。仮に論理アドレス「7」のデツキが未使用状態で
あったならば、論理アドレス「0」に対応するデツキ制
御テーブル12のエラー情報記憶部122にエラー回復
処理のために必要な位置情報等を格納し、アクセサ3に
物理アドレス「0」のデツキ#0から媒体を取り出し、
物理アドレス「7」のデツキ#7にロードする種指示す
る。さらに、アドレス変換手段11の論理アドレス11
1と物理アドレス112との対応を第2図(b)の様に
変更しておく。
When a failure occurs in deck #0 and processing cannot be executed, the microphrogram processing unit 13 checks the deck status storage unit 121 in the deck control table 12 to determine whether the medium is not loaded or occupied by the host device. Look for the missing deck. If the deck with logical address "7" is unused, position information etc. necessary for error recovery processing are stored in the error information storage section 122 of the deck control table 12 corresponding to logical address "0". Then, accessor 3 takes out the medium from deck #0 with physical address "0", and
Specify the seed to be loaded into deck #7 at physical address "7". Further, the logical address 11 of the address conversion means 11
The correspondence between 1 and the physical address 112 is changed as shown in FIG. 2(b).

物理アドレス「7」のデツキ#7への媒体の移動が完了
したら、論理アドレスrOJに対応するデツキ制御テー
ブル12のエラー情報記憶部の内容をもとに処理再開可
能な様に再位置付けを行う。
When the movement of the medium to deck #7 with physical address "7" is completed, the medium is repositioned so that processing can be resumed based on the contents of the error information storage section of the deck control table 12 corresponding to the logical address rOJ.

また論理アドレス「7」に対応するデツキ状態記憶部1
21にはデツキがオフライン状態である様にしておく。
Also, the deck state storage unit 1 corresponding to the logical address “7”
At 21, the deck is set to be offline.

これによって障害の発生した物理アドレス「0」のデツ
キ#0はデツキ#7と入れ代わり上位装置からは使用さ
れていなかった論理アドレス「7」のデツキで障害が発
生したのと同様に見え、論理アドレス「0」で実行され
ていた入出力要求は正常に実行され、以後の処理も上位
装置からは指定すべきデツキのアドレスを変更すること
なく、周辺制御装置1が処理を実行するときインタフェ
ース回路17で選択すべきデツキを自動的に変更して同
じ媒体に処理される。
As a result, the faulty deck #0 with the physical address "0" is replaced with the deck #7, and it appears to be the same as if a fault had occurred in the deck with the logical address "7" that was not used by the higher-level device, and the logical address The input/output request executed with "0" is executed normally, and subsequent processing is performed without changing the address of the deck to be specified from the higher-level device. automatically changes the deck to be selected and processes the same medium.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明の周辺制御装置は、デツキ
の障害が発生して上位装置からの入出力要求を実行でき
ない場合でも、周辺制御装置内部でのデツキの論理アド
レスと物理アドレスとの対応9− を変更しアクセサで媒体の移動を行うことにより、上位
装置ではデツキの障害の発生を意識することなく処理を
継続することが可能となる。
As explained above, the peripheral control device of the present invention maintains a correspondence between the logical address of the deck and the physical address within the peripheral control device even when a deck failure occurs and input/output requests from the host device cannot be executed. By changing 9- and moving the medium using the accessor, it becomes possible for the host device to continue processing without being aware of the occurrence of a deck failure.

特に、大容量のバッファを用いて上位装置の書込み命令
とは非同期に媒体への書込みを行う周辺制御装置の場合
には、上位装置がデツキの障害発生時にバッファ内の未
書込みデータを回収する必要がないため、データ回収の
ための記憶領域を確保できないためにエラー回復処理が
できないなどの事態を回避することができ、ソフトウェ
アの負担を軽減することができる。
In particular, in the case of a peripheral control device that uses a large-capacity buffer to write to the medium asynchronously with write commands from the host device, the host device must recover unwritten data in the buffer when a deck failure occurs. Therefore, it is possible to avoid a situation where error recovery processing cannot be performed because a storage area for data recovery cannot be secured, and the burden on the software can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の周辺制御装置を用いたライブラリ型磁
気テープサブシステムの一構成例を示すブロック図、第
2図はアドレス変換手段の概念を示す説明図である。 1・・・・・・周辺制御装置、2・・・・・・セル、3
・・・・・・アクセサ、11・・・・・・アドレス変換
手段、12・・・・・・デツキ制御テーブル、13・・
・・・・マイクロプログラム処10− 環部、14・・・・・・バッファ、15・・・・・・I
10制御部、16・・・・・・READ/WRITE回
路、17・・・・・・インタフェース回路。
FIG. 1 is a block diagram showing a configuration example of a library type magnetic tape subsystem using the peripheral control device of the present invention, and FIG. 2 is an explanatory diagram showing the concept of address conversion means. 1...Peripheral control device, 2...Cell, 3
... Accessor, 11 ... Address conversion means, 12 ... Deck control table, 13 ...
...Microprogram processing 10- Ring part, 14...Buffer, 15...I
10 control unit, 16...READ/WRITE circuit, 17...interface circuit.

Claims (1)

【特許請求の範囲】[Claims]  媒体に対してデータの書込み、読出しを行う複数のデ
ッキと、媒体格納用のセルと、前記セルとデッキ間およ
びデッキ相互間で媒体の移動を行うためのアクセサとを
有するライブラリ型の周辺装置を制御する周辺制御装置
において、前記各デッキの物理アドレスと上位装置から
の入出力要求時に使用される論理アドレスとの対応を記
憶し任意に変更可能なアドレス変換手段と、前記各デッ
キに対応してそのデッキに媒体がロードされているか否
か及び上位装置からの命令によって占有されているか否
か等の情報を記憶したデッキ状態記憶部とデッキ障害発
生時に回復処理のために必要な位置情報などを保持する
ためのエラー情報記憶部とを含むデッキ情報管理手段と
、上位装置からの命令を実行中のデッキに障害が発生し
たとき前記デッキ情報管理手段を参照して未使用中のデ
ッキを探し障害の発生したデッキの媒体を移動させて回
復処理の実行を指示すると共に前記アドレス変換手段の
対応するデッキ部分の記憶を変更する障害処理手段とを
備えたことを特徴とする周辺制御装置。
A library-type peripheral device includes a plurality of decks for writing and reading data on and from media, cells for storing media, and accessors for moving media between the cells and the decks and between the decks. In the peripheral control device to be controlled, an address conversion means that stores and can arbitrarily change the correspondence between the physical address of each of the decks and the logical address used at the time of an input/output request from the host device; A deck status storage unit that stores information such as whether or not a medium is loaded on the deck and whether it is occupied by a command from a higher-level device, and location information that is necessary for recovery processing when a deck failure occurs. and a deck information management means including an error information storage unit for holding error information, and when a fault occurs in a deck executing a command from a host device, the deck information management means is referred to to search for an unused deck and detect the fault. 1. A peripheral control device comprising: failure processing means for instructing execution of recovery processing by moving the medium in the deck where the problem occurred, and changing the memory of the corresponding deck portion of the address conversion means.
JP1174657A 1989-07-05 1989-07-05 Peripheral controller Pending JPH0338716A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1174657A JPH0338716A (en) 1989-07-05 1989-07-05 Peripheral controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1174657A JPH0338716A (en) 1989-07-05 1989-07-05 Peripheral controller

Publications (1)

Publication Number Publication Date
JPH0338716A true JPH0338716A (en) 1991-02-19

Family

ID=15982421

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1174657A Pending JPH0338716A (en) 1989-07-05 1989-07-05 Peripheral controller

Country Status (1)

Country Link
JP (1) JPH0338716A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7191365B2 (en) 2002-05-20 2007-03-13 Nec Corporation Information recorder and its control method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7191365B2 (en) 2002-05-20 2007-03-13 Nec Corporation Information recorder and its control method

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