JPH0336090Y2 - - Google Patents

Description

[Detailed explanation of the invention] (a) Industrial application field The present invention relates to an oscillation frequency control circuit, and in particular, the invention relates to an oscillation frequency control circuit using a negative capacitance reactance circuit consisting of a pair of differentially connected transistors. The present invention relates to an oscillation frequency control circuit that controls the oscillation frequency of a motor.

(B) Prior Art An oscillation frequency control circuit which combines a solid resonator such as a crystal resonator and a capacitive reactance circuit to set the oscillation frequency of an oscillation circuit was disclosed in a patent application filed in 1983 by the same applicant as the present application. It has been filed as No. 169338. FIG. 1 is a circuit diagram showing the oscillation frequency control circuit according to the application, in which 1 is an oscillation circuit, 2 is a solid resonator such as a crystal oscillator for determining the oscillation frequency of the oscillation circuit 1, and 3 is a This is a negative capacitive reactance circuit for equivalently creating a negative capacitive reactance connected in parallel to the solid-state resonator 2. In Figure 1, if the value of the capacitor 4 is C, the value of the resistor 5 is R, the mutual conductance of the first and second transistors 6 and 7 is gm, and the voltage at output point A is _e0 , then at output point A, The current i is i=e ₀ /-1/gm+1/jw (-R・C・gm)...(1) If 1/gm is small, the capacitive reactance circuit 3 is equivalently It becomes a negative capacitance reactance of R・C・gm. The mutual conductance gm controls the current flowing through the variable current source 8 by I
Then, gm=α/52I...(2) (However, α is the current amplification factor), so the capacitive reactance Cx of the capacitive reactance circuit 3 is Cx=-α・R・C/52I...(3) becomes. Equation (3) above indicates that the capacitive reactance Cx is proportional to the current I flowing through the variable current source 8.

Thus, the capacitive reactance Cx equivalently created by the capacitive reactance circuit 3 is connected in parallel to the solid-state resonator 2. Since the solid-state resonator 2 can be regarded as a parallel resonant circuit of inductive reactance and capacitive reactance, when the capacitive reactance Cx is connected in parallel to the solid-state resonator 2, its parallel resonant frequency changes. In particular, when a negative capacitive reactance is connected in parallel to the solid-state resonator 2, the overall capacitive reactance becomes small and the resonant frequency becomes high.

The circuit shown in FIG. 1 is suitable for integration into an IC (integrated circuit) because a negative capacitive reactance can be equivalently created using an electronic circuit. However, in the circuit of FIG. 1, when the current flowing through the variable current source 8 is increased to control the oscillation frequency, the second transistor 7 becomes saturated and loses its control ability, as shown by the solid line in FIG. There was a drawback that when the current flowing through the variable current source 8 was increased to more than _I1 , the oscillation frequency was reduced. That is,
The resonance voltage level determined by the solid-state resonator 2 and the capacitive reactance circuit 3 increases as the value of the negative capacitive reactance increases and as the overall capacitive reactance decreases. In the negative half cycle of , when the collector voltage of the second transistor 7 drops by about 0.7V or more from the base voltage, the second transistor 7 becomes saturated, and when the current of the variable current source 8 is increased, the capacitive reactance circuit 3, the value of negative capacitance reactance becomes small. When such a situation occurs, oscillation circuit 1 is switched to a PLL (phase locked loop) circuit.
When used in a VCO (voltage controlled oscillator), it is undesirable because it causes unwanted lock loss.

(c) Purpose of the invention The present invention was developed in view of the above points, and aims to prevent the saturation of the transistors constituting the negative capacitive reactance circuit, thereby preventing an undesirable decrease in the oscillation frequency. It is something to do.

(d) Structure of the invention The oscillation frequency control circuit according to the invention includes a solid-state resonator for setting the oscillation frequency of an oscillation circuit, a negative capacitive reactance circuit connected in parallel to the solid-state resonator, and a negative capacitance reactance circuit connected in parallel to the solid-state resonator. It is composed of a Schottky diode inserted between the base and collector of a transistor that constitutes a capacitive reactance circuit.

(E) Embodiment Figure 2 is a circuit diagram showing an embodiment of the present invention.
Reference numeral 9 indicates first and second transistors 10 and 11 whose emitters are commonly connected, and the first transistor 1.
Current inversion circuit 12 that inverts the collector current of 0
a capacitor 13 inserted between the base of the first transistor 10 and the collector of the second transistor 11; and a resistor 1 inserted between the bases of the first and second transistors 10 and 11.
4, and the first and second transistors 10 and 1
a negative capacitive reactance circuit constituted by a variable current source 15 connected to the common emitter of 1;
and 16, the anode of which is the second transistor 11;
The cathode is connected to the base of the second transistor 1.
A Schottky diode is connected to the collector of each of the two Schottky diodes. Note that the second transistor 1
1 collector and the shot key diode 1
The cathode of 6 is connected to an output terminal 17, and the output terminal 17 is connected to the solid-state resonator 2 and the oscillation circuit 1 as in FIG.

Next, the operation will be explained. The fact that the negative capacitance reactance circuit 9 has a negative capacitance reactance corresponding to the current I flowing through the variable current source 15 has been described in detail based on FIG. 1, and will not be described here. Therefore, while the current I flowing through the variable current source 15 is small, the second
Since the base voltage of transistor 11 is lower than the collector voltage, Schottky diode 16 is reverse biased and does not conduct. Therefore, while the current I flowing through the variable current source 15 is small, the Schottky diode 16 has no effect on the capacitive reactance circuit 9 . Variable current source 1
5 becomes large, and the second transistor 1
When the collector voltage of the second transistor 11 becomes lower than the base voltage by V _SBD (rise voltage of Schottky diode: about 0.3 V), the Schottky diode 16 becomes conductive, and the base-collector voltage of the second transistor 11 becomes V _SBD. Fixed to. Therefore, the collector-emitter voltage of the second transistor 11 is
The voltage is maintained at a predetermined voltage (V _BE -V _SBD ) (where V _BE is the rising voltage between the base and emitter of the transistor), and the second transistor 11 is not saturated. If the second transistor 11 is not saturated, even if the current I flowing through the variable current source 15 increases, the negative capacitance reactance will not decrease, and as shown by the dashed line in FIG. 3, the oscillation frequency f is kept constant.

In FIG. 1, the oscillation circuit 1 is shown as a black box, but the oscillation circuit 1 is
Various oscillation circuits can be used as the solid-state resonator 2 and the oscillation element.

(f) Effects of the invention As mentioned above, according to the invention, the transistors forming the negative capacitance reactance circuit are prevented from becoming saturated, so even if the current flowing through the variable current source is increased, The capacitive reactance value does not decrease, and the oscillation frequency does not abnormally decrease. Therefore, the oscillation circuit using the oscillation frequency control circuit according to the present invention can be used as the VCO of the RLL circuit.
Even when used as a lock, the risk of abnormal lock loss is prevented.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a conventional oscillation frequency control circuit, FIG. 2 is a circuit diagram showing an embodiment of the present invention,
and FIG. 3 are characteristic diagrams for explaining the present invention. Explanation of main figure numbers, 1...Oscillation circuit, 2...Solid resonator, 9 ...Negative capacitance reactance circuit, 16
...Shotkey diode.

Claims (1)

[Scope of utility model registration request] In an oscillation frequency control circuit that uses a solid-state resonator and a negative capacitance reactance circuit to set the oscillation frequency of an oscillation circuit, one of a pair of differentially connected transistors constituting the negative capacitance reactance circuit. An oscillation frequency control circuit characterized in that a Schottky diode is connected between the base and collector of the transistor to compensate for changes in the oscillation frequency of the oscillation circuit caused by saturation of one of the transistors.