JPH0334187U - - Google Patents
Info
- Publication number
- JPH0334187U JPH0334187U JP9473989U JP9473989U JPH0334187U JP H0334187 U JPH0334187 U JP H0334187U JP 9473989 U JP9473989 U JP 9473989U JP 9473989 U JP9473989 U JP 9473989U JP H0334187 U JPH0334187 U JP H0334187U
- Authority
- JP
- Japan
- Prior art keywords
- storage means
- data
- transferred
- clock
- clocking
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000737 periodic effect Effects 0.000 claims 1
- 238000012423 maintenance Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Electric Clocks (AREA)
- Debugging And Monitoring (AREA)
Description
第1図は本考案の一実施例の登録機11の電気
的構成を示すブロツク図、第2図は本実施例の動
作を説明するフローチヤート、第3図は典型的な
従来例の登録機1の構成を示すブロツク図である
。
11……登録機、12……制御装置、14……
キーボード、16……プリンタ、17……日計キ
ー、18……電源スイツチ、21……メインメモ
リ、22……メンテナンスメモリ、23……メン
テナンス日付けメモリ、24……タイマ、30…
…メンテナンス領域。
FIG. 1 is a block diagram showing the electrical configuration of a registration device 11 according to an embodiment of the present invention, FIG. 2 is a flowchart explaining the operation of this embodiment, and FIG. 3 is a typical conventional registration device. 1 is a block diagram showing the configuration of FIG. 11... Registration machine, 12... Control device, 14...
Keyboard, 16... Printer, 17... Date key, 18... Power switch, 21... Main memory, 22... Maintenance memory, 23... Maintenance date memory, 24... Timer, 30...
...Maintenance area.
Claims (1)
憶される第2記憶手段と、 第2記憶手段から第1記憶手段へデータの転送
を行うタイミングを計時する計時手段と、 予め定める周期的操作が行われたことを検出し
、このとき計時手段の計時結果が予め定めるタイ
ミングに到達していることを検出して第2記憶手
段から第1記憶手段へデータの転送を行うように
したことを特徴とする電子装置。[Claims for Utility Model Registration] First storage means that can be written/read freely; Second storage means in which data to be transferred to the first storage means is stored in advance; and From the second storage means to the first storage means. A clock means for clocking the timing of data transfer; a clock means for detecting that a predetermined periodic operation has been performed; An electronic device characterized in that data is transferred from storage means to first storage means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9473989U JPH0334187U (en) | 1989-08-11 | 1989-08-11 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9473989U JPH0334187U (en) | 1989-08-11 | 1989-08-11 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0334187U true JPH0334187U (en) | 1991-04-03 |
Family
ID=31644053
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9473989U Pending JPH0334187U (en) | 1989-08-11 | 1989-08-11 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0334187U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006219816A (en) * | 2005-02-08 | 2006-08-24 | Bi Corporation:Kk | Marker device |
-
1989
- 1989-08-11 JP JP9473989U patent/JPH0334187U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006219816A (en) * | 2005-02-08 | 2006-08-24 | Bi Corporation:Kk | Marker device |
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