JPH03278704A - Linearizer - Google Patents

Linearizer

Info

Publication number
JPH03278704A
JPH03278704A JP7951790A JP7951790A JPH03278704A JP H03278704 A JPH03278704 A JP H03278704A JP 7951790 A JP7951790 A JP 7951790A JP 7951790 A JP7951790 A JP 7951790A JP H03278704 A JPH03278704 A JP H03278704A
Authority
JP
Japan
Prior art keywords
input
terminal
circuit
terminal pair
degree hybrid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7951790A
Other languages
Japanese (ja)
Inventor
Katsuteru Nagase
長瀬 勝照
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP7951790A priority Critical patent/JPH03278704A/en
Publication of JPH03278704A publication Critical patent/JPH03278704A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain an operation over a wide band with no adjustment by short-circuiting both ends of a couple of terminal pairs of a 90 deg. hybrid respectively and connecting other terminal pairs of the 90 deg. hybrids in cascade in three stages so as to form a delay line. CONSTITUTION:Each of 180 deg. inverting circuits 3a-3c being components of a group delay line 3 short-circuits respectively both terminals of one terminal pair of a 90 deg. hybrid and the circuits are connected in cascade in three stages. An input output phase difference of a reflection distortion generating circuit 4 and an input/output phase difference of a 90 deg. hybrid 4a short-circuiting both terminals of one terminal pair respectively are different by 180 deg. to allow diodes 4d-4g to act like a high resistance. Similarly, an input/output phase difference of a reflection variable attenuator 5 and an input/output phase difference of a 90 deg. hybrid 5a short-circuiting both terminals of one terminal pair respectively are different by 180 deg. to allow diodes 5d, 5e to act like a high resistance. Thus, the linearizer is operated over a wide band with no adjustment.

Description

【発明の詳細な説明】 [産業上の利用分野] この発明は、増幅器の電力効率改善を図るりニアライザ
に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a nearerizer for improving the power efficiency of an amplifier.

[従来の技術] 第2図は従来のリニアライザを示す図であり。[Conventional technology] FIG. 2 is a diagram showing a conventional linearizer.

(11は入力2分配回路、 (la)から(1c)はそ
の構成要素であり、  (la)は90度ハイブリッド
、 (lb)は入力端子、 (lc)は無反射終端器、
(2)は出力2合成回路、 (2a)から(2c)はそ
の構成要素であり、 (2a)は90度ハイブリッド、
  (2b)は出力端子、 (2c)は無反射終端器、
(3)は前記入力2分配回路(1)の−方の出力端と出
力2合成回路(2)の一方の入力端間に設けた遅延線路
、(4)は前記人力2分配回路(1)の他方の出力端に
一方の端子対の入力端がつながるとともに他方の端子対
の両端にダイオードを付加した90度ハイブリッド構成
の反射型歪み発生回路、  (4a)から(4m)はそ
の構成要素であり。
(11 is the input 2 distribution circuit, (la) to (1c) are its components, (la) is the 90 degree hybrid, (lb) is the input terminal, (lc) is the non-reflection terminator,
(2) is the output 2 synthesis circuit, (2a) to (2c) are its components, (2a) is the 90 degree hybrid,
(2b) is the output terminal, (2c) is the non-reflection terminator,
(3) is a delay line provided between the negative output terminal of the 2-input distribution circuit (1) and one input terminal of the 2-output synthesis circuit (2); (4) is the delay line provided in the 2-input distribution circuit (1); (4a) to (4m) are the components of the reflective distortion generation circuit with a 90-degree hybrid configuration in which the input end of one terminal pair is connected to the other output end of the circuit, and diodes are added to both ends of the other terminal pair. can be.

(4a)は90度ハイブリッド、  (4b)、 (4
c)はダイオード(4dl 、  (4e) 、  (
4f) 、  (4g)へ直流電流、電圧を供給するバ
イアス端子、 (4h)から(4m)はバイパスコンデ
ンサ、(5)は前記反射型歪み発生回路の90度ハイブ
リッドの一方の端子対の出力端に一方の端子対の入力端
がつながるとともに他方の端子対の両端にダイオードを
付加した90度ハイブリッド構成の反射型可変減衰回路
、  (5a)から(5g)はその構成要素であり、 
(5a)は90度ハイブリッド。
(4a) is a 90 degree hybrid, (4b), (4
c) is a diode (4dl, (4e), (
4f) and (4g) are bias terminals that supply DC current and voltage, (4h) to (4m) are bypass capacitors, and (5) is the output terminal of one terminal pair of the 90-degree hybrid of the reflection type distortion generation circuit. A reflective variable attenuation circuit with a 90-degree hybrid configuration in which the input end of one terminal pair is connected to the input terminal and a diode is added to both ends of the other terminal pair, (5a) to (5g) are its components,
(5a) is a 90 degree hybrid.

[5bl、  (5c)はダイオード(5d)、 (5
e)に直流電圧。
[5bl, (5c) is a diode (5d), (5
e) DC voltage.

電流を供給するバイアス端子、 (5fl、 (5g)
はダイオード(5dl、 (5elの直流動作点を決定
するバイアス抵抗、(6)は前記反射型可変減衰回路(
5)の90度ハイブリッド(5a)の一方の端子対の出
力端に一方の端子対の入力端がつながるとともに他方の
端子対の両端にダイオードを付加した90度ハイブリッ
ド構成の反射型可変位相器、 (6a)から(6g)は
その構成要素であり、  (6a)は90度ハイブリッ
ド。
Bias terminal that supplies current, (5fl, (5g)
is the diode (5dl), (bias resistor that determines the DC operating point of 5el, (6) is the reflective variable attenuation circuit (
5) a reflection type variable phase shifter having a 90 degree hybrid configuration in which the input end of one terminal pair is connected to the output end of one terminal pair of the 90 degree hybrid (5a), and diodes are added to both ends of the other terminal pair; (6a) to (6g) are its constituent elements, and (6a) is a 90 degree hybrid.

(6b) 、  (6c)はダイオード(6d) 、 
(6e) ヘ直流電圧。
(6b), (6c) are diodes (6d),
(6e) DC voltage.

電流を供給するバイアス端子、 (6f)、 (6g)
はダイオード(6d1. (6e)の直流動作点を決定
するバイアス抵抗である。
Bias terminals that supply current, (6f), (6g)
is a bias resistance that determines the DC operating point of the diode (6d1. (6e)).

次に動作について説明する。入力端子(lb)に入力さ
れた信号は入力2分配回路(1)で2分配され、一方の
信号は90度ハイブリッド(la)の一方の出力端子を
経て遅延線路(3)に入力された後、再び出力2合成回
路(2)に入力されて出力端子(2C)に線形信号とし
て出力される。
Next, the operation will be explained. The signal input to the input terminal (lb) is divided into two by the input 2 distribution circuit (1), and one signal is input to the delay line (3) via one output terminal of the 90 degree hybrid (la). , is again input to the output 2 synthesis circuit (2) and output as a linear signal to the output terminal (2C).

入力2分配回路(1)で2分配された他方の信号は90
度ハイブリッド(la)の他方の出力端子を経て反射型
歪み発生回路(4)に入力される。反射型歪み発生回路
(4)ではダイオードf4dl 、 (4e) 。
The other signal divided into two by the input two distribution circuit (1) is 90
The signal is input to the reflection type distortion generation circuit (4) through the other output terminal of the optical hybrid (la). In the reflection type distortion generation circuit (4), the diode f4dl (4e) is used.

(4f)、 (4g)の直流バイアス電流、電圧を制御
することにより、歪み発生量が調節される。
By controlling the DC bias current and voltage of (4f) and (4g), the amount of distortion generated is adjusted.

上記歪み信号は次の反射型可変減衰回路(5)に人力さ
れる。反射型可変減衰回路(5)ではダイオードf5d
1. (5e)の直流バイアス電流をバイアス抵抗(5
f)、 (5g)の調節で制御することにより、歪み信
号振幅が微調される。
The above distortion signal is input to the next reflective variable attenuation circuit (5). In the reflective variable attenuation circuit (5), the diode f5d
1. (5e) direct current bias current to bias resistor (5e)
f) and (5g), the distortion signal amplitude is finely adjusted.

次の反射型可変位相回路(6)では、ダイオード(6d
)、 (6e)の直流バイアス電圧を制御することによ
り、歪み信号の位相が微調された後、再び出力2合成回
路(2)に入力されて圧力端子(2C)に歪み信号とし
て出力される。
In the next reflective variable phase circuit (6), a diode (6d
) and (6e), the phase of the distortion signal is finely adjusted, and then input to the output 2 synthesis circuit (2) again and output as a distortion signal to the pressure terminal (2C).

ところで、上記線形信号と歪み信号の位相差が180度
となるように反射型可変位相回路(6)で位相調節され
、出力2合成回路の出力端子(2C)には線形信号と歪
み信号の差電圧が取り出される。また、線形信号の伝搬
長と非線形信号の伝搬長が同一となるように遅延線路(
3)の伝送線路長が調節され、出力端子(2c)に出力
される信号の周波数対位相特性を改善している。
By the way, the phase is adjusted by the reflective variable phase circuit (6) so that the phase difference between the linear signal and the distortion signal is 180 degrees, and the difference between the linear signal and the distortion signal is output to the output terminal (2C) of the output 2 synthesis circuit. Voltage is extracted. In addition, the delay line (
The transmission line length of 3) is adjusted to improve the frequency vs. phase characteristics of the signal output to the output terminal (2c).

[発明が解決しようとする課題] 従来のリニアライブでは1以上のように構成されている
ので、線形信号の伝搬長と歪み信号の伝搬長が同一とな
るよう遅延線路(3)の伝搬長を調整しなければならず
、試験調整時間を必要とした。また、上記遅延線路(3
)の伝搬長の調整が不十分であるとリニアライザとして
使用可能な周波数範囲が限定されるという問題点があっ
た。
[Problem to be solved by the invention] Since the conventional linear live is configured as one or more, the propagation length of the delay line (3) is set so that the propagation length of the linear signal and the propagation length of the distortion signal are the same. adjustments had to be made, requiring test adjustment time. In addition, the above delay line (3
) There is a problem in that if the propagation length of the linearizer is insufficiently adjusted, the frequency range that can be used as a linearizer is limited.

この発明は上記のような問題点を解消するためになされ
たもので、上記遅延線路(3)の伝搬長の調整をなくし
て、試験調整時間短縮を図るとともに、使用周波数範囲
の広いリニアライザを提供することを目的とする。
This invention was made to solve the above-mentioned problems, and it eliminates the need to adjust the propagation length of the delay line (3), shortens test adjustment time, and provides a linearizer that can be used in a wide frequency range. The purpose is to

[課題を解決するための手段] この発明に係わるリニアライザは、前記遅延線路の構成
を、90度ハイブリッドの一方の端子対の両端をそれぞ
れ短絡するとともに、前記90度ハイブリッドの他方の
端子対を3段縦続接続したものである。
[Means for Solving the Problems] The linearizer according to the present invention has the configuration of the delay line such that both ends of one terminal pair of the 90-degree hybrid are short-circuited, and the other terminal pair of the 90-degree hybrid is short-circuited. The stages are connected in cascade.

[作用] この発明におけるリニアライザは、前記構成とすること
により、無調整で広帯域なリニアライザとして動作する
[Function] The linearizer of the present invention operates as a wideband linearizer without adjustment by having the above configuration.

[実施例] 以下、この発明の一実施例を図について説明する。第1
図において、 (1) 、 (2) 、及び(4)から
(6)は上記従来装置と同一のものである。
[Example] Hereinafter, an example of the present invention will be described with reference to the drawings. 1st
In the figure, (1), (2), and (4) to (6) are the same as the conventional device described above.

群遅延線路(3)の構成要素である180度反転回路(
3a)、  (3bL (3c)は90度ハイブリッド
の一方の端子対の両端をそれぞれ短絡したもので、それ
らは3段縦続接続構成されている。反射型歪み発生回路
(4)の入出力位相差と前記一方の端子対の両端をそれ
ぞれ短絡した90度ハイブリッド(3a)の入出力位相
差は、ダイオード(4d)から(4g)が高抵抗として
動作するため180度異むら。
The 180 degree inversion circuit (which is a component of the group delay line (3)
3a), (3bL (3c) is a 90-degree hybrid with both ends of one pair of terminals short-circuited, and they are configured in a three-stage cascade connection.Input/output phase difference of reflection type distortion generation circuit (4) The input/output phase difference of the 90 degree hybrid (3a) in which both ends of the one terminal pair are shorted is 180 degrees because the diodes (4d) to (4g) operate as high resistance.

同様に1反射型可変減衰器(5)の入出力位相差と前記
一方の端子対の両端をそれぞれ短絡した90度ハイブリ
ッド(3b)の入出力位相差は、ダイオード(5d) 
、 (5e)が高抵抗として動作するため180度異む
ら。
Similarly, the input/output phase difference of the 1 reflection type variable attenuator (5) and the input/output phase difference of the 90 degree hybrid (3b) in which both ends of the one terminal pair are shorted are the same as that of the diode (5d).
, (5e) operates as a high resistance, so the difference is 180 degrees.

また1反射型可変位相器(6)の入出力位相差と前記一
方の端子対の両端をそれぞれ短絡した90度ハイブリッ
ド(3C)の入出力位相差は、ダイオード(6d1. 
(6elが高インピーダンスのキャパシタとして動作す
るため同様に180度異むら。
Further, the input/output phase difference of the 1 reflection type variable phase shifter (6) and the input/output phase difference of the 90 degree hybrid (3C) in which both ends of the one terminal pair are shorted are determined by the diode (6d1.
(Similarly, there is a 180 degree difference because 6el operates as a high impedance capacitor.

以上から、90度ハイブリッド(3a) 、 f3b)
 、 (3c)を3段縦続接続した遅延線路(3)の入
出力位相差と1反射型歪み発生回路(4)9反射型可変
減衰回路(5)1反射型可変位相回路(6)を縦続接続
した回路の入出力位相差とは1合計540度(360度
差し引いて180度)異なることになり、出力2合成回
路の出力端子(2b)には線形信号と歪み信号の差電圧
が取り出される。
From the above, 90 degree hybrid (3a), f3b)
, input/output phase difference of delay line (3) in which 3 stages of (3c) are connected in cascade and 1 reflection type distortion generation circuit (4) 9 reflection type variable attenuation circuits (5) 1 reflection type variable phase circuit (6) connected in cascade. The input/output phase difference of the connected circuit differs by a total of 540 degrees (360 degrees minus 180 degrees), and the difference voltage between the linear signal and the distortion signal is taken out at the output terminal (2b) of the output 2 synthesis circuit. .

ところで、上記実施例では、遅延線路(3)は3個の9
0度ハイブリッドすべて一方の端子対の両端をそれぞれ
短絡した構成としたが、一方の端子対の両端をそれぞれ
短絡した1個の90度ハイブリッドと、一方の端子対の
両端をそれぞれ開放した2個の90度ハイブリッドとで
構成した遅延線路(3)としても、遅延線路(3)の入
出力位相差は1反射型歪み発生回路(4)1反射型可変
減衰回路(5)。
By the way, in the above embodiment, the delay line (3) has three 9
All 0-degree hybrids were configured with both ends of one pair of terminals shorted, but there was one 90-degree hybrid with both ends of one pair of terminals shorted, and two hybrids with both ends of one pair of terminals open. Even if the delay line (3) is configured with a 90-degree hybrid, the input/output phase difference of the delay line (3) is one reflection type distortion generation circuit (4) and one reflection type variable attenuation circuit (5).

反射型可変位相回路(6)を縦続接続した回路の入出力
位相差とは180度異むらことになり、同様にリニアラ
イザとして構成可能である。
The input/output phase difference of a circuit in which reflection type variable phase circuits (6) are connected in cascade differs by 180 degrees, and it can be similarly configured as a linearizer.

「発明の効果」 以上のように、この発明によれば、遅延線路を、90度
ハイブリッドの一方の端子対の両端がそれぞれ短絡され
た180度反転回路を3段縦続接続する構成としたので
、無調整で、広帯域なリニアライザが得られるという効
果がある。
"Effects of the Invention" As described above, according to the present invention, the delay line has a configuration in which three stages of cascade-connected 180-degree inversion circuits in which both ends of one terminal pair of a 90-degree hybrid are short-circuited, This has the effect of providing a broadband linearizer without any adjustment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例を示す図、第2図は従来の
リニアライザを示す図である。 図において、(1)は人力2分配回路、 (la)は9
0度ハイブリッド、 (lb)は入力端子、 (lc)
は無反射終端器、(2)は出力2合成回路、 (2a)
は90度ハイブリッド、 (2blは8カ端子、 (2
clは無反射終端器、(3)は遅延線路、 (3alか
ら(3c)は180度反転回路、(4)は反射型歪み発
生回路、 (4a)は90度ハイブリッド、(4b)、
 (4c)はバイアス端子、  (4d)。 (4e) 、 (4f) 、 (4glはダイオード、
 (4h)がら(4m)はバイパスコンデンサ、(5)
は反射型可変減衰回路、  (5alは90度ハイブリ
ッド、  (5b)、  (5c)はバイアス端子、(
5dl、 (5e)はダイオード、 (5f)、  (
5g)はバイアス抵抗、(6)は反射型可変位相回路。 (6a)は90度ハイブリッド、  (6b) 、 (
6c)はバイアス端子、 (6d1. (6e)はダイ
オード、 (6f) 、 (6glはバイアス抵抗であ
る。 なお1図中同一行号は同一または相当部分を示す。
FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional linearizer. In the figure, (1) is a human power 2 distribution circuit, (la) is 9
0 degree hybrid, (lb) is input terminal, (lc)
is a non-reflection terminator, (2) is an output 2 combining circuit, (2a)
is 90 degree hybrid, (2BL is 8 terminals, (2
cl is a non-reflection terminator, (3) is a delay line, (3al to (3c) are 180 degree inversion circuits, (4) is a reflective distortion generation circuit, (4a) is a 90 degree hybrid, (4b),
(4c) is a bias terminal, (4d). (4e), (4f), (4gl is a diode,
(4h) (4m) is a bypass capacitor, (5)
is a reflective variable attenuation circuit, (5al is a 90 degree hybrid, (5b), (5c) are bias terminals, (
5dl, (5e) is a diode, (5f), (
5g) is a bias resistor, and (6) is a reflective variable phase circuit. (6a) is a 90 degree hybrid, (6b), (
6c) is a bias terminal, (6d1. (6e) is a diode, (6f) and (6gl are bias resistors. In Figure 1, the same row numbers indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 90度ハイブリッドで構成した入力2分配回路と、90
度ハイブリッドで構成した出力2合成回路と、前記入力
2分配回路の一方の出力端と前記出力2合成回路の一方
の入力端間に設けた遅延線路と、前記入力2分配回路の
他方の出力端に一方の端子対の入力端がつながるととも
に他方の端子対の両端に対のダイオードを付加した90
度ハイブリッド構成の反射型歪み発生回路と、前記反射
型歪み発生回路の90度ハイブリッドの一方の端子対の
出力端に一方の端子対の入力端がつながるとともに他方
の端子対の両端にダイオードを付加した90度ハイブリ
ッド構成の反射型可変減衰回路と、前記反射型可変減衰
回路の90度ハイブリッドの一方の端子対の出力端に一
方の端子対の入力端がつながるとともに他方の端子対の
両端にダイオードを付加した90度ハイブリッド構成の
反射型可変位相回路と、前記反射型可変位相回路の90
度ハイブリッドの一方の端子対の出力端に前記出力に設
けた2合成回路の他方の入力端がつながる回路とで構成
されたリニアライザにおいて、前記遅延線路を、90度
ハイブリッドの一方の端子対の両端をそれぞれ短絡する
とともに、前記90度ハイブリッドの他方の端子対を3
段縦続接続構成としたことを特徴とするリニアライザ。
A 2-input distribution circuit configured with a 90 degree hybrid and a 90 degree
a 2-output combining circuit configured with a 2-input hybrid; a delay line provided between one output end of the 2-input dividing circuit and one input end of the 2-output combining circuit; and the other output end of the 2-input dividing circuit. 90, in which the input terminal of one terminal pair is connected to the terminal pair, and a pair of diodes is added to both ends of the other terminal pair.
The input terminal of one terminal pair is connected to the output terminal of one terminal pair of the 90-degree hybrid of the reflection distortion generation circuit, and a diode is added to both ends of the other terminal pair. a reflective variable attenuation circuit with a 90-degree hybrid configuration, and an input terminal of one terminal pair is connected to the output terminal of one terminal pair of the 90-degree hybrid of the reflective variable attenuation circuit, and a diode is connected to both ends of the other terminal pair. A reflection type variable phase circuit with a 90 degree hybrid configuration and a reflection type variable phase circuit having a 90 degree hybrid configuration with
In a linearizer, the delay line is connected to both ends of one terminal pair of the 90-degree hybrid, and a circuit that connects the output terminal of one terminal pair of the 90-degree hybrid to the other input terminal of a two-combination circuit provided at the output. are short-circuited, and the other terminal pair of the 90-degree hybrid is short-circuited.
A linearizer characterized by having a cascade connection configuration.
JP7951790A 1990-03-28 1990-03-28 Linearizer Pending JPH03278704A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7951790A JPH03278704A (en) 1990-03-28 1990-03-28 Linearizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7951790A JPH03278704A (en) 1990-03-28 1990-03-28 Linearizer

Publications (1)

Publication Number Publication Date
JPH03278704A true JPH03278704A (en) 1991-12-10

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP7951790A Pending JPH03278704A (en) 1990-03-28 1990-03-28 Linearizer

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008048032A (en) * 2006-08-11 2008-02-28 Hitachi Kokusai Electric Inc Distortion compensation device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008048032A (en) * 2006-08-11 2008-02-28 Hitachi Kokusai Electric Inc Distortion compensation device

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