JPH03273735A - Traffic regulating system for data link access protocol controller - Google Patents

Abstract

PURPOSE:To execute traffic regulation while including the resource state of an internal processing, as well by calculating the utilization rates of a transmission/reception buffer and plural resources including transactions. CONSTITUTION:When short frames are continuously received, the utilization rate of a transaction buffer 32 is sometime increased quickly rather than those of transmission/reception buffers 23 and 26, and in the case of long frames, the reverse phenomenon is generated. In such a case, the utilization rate of the transaction and the utilization rate of the buffer are calculated by a prescribed method. Thus, the both plural resources and transmission/reception buffers 23 and 26 and the transaction buffer 32 can be controlled to the regulated so that over load can not be applied to a device when the utilization rates of the transmission/reception buffers 23 and 26 and the transaction buffer 32 are increased.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a traffic regulation system, particularly to a traffic regulation system in a data link access protocol control device equipped with a user-network interface of a digital integrated service network fIsDNl according to CCITT recommendations.

(Prior art) In packet switching networks, in order to obtain high throughput,
Routing and flow control distribute traffic within the network spatially and temporally. However, if a load exceeding the controllable limit of traffic distribution is applied, many devices in the network are held inactive due to queuing, resulting in a decrease in throughput. Traffic control is performed to alleviate such a decrease in throughput.

There have been various proposals regarding traffic regulation methods in packet-switched networks. For example, Ohara et al., "Traffic control algorithm for packet-switched networks," Research and Practical Application Report, Vol. 35, No. 5, pp. 53-67 (1986) , and Japanese Patent Application Laid-Open No. 63-209347 entitled "Buffer Allocation Method for Data Exchange Networks." The former performs multi-step packet traffic control based on the correlation between processor usage rate and buffer usage rate for a DDX packet switching network including a D51 type packet switch. In addition, in the latter case, regarding buffer allocation of a data link access protocol control device, traffic is regulated based on the buffer usage rate of a single resource, which is only a transmitting and receiving buffer. In this method, the boundary value for transition to stricter regulation at each stage is made to correspond to a smaller number of free buffers than the boundary value for transition to relaxed regulation. This enables control by setting priorities for each service group.

(Problems to be Solved by the Invention) These conventional systems perform traffic control using only buffer usage rates for hardware resources. Therefore, if the usage rate of internal processing resources suddenly increases for some reason, traffic control may not be performed and the processing capacity of the device may be exceeded.

For example, in general, between transmission processing to the terminal side and reception processing from the terminal side, an overrun error may occur unless priority is given to capturing the received frame due to the configuration of the device. That is, if a next frame arrives before a frame can be captured, the previous frame may be overwritten and the data may be lost. This may result in packet data being discarded. Therefore, the regulation level for reception processing is generally set higher than that for transmission processing.

In such a case, when receiving short frames in succession,
The usage rate of internal transactions may increase rapidly compared to the sending/receiving buffer. Moreover, in the case of a long frame, the opposite phenomenon occurs. Therefore, if congestion regulation is controlled solely based on the usage rate of the transmitting/receiving buffer, the device may become overloaded.

SUMMARY OF THE INVENTION An object of the present invention is to provide a traffic regulation method for a data link access protocol control device that eliminates the above-mentioned drawbacks of the prior art and regulates traffic including the status of internal processing resources.

(Means for Solving the Problems) According to the present invention, in a traffic regulation system of a data link access protocol control device based on a 15DN user/network interface, a receive buffer for accumulating data received from a lower-level device and a higher-level device The first step is to strengthen traffic regulation for at least one of the lower and upper devices according to the usage rate of the transmission buffer that accumulates transmission data to be sent to the device, and the usage rate of transactions that process the reception buffer and the transmission buffer. level and a second level towards relaxation.

According to the present invention, the data link access protocol control device based on the 15DN user/network interface has a receive buffer for storing data received from a lower-level device and a transmit buffer for storing transmission data to be transmitted to a higher-level device. A buffer management means for managing, a receiving means for receiving data from a lower-level device and accumulating it in a receiving buffer, and a transaction for processing the data in the receiving buffer and accumulating the data in the transmitting buffer, and processing the receiving buffer and the transmitting buffer. The buffer management means calculates the usage rate of the reception buffer and the transmission buffer, and the processing means calculates the usage rate of the transaction. A first level for strengthening traffic regulation and a second level for relaxing traffic regulation for at least one of the lower and upper devices are set in accordance with the calculated transmission/reception buffer and transaction usage rates.

(Function) The traffic regulation method according to the present invention calculates the usage rate of a plurality of resources including transmission/reception buffers and transactions in a data link access protocol control device,
When overload is detected based on these, traffic regulations are strengthened or relaxed according to their usage rate.

(Embodiment) An embodiment of the traffic regulation system according to the present invention will be described with reference to the accompanying drawings. FIG. 1 shows the configuration of an embodiment of a D channel data link access protocol (fLAPD) control device IO to which a traffic regulation system according to the present invention is applied. This LAPD control device IO has a 15DN user/network interface based on the CCITT recommendation.The control device IO has a circuit switching terminal 12 and a packet switching terminal 13 in the lower layer via the D channel. The circuit switching terminal 12 sends control information, and the packet switching terminal 13 sends communication information and control information to the D channel.The control device IO receives the information sent from these terminals 12 or 13. is stored in the receiving unit 1] and then transferred to the upper layer device 18.

The receiving section 11 includes a data storage section 21 . It has a reception buffer pool 22 and a reception regulation control circuit 24. The data storage unit 21 temporarily stores the received data received from the terminals 2 and 13 in one of the reception buffers 23 provided from the reception buffer Boolean 22. The reception buffer 23 is held in a queue 14 waiting for its turn to be processed by the processing device 15, and later taken out to the processing device 15. The reception regulation control circuit 24 regulates data accumulation in the data storage section 21 and its transmission based on the traffic regulation value output from the processing device 15 to the connection line 25. The restriction information indicating this restriction state is notified from the transmitter 27 to the terminals 12 and 13 as RNR and RR. This will be explained in detail later.

The processing device 15 analyzes the contents of the receive buffer 23 held in the queue 14 against the data transfer function specification (SDLI), converts it into information content for the upper layer, processes it, and sends it to the transmission data queue I6. .

Along with this, processing data such as data type and buffer number are stored in the memory 30 as transaction fTR).
to be memorized. A transaction queue 32 is thus formed in memory. The processing program of the processing device 15 performs software processing according to these transactions. The number of transactions per unit time with respect to the storage capacity for transactions in the memory 30 is treated as the usage rate of transactions within this system.

The upper transmitter 17 sends the data held in the buffer 26 in the queue 16 to the upper layer device 18. The buffer that becomes empty after sending data is returned to the common buffer Boolean 19 via the connection line 26a as a used buffer. The upper transmitter 17 transmits information indicating the return of the empty buffer 26a to the empty buffer manager 2 via the connection line 26b.
Send to 0. The free buffer management unit 20 monitors the states of the common buffer Boolean 19 and the reception buffer Boolean 22. The free buffer management section 20 receives the free buffer information from these and the free buffer return information 26b from the upper transmitting section 17, and transfers the free buffers of the common buffer Boolean 19 to the reception buffer 22 according to the monitoring information. Manages free buffers distributed to In addition, the number of empty buffers in the common buffer Boolean 19 is sent from the empty buffer management unit 20 to the processing device 15 via the connection line 27.
will be notified.

The processing device 15 discards the received data queue 14 if it does not meet the above-mentioned data transfer function specifications.

Therefore, in the queue 14, the buffer 23 may become empty due to this, and the empty buffer is returned to the common buffer Boolean 19.

On the other hand, the transaction queue 32 corresponding to the data in this empty buffer 23 is not discarded and remains in existence. Further, when short frames are received in succession, the usage rate of the transaction buffer 32 may increase more rapidly than that of the transmission/reception buffers 23 and 26. In the case of long frames, the opposite phenomenon occurs. Therefore, if the usage rate of the transmitting/receiving buffers 23 and 26 and the transaction 32 increases, the device may become overloaded in the conventional system. In this embodiment, in such a case, control is performed to regulate both the plurality of resources, the transmission/reception buffers 23 and 26, and the transaction 32.

FIGS. 2A and 2B are transition diagrams of the stricter regulation level and the relaxed level, respectively, for the line terminal 12,
FIGS. 3A and 3B show tightening and relaxation of regulations regarding the packet terminal 13, respectively.

As can be seen from these figures, in this example, the transaction fTR) changes from normal (N) to A range of regulation levels is set including primary, secondary, and tertiary. In this case, 0<w<x<y<max.

0<W<X<Y<Z<MAX It is. max and MAX are system maximum values.

For example, in the state transition shown in FIG. 2A in which restrictions are tightened for the line terminal 12, the range of restriction levels is set to normal level fNl 41. primary restriction level 42. secondary restriction level 43, and tertiary restriction level 44. ing.

In addition, in the state transition shown in Figure 2B, which is relaxed, the restriction level 4
5 to 48 are set as shown. Between the levels, the direction of tightening or loosening restrictions is indicated by arrows 49 connecting adjacent levels. Also,
Branching points for each resource are indicated by arrows 50. Furthermore, as can be seen from FIG. 2B for deregulation, the lower limit level from the tertiary regulation level 48 to the normal level 45 is set lower than the upper limit level of the normal level 41 in FIG. 2A for tightened regulation. This allows the regulation level to be relaxed only after traffic has stabilized. The same applies to the packet terminal 13.

Traffic regulation is controlled according to such level transitions.

When tightening traffic regulations, lower line terminal 1
2 and the packet terminal 13, the transmitter 27 inserts an RR into the monitoring frame of the communication frame and notifies the packet terminal 13 of this fact. For example, RRI to RI'13 are inserted corresponding to the primary regulation level 42 to the tertiary regulation level 44, respectively. At the time of relaxation, similarly, the RN is set corresponding to the first regulation level 46 to the third regulation level 48.
Insert and notify RI to RR3. In the reinforcement to move to the highest level 3rd regulation level 44, lower terminals 12 and 13
Not only does it stop the communication, but it also sends a busy notification to the upper layer device 18 and stops the communication.

Relaxation from the tertiary regulation level 48 is performed after the traffic has recovered to the normal state N level.

FIG. 4 is a diagram showing the regulation state transition of the line terminal 12.

In the figure, the conditions shown for the buffer usage rate BtjFF and the transaction queue TR correspond to the level transition conditions explained in the above-mentioned level transition to reinforcement (Figure 2A) and level transition to relaxation (Figure 2B). are doing.

The route to stricter regulations is from normal level N to route 31.
It reaches the tertiary level through the primary level, path 32, secondary level and path 33, and also from the normal level N to path 3.
There is also a route that goes through 4 to reach the 2nd level. The path to deregulation is from the tertiary level through route 40 to the normal level N.
There is one that leads to the normal state N from the secondary level through path 38, the primary level and path 36. In the figure, the conditions for transition between these states are shown near the corresponding paths 31-34, 36, 38 and 40.

Similarly, the transition of the restriction state for the packet terminal 13 is shown in FIG.

Such traffic regulation algorithms can be easily incorporated into the system. Further, such an algorithm can be easily incorporated into a system 1 in which there are many types of resources and the creation of a congestion control algorithm is relatively complicated, or a system in which the congestion control itself is complex.

(Effects of the Invention) As described above in detail, the present invention reduces the congestion of data processing by program control, which reduces the usage rate of multiple resources including buffers for sending and receiving data and internal processing transactions for program control. We control the state transition of traffic regulation by managing these resources. Therefore, the present invention eliminates the undetected overload that occurs in the conventional regulation method using only the buffer usage rate, and it is possible to avoid device overrun errors.

[Brief explanation of drawings]

Fig. 1 is a functional block diagram showing an embodiment of a data link access protocol control device to which the traffic control method according to the present invention is applied, and Fig. 2A shows a level transition toward stricter regulation of line terminals in the embodiment shown in Fig. 1. FIG. 2B is a state transition diagram showing a level transition to deregulation for line terminals in the same embodiment, and FIG. 3A is a state transition diagram showing a level transition to stricter regulation for packet terminals in the same embodiment. Figure 3B is a state transition diagram showing the level transition to deregulation for packet terminals in the same embodiment, Figure 4 is a state transition diagram showing regulation state transitions for line terminals. It is a state transition diagram showing shape part transition. 12. 13. 14. 15. 16. 17. 18, . 19. 21. 22, . 23.26. . 24, . 30, . 32, . Explanation of code 0 in main parts Line switching terminal device Packet switching terminal device Reception buffer queue processing device Transmission buffer queue Upper transmission section Upper layer device Common buffer pool Data storage section Reception buffer Boolean buffer Reception regulation control circuit Control memory Transaction queue Line-of-sight terminal, meter, mouth, length, bell return, multi-figure, Figure 28

Claims (1)

[Claims] 1. In a traffic regulation method for a data link access protocol control device based on an ISDN user/network interface, the method includes a reception buffer that stores data received from a lower-order device and a transmitter for transmitting data to a higher-order device. A first method for strengthening traffic regulation for at least one of the lower and upper devices according to the usage rate of a transmission buffer that accumulates transmission data and the usage rate of transactions that process the reception buffer and the transmission buffer. A traffic regulation method characterized by setting a level and a second level toward relaxation. 2. The method according to claim 1, wherein the second level is:
A traffic regulation method characterized by being set lower than a first level. 3. In a data link access protocol control device based on the ISDN user/network interface, the device manages a receive buffer that stores data received from lower-level devices and a transmit buffer that stores sent data to be sent to higher-level devices. buffer management means for receiving data from the lower-level device and accumulating it in the reception buffer; and reception means for processing the data in the reception buffer and accumulating the data in the transmission buffer, processing means for managing transactions for processing; and transmission means for transmitting data in the transmission buffer to the higher-level device; the buffer management means calculates usage rates of the reception buffer and the transmission buffer; The processing means calculates the usage rate of the transaction, and controls the first level and the upper level device to strengthen traffic regulation for at least one of the lower and upper devices according to the calculated usage rate of the transmission/reception buffer and the transaction. A data link access protocol control device, characterized in that it sets a second level towards relaxation.