JPH03265066A - Determinant solving processing system - Google Patents

Abstract

PURPOSE:To efficiently execute the parallel processing by executing the processing in parallel by plural sets of processors to which elements in positions being at intervals by a line unit are allocated, respectively. CONSTITUTION:To a processor 2-0, elements of, for instance, a line 1, a line 4, a line 7 and a line 10 in a matrix are allocated, and to a processor 2-1, elements of a line 2, a line 5, a line 8 and a line 11 are allocated, and to a processor 2-2, a line 3, a line 6, a line 9 and a line 12 are allocated. The operation is executed in such a form as the processor 2-0 executes an erasure with regard to an element (c) first, the processor 2-1 executes an erasure with regard to an element (a), and the processor 2-2 executes an erasure with regard to an element (b)... As a result, each processor executes a calculation by using the element allocated first, and it will suffice that data related to a prescribed number of elements is only received from other processor in accordance with necessity.

Description

[Detailed Description of the Invention] [Summary] This invention relates to a determinant solution processing method that efficiently executes calculations that are summarized in the form of a series of linear equations using a band matrix as a coefficient matrix.

For example, in a distributed memory parallel processor system where each processor stores memory in a distributed manner,
The purpose is to enable efficient parallel processing.

Elements at discrete positions in the row direction of the matrix, or elements at discrete positions in the row/column direction of the matrix are assigned to multiple processors to execute processing, and the processors communicate with other processors as necessary. Configure.

[Industrial application field]

The present invention relates to a 1-determinant solution processing power equation, and particularly to a determinant solution processing method that efficiently executes calculations that are summarized in the form of a series of linear equations using a banded matrix as a coefficient matrix.

Systems of linear equations frequently appear in technical calculations in the engineering field and in scientific and technical calculations, and have a wide range of applications.In particular, problems in which the coefficient matrix is band-shaped are often used in solving partial differential equations, structural calculations, etc. has been done. In particular, in recent years there has been an increasing demand for rapidly solving large-scale systems of linear equations.
In general, it is difficult to speed up a series of linear equations with a sparse coefficient matrix using a vector computer or a parallel computer.

Ru.

(Prior art) Generally, a set of linear equations is solved by an algorithm called a direct method or an iterative method.The direct method is a coefficient matrix sweep calculation or an equivalent method, and the iterative method is an iterative calculation using initial values. Each method has advantages and disadvantages, and a method suitable for each of the nine problems is adopted.

The direct method has higher solution accuracy than the iterative method (and the solution method is relatively simple, so it is often used for problems that require precision. Sequential computers have traditionally been used to calculate the direct method. However, recently vector calculators have also been used.

In recent years, there has been a need to solve increasingly large-scale linear equations at high speed, but the direct method is difficult to parallelize because the sweep calculation procedure is basically sequential.
It was difficult to increase the speed using parallel computers.

Several parallel solving algorithms exist for a set of linear equations with a special type of coefficient matrix.

As a parallel solution method for tridiagonal matrices, there is the method of Hang (1). This method is characterized by dividing the coefficient matrix into blocks and performing coefficient elimination calculations in parallel.

(1) H, HJang: A parallel m
ethod fortridaiagonal eq.
ations, ^CM Trans, Math.

Softw, Vol. 7. No, 2. pp
, 170-183 When this method is adopted and calculation is performed in parallel by multiple processors, multiple elements (four in the illustrated case) are used as shown in Fig. 1θ.
is assigned to the processor for processing.

FIG. 10 shows the arrangement of elements in the conventional case. A and b in FIG. 10 correspond to A and b in the equation, and PEI to PE4 represent processors, respectively.

FIG. 11 and FIG. 12 show explanatory diagrams for explaining the -ang method. Note that FIGS. 12(A), (B), (C), and (D) collectively show one flowchart.

As shown in Figure 11, we are given a series of linear equations whose coefficient matrix is a band matrix with a one-dimensional number of 12 and a band width of 3, and this is to be solved.

According to the processing flow shown in Fig. 12 (A), (B), (C), and (D), the coefficients are deleted to obtain the shape of the matrix (4-5) shown in Fig. 12 (D). be done.

A. (Processing a) When the matrix (4-1) shown in Figure 12 (A) is processed by three processors, the matrix (
As shown by the dotted line in 4-1), each element is allocated to each processor.

B, (Processing, 1 to 3) Among the three processors, the first processor is element e! l eS+ e a, the second processor erases the element e*+ey+es, and the third processor erases the element ell+ ell+ el
! to be erased. That is, the first processor (
2nd line) - (1st line) xe, /a.

Execute the process to create element e! , the second processor executes the process (6 lines) - (5 lines) x e6/dB and erases the element e, and the third processor executes (10 lines) - (9 lines) Execute the process e+o/dg to create element e. and delete it.

・・・・・・・・・.

The matrix (4-2) shown in FIG. 12(B) has elements e t+ 62+ 641 e &1 e 71 e
l+ e Ill+ e Il+e1□ shows the erased state. In addition, the element g S+ g &+... appeared in the matrix (4-2) because
This appears due to the effect of the above erasing process.

C, (processing c, 1 to C13) Next, as shown in FIG. 12(B), element f t+
f ,,f 111+ r l+ r S+ f
1. Erase f 4 + f s.

A matrix (4-3) is obtained.

D, (processing d, 1 to d, 2) Then, as shown in FIG. 12(C), element es+g
About gff+gl+e! +gllll+ g+++ g
By eliminating ll, matrix (4-4) is obtained.

E, (processing e, 1 to C13) Next, as shown in FIGS. 12(C) to 12(D), elements 11s+ hw+ h 10. r I
I+ hahs+h*+ht+t+++hz+f:+
By erasing , matrix (4-5) is obtained.

[Problem to be solved by the invention]

Processing is performed as shown in FIGS. 12(A) to 12D), but in the case shown in FIGS. 12(A) to 12D), a first-order problem exists.

That is, processing (b, 1), (b, 2), (b, 3),
(c, 1).

Regarding the processing up to (c, 2) and (c, 3), three processors can perform parallel processing, but regarding the processing from matrix (4-3) to (4-5).

After the processing within each processor is completed, processing proceeds to the other processors, resulting in sequential processing.

When multiple processors are processing while accessing shared memory, parallel processing is possible by changing the data allocation, but in the case of a distributed memory system, it is necessary to change the data allocation. This increases communication costs and is not efficient.

An object of the present invention is to enable efficient parallel processing in a distributed memory type parallel processor system in which each processor holds memory in a distributed manner, for example.

[Means to resolve the conspiracy]

FIG. 1 shows a diagram of the principle configuration of the present invention. In the diagram, 1 is a host processor, 2-1 is a husband processor (element processor), 3 is a communication network, and A and b are respective linear equations. Represents a known quantity.

Processor 2-0 has row 19 in the matrix, for example.
The elements in row 49, row 71, row 10 are allocated to the processor 2-1, and the element in row 22, row 5 in the matrix is allocated to the processor 2-1.
Elements of 9 rows, 82 rows, and 11 are allocated, and for example, rows 31, 63, 91, and 12 in the matrix are allocated to the processor 2-2. That is, in the case of the present invention, elements at discrete positions are allocated.

[For production]

In the case of the present invention, let us take the example shown in FIG.

First, regarding the element indicated by C in the diagram, the processor 2-
0 performs the deletion, 9 the processor 2-1 performs deletion on the element indicated by a, and the processor 2-2 performs deletion on the element indicated by 2 in the diagram. go.

As a result, each processor only needs to perform calculations using the initially allocated elements and receive data regarding a predetermined number of elements from other processors as necessary.

〔Example〕

FIGS. 2(A) to 2(0) are explanatory diagrams for explaining the processing steps in the case of the present invention. In the case shown in FIG. 0, there is a matrix with nine dimensions and 20 and a band width of 5 represents the case.

The O mark in Figure 1 is an element with a non-zero value, and the mark is a pivot element (an element used to erase other elements).

The Δ mark is a fill-in element (“
"Elements with non-zero values"), * indicates an erased element, P is a pivot row, E is a row to be erased, and PNO represents a processor number.

(1) FIG. 2(A)... As shown by PNO in the figure, elements at discrete row positions are allocated to each of the four processors.

(2) Figure 2 (B)... Four processors receive the data of the respective pivot rows in parallel, and then use the pivot elements to erase the elements indicated by the mark in the figure. do.

(3) Figure 2 (C) to Figure 2 (0)...4
Each of the processors receives the data of the illustrated pivot row, and then erases the element indicated by the symbol , using the pivot element indicated by the symbol . As a result, a matrix in which elements have been deleted can be obtained as shown in FIG. 2(0).

3(A) to 3(F) show specific processing examples. In the case of 0, the number of one dimensions is 12 and the band width is 3 for simplicity.

FIG. 3(A) shows a situation in which elements are allocated to three processors.

Generally, if the number of processors is P.

The elements of the row given by +PXj (where j = O, l, 2..) are allocated to the K (=0.1.2...., P-1)th processor.

FIG. 3(B) shows the same matrix as FIG. 3(A),
FIG. 3(B) Under the condition shown.

(Erase of e++es, eq) Processor O sends row 0 to processor l. Processor l deletes e from the coefficients in row 0.

Processor 1 sends 4 rows to processor 2. Processor 2 deletes e from the coefficients in the 4th row.

Processor 2 sends row 8 to processor O. Processor 0 deletes e from the coefficients of row 8.

(Erasure of e!+e&+e+.) Processor 1 sends one line to processor 2. Processor 2 deletes e2 from the coefficients in one row.

Processor 2 sends 5 rows to processor O. Processor 0 deletes e from the coefficients in row 5.

Processor O sends 9 rows to processor l. Processor 1 deletes 81° from the coefficients in row 9.

(Delete es+et+e++) Processor 2 sends two lines to processor 0. Processor O deletes e from the coefficients in the second row.

Processor 0 sends 6 rows to processor l. Processor l deletes e from the coefficients in row 6.

Processor l sends 10 lines to processor 2.

Processor 2 calculates e from the coefficients in row 10.

Erase.

These processes are performed, resulting in the state shown in FIG. 3(C).

(Deleting fw, fs, fw) Processor 2 sends two lines to processor l. Processor 1 deletes [I from the coefficients in the second row.

Processor 0 sends 6 rows to processor 2. Processor 2 deletes rs from the coefficients in row 6.

Processor 1 sends 10 rows to processor 0. Processor 0 processes f from the coefficients in row 10.

Erase.

(Delete fl, [4, fl) Processor 1 sends one line to processor 0. Processor 0 deletes fo from the coefficients of one row.

Processor 2 sends 5 rows to processor l. Processor 1 deletes f4 from the coefficients in row 5.

Processor 0 sends 9 rows to processor 2. Processor 2 deletes f from the coefficients in row 9.

(Erasure of f, , f?) Processor 1 sends 4 lines to processor O. Processor 0 deletes f from the coefficients in the 4th row.

Processor 2 sends 8 rows to Processor 1. Processor 1 deletes r from the coefficients in row 8.

These processes are performed, resulting in the state shown in FIG. 3(D).

(Erasure of e 4+ g St g 61 g ?) Processor O sends 3 rows to processor 0 and processor l.

Processor 1 deletes 84 from the coefficients in row 3.

Processor 2 deletes gs from the coefficients in the third row.

Processor O deletes g from the coefficients in row 3.

Processor 1 deletes g from the coefficients in the third row.

(Elimination of ei+gw+g+.+g++) Processor l
sends 7 lines to processor 2 and processor 0.

Processor 2 deletes e from the coefficients in row 7.

Processor O deletes g from the coefficients in row 7.

Processor l deletes g+o from the coefficients in row 7.

Processor 2 deletes g++ from the coefficients in row 7.

These processes are performed, resulting in the state shown in FIG. 3(E).

(Erasure of 1+., hw, ha, Ilt) Processor 2 sends row 11 to Processor 1 and Processor O.

Processor 1 deletes fil+ from the coefficients in row 11.

Processor 0 erases , from the 11th row of coefficients.

Processor 2 deletes hl from the 11th row of coefficients.

Processor l erases , from the 11 rows of coefficients.

(Delete f, , h, , h) Processor 1 deletes 7 lines from processor O and processor 2.
send to

Processor O deletes f from the coefficients in row 7.

Processor 2 erases , from the 7th row of coefficients.

Processor 1 erases , from the coefficients in the 7th row.

Processor O erases , from the 7th row of coefficients.

(Delete fz, bt, ha) Processor O deletes 3 lines from processor 2 and processor 1.
send to

Processor 2 deletes f from the coefficients in the third row.

Processor 1 deletes hl from the coefficients in the third row.

Processor O deletes ho from the coefficients in row 3.

These processes are performed, resulting in a diagonalized image as shown in FIG. 3(F). The solution is then found using a linear equation.

xt=bt/d+ This is calculated by the processor in charge of each row.

As described above, it has been revealed that a solution to a series of linear equations whose coefficient matrix is a banded matrix can be obtained while a plurality of processors efficiently execute processing in parallel. By using this determinant solution processing method, it can be applied to, for example, solving partial differential equations using the difference method. In this case, a further developed version of the solution method explained with reference to FIGS. 2 and 3 above will be used.

Below, AD+ (Alternate Direction I+*p) using parallel processors
The solution method using the (Licit) method will be explained.

First, the principle of the ADI method will be explained using a two-dimensional Laplace's equation as an example.

Laplace's equation is.

It is given by a' x f3'' y, which is solved by giving a boundary condition, and the value on the boundary is set to 0, for example.

u (x, y) = O, (x, y) C (C represents the boundary) - Take the difference of the equation 00 and convert it into a difference equation.If you take the central difference as ui, J.

ui−, ++j”2u!+J+LIi*l+j”ui+
J-1-2ui+j+Lli, J+1"0-...
−■ Transform this.

ui, J 8 (ul-1+ j +ui mountain J +uum+
J-1+u,, 34+)・−・−・−・■ The ADI method solves equation 0 by dividing it into the following two steps.

Step 1: ui+, k″”” = (ui−++ jk″”” +u
t+++j '''I/1+ul+7-+ '' +Ll+
+J-+') -11----■Step 2; ui, j "' -(ui-1j """ +Lli
*I+ J """+ui+ j-1"' +ut+
j*1 "')-"-'-""-〇 Steps 1 and 2 are all repeated until the change in the value U, 1 on the grid point becomes sufficiently small.

If we move the unknown term of the expressions ■ and ■ to the left side, the constant term to the right side, and multiply both sides by 4, we get the 0 expression and the 0 expression, respectively (the subscripts are omitted).

-ui-++j + 4u+, J-ui+1. j = a
t+j "'-'-"-■ [However, ai, J = u
! , j-1 +ui-j'l ) )-11-j-+
+ 4ui, j-ui+j41-bi+j '-"
””””■ [However, bt, j = ur-i-j +u
l+1+ j )) From the equation 0, it is necessary to solve a system of linear equations whose coefficients are tridiagonal matrices that are simultaneously arranged in the i direction for each subscript j. Similarly, equation 0 is solved simultaneously in the j direction for each subscript i.

Note that k shown in formula 0 and formula 0 represents the number of repetitions of calculation.9For example, ui + j-1 represents the value obtained by the second calculation in the repeated calculation at the value ui + J-1 on the grid point. There is.

0en again, ke1/! represents the value obtained in step 1 for <(k+1)th calculation following the second calculation in repeated calculations at the value LIi+J on the grid point.

u! +J'4 is the value obtained in step 2 for <(k+1)th calculation following the calculation of the second time, ie.

It represents the value obtained in the (k + 1)th calculation.

FIGS. 4(A) and 4(B) show how the calculation grid area is divided.

In the case of FIG. 4(A), a mode is shown in which processors PEO to PE3 are responsible for solving the equation shown in equation 0, and in the case of FIG. 4(B), when solving the equation shown in equation 0, A mode in which the processing is shared by processors PEO to PE3 is shown.

In the case of each division mode shown in FIGS. 4(A) and (B),
This corresponds to the conventional case described with reference to FIG.

By taking this point into consideration, it is possible to utilize the pattern of discrete allocation described with reference to FIG. 2 and the like.

FIGS. 5(A) and 5(B) each show a mode in which allocation is performed intermittently.

For example, by allocating as shown in FIG. 5(A), processing corresponding to the above equation 0 can be performed. In addition, by allocating as shown in FIG. 5(B), the above 0
Processing corresponding to the expression can be performed.

FIG. 6 shows an example of two-dimensional discontinuous allocation.
In the case shown, for a matrix with 16 dimensions, 16
processors (00), (01), (02).

..., (30), (31), (32), (3
3) is shown.

Considering the manner in which allocation is performed intermittently as shown in FIGS. 5(A) and 5(B), elements with the same positional relationship that are allocated to processor PEi and processor PEj in FIGS. 5(A) and 5(B) are grouped together. , if it is allocated to one processor, it becomes possible to allocate it to nine processors in the case shown in FIGS. 5(A) and 5(B).

FIG. 6 shows a case in which this idea is developed into a matrix with 16 dimensions.

The process of solving the above equations 0 and 0 will be described below.

The number of processors is PXP, the number of grid points is N×N, 1
Let the number of grid points handled by one processor be MXM (where M=N/P). The data of the grid points handled by each processor are uu (i, j) (where i, j = 0.1. -,
M-1) as the working area of adjacent grid point data.

We will prepare us (i+j) up (IIJ) aa (i+j) (where IIJ = Or 1+ . . . , M-1).

Step l: Processing to solve the 0 equation All processors (k, 1) process the grid point data ug (*, *) that they are responsible for using the processor (k, (1+1)%P)
Transfer to. Here, i%j is the remainder when integer i is divided by integer j.

All processors (k, 1) store the sent data in us (palm, umbrella).

All the processors (k, 1) transfer the grid point data till (III) to the processor (k, (1-1))
%P).

All processors (k, 1) store the sent data in Uρ(rate, *).

All processors (k, 1) perform quadratic calculations.

a(i,j)=u+s(i,j)+up(i,j
) (i, j=o, 1. 2...., M-1)
Now, the system of linear equations for row 0 i, for which the right-hand side a(i, j) of equation (2) has been found, is as shown in FIG.

This series of linear equations is solved by the solution method explained with reference to FIG. 2 and the like. Ai,j on the right side is a horizontal series of processors (k, 1) (k= 0.1.2...M-
In 1), At,j is handled cyclically with respect to j, so the above parallel solution method can be applied as is.

The obtained solution is stored in LILI (*, *).

Step 2: Processing to solve equation 0 All processors (k, 1) convert the lattice point data uu (prison + umbrella) in charge to processor ((k + 1)%P,
Transfer to 1).

All processors (k, 1) store the sent data in 1ef.

All processors (k, 1) store the lattice point data uu (umbrella+*) in charge of Bromo Nsa ((k-1)%P, 1
).

All processors (k, 1) store the sent data in right(*, *).

All processors (k, 1) perform 9th order calculations.

a(i,j)=left(i,j)+right(
i, j) (+, j= 0+ 1+ 2...., M-
1) Now, the continuous linear equations for the 0 column j, for which the right side a(i, j) of the 0 equation has been found, are as shown in FIG.

Solving this series of linear equations in the same way, Ai,j on the right side is,
Vertical series of processors (k, 1) (1=O.

1.2. ..., M-1) handles A i , j cyclically with respect to i, so the above parallel solution method can be applied as is.

The obtained solution is stored in uu ("+").

FIG. 9 shows an example of a parallel processor system in which 16 processors operate. The boxes in the figure represent processors, and (00), (01), . . . (33) within the boxes indicate the processor numbers, respectively. Also, lines between processors represent communication connections.

〔Effect of the invention〕

As explained above, according to the present invention, there is no situation where, for example, one processor is waiting for a series of processing to be performed before another processor can perform calculations, and the amount of data exchanged between processors is also small. It has some great advantages.

In the figure, l represents a host processor, 2-1 each processor, and 3 a communication network.

Claims (2)

[Claims] (1) Simultaneous linear equations A_x=b……………………(1) That is, ▲There are mathematical formulas, chemical formulas, tables, etc.▼……(2) [However, ○ marks are a_i_j and the number of elements in the same row is arbitrary] In the banded matrix coefficient simultaneous linear equation parallel solution processing method in which the elements in the equation (2) are assigned to multiple processors and processed in parallel, the elements in equation (2) above are A processor (2-i) is provided to which elements are assigned at discrete positions in units, and a plurality of processors (2-i) are configured to execute processing on the elements assigned to themselves in parallel, and A determinant solving processing method characterized in that each processor (2-i) receives elements related to pivot rows from other processors as necessary and executes a coefficient matrix elimination calculation. (2) In an alternate direction implicit method processing method that executes an alternate direction implicit method to solve a partial differential equation using a difference method, the solution method using the above alternate direction implicit method is performed using a band matrix as a coefficient matrix. Simultaneous linear equations A_x=b……………………(1) That is, ▲There are mathematical formulas, chemical formulas, tables, etc.▼……(2) [However, the ○ mark represents a_i_j and the number of elements in the same line. is arbitrary], and processors (2-ij) to which a plurality of elements located at discrete positions in the row direction and at discrete positions in the column direction in equation (2) above are respectively allocated. A plurality of processors (2-ij) are configured to execute processing on elements assigned to themselves in parallel, and each processor (2-ij) receives elements related to the pivot row from other processors. 1. A determinant solving processing method, characterized in that a coefficient matrix is received according to the request and an elimination calculation of a coefficient matrix is executed.