JPH03262280A - Shading correction circuit - Google Patents

Abstract

PURPOSE:To form a correction signal to attain automatic correction processing by obtaining a black shading correction data while no light is made incident and obtaining a white shading correction data while light with uniform luminous quantity is made incident in the entire face. CONSTITUTION:Each image pickup output data obtained digitizing each image pickup output signal when no light is made incident in each pickup face is stored in a RAM 18 as a black shading correction data. Each image pickup output data obtained digitizing each image pickup output signal when a light with uniform luminous quantity is made incident in each pickup face is stored in the RAM 18 as a white shading correction data. A correction signal generating means 14 generates a black shading correction signal based on the black shading correction data read from the RAM 18 and generates a white shading correction signal based on the white shading correction data read from the RAM 18. Then a correction processing means 3 applies black and white shading correction processing based on a black and white shading correction signal generated by the means 14.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Industrial Field of Application The present invention relates to a first . The present invention relates to a shipping correction circuit that removes shading components from image output signals of second and third image sensors, and is applied to, for example, a signal processing system of a three-element color image sensor.

B. Summary of the Invention The present invention provides first and second pixels each having a plurality of pixels arranged in a matrix. A shading correction circuit for removing shading components of image pickup output signals of second and third image pickup devices, the circuit comprising: the first. Regarding the image output signals of the second and third image sensors, each image is digitized by each of the analog-to-digital converters in a state where the exposure is controlled by the exposure control means and no light is incident on the imaging surface of each of the image sensors. Output data and data obtained by thinning each image pickup output data digitized by each of the above analog-to-digital converters to a data number of 1/n with a uniform amount of light incident on the entire imaging surface of each of the above image sensors. is dot-sequentially stored in a storage means as shading correction data, and a shading correction signal is formed by a shading correction signal forming means based on the shading correction data read out from the storage means, and when photographing, the correction signal is formed. Based on the shading correction signal formed by the means, black shading correction processing and white shading correction processing are automatically performed on the image pickup output signal of the image pickup device.

C. Conventional technology Conventionally, the imaging output signal obtained from an imaging device is accompanied by shading, that is, distortion of brightness over a relatively wide range of the screen, caused by various causes such as uneven sensitivity of the imaging device and the influence of dark current. It is known. For example, a charge coupled device (CCD)
In solid-state imaging devices such as CCD imaging devices formed by PLED devices, image sensors are provided that adopt various methods for transferring signal charges, such as a frame transfer type, an interline transfer type, and a frame interline transfer type. However, in both methods, the signal charges of multiple pixels arranged in a matrix are transferred in the vertical direction and sequentially read out one horizontal line at a time in one horizontal scanning period via a horizontal transfer register. Since the imaging output signal is obtained by reading out the signal charges of all pixels for one screen in a period, a dark current proportional to the time of transfer to the horizontal transfer register is added to the signal charges. This dark current causes brightness changes in a sawtooth waveform during one vertical scanning period, that is, shading in the vertical direction. Further, the dark current in the horizontal transfer register causes a sawtooth-like luminance change in one horizontal scanning period, that is, horizontal shading.

In general, the above-mentioned shading includes white (modulation) shading in which the output is small at the periphery of the screen, and black (superimposed) shading in which the black level is not uniform across the screen.

Shading correction processing is performed by mixing the shading correction signal with the imaging output signal in an analog manner using a multiplier for white shading and an adder for black shading. The shading correction signal is formed by creating sawtooth wave signals and parabolic wave signals in both horizontal and vertical directions and combining them.

In conventional shading correction circuits, the output level of each signal generator for the sawtooth wave signal and parabolic wave signal can be variably adjusted by manual operation using a level adjuster such as a volume control, so that appropriate shading correction processing can be performed. The output level of each of the signal generators was manually adjusted while watching the waveform monitor.

In addition, the color components of the subject image can be changed to, for example, a red component, a green component,
In a three-element color imaging device that separates the color into blue components and images each color component individually using three imaging elements,
Shading correction processing is performed for each image sensor.

D Problems to be Solved by the Invention Incidentally, in conventional shading correction circuits, in order to perform proper shading correction processing, the output level of each signal generator for sawtooth wave signals and parabolic wave signals is adjusted without looking at the waveform monitor. Since the adjustment was done manually, it was necessary to spend a lot of time on the adjustment work in order to make the adjustment accurately. In the imaging apparatus, there is a problem in that it is necessary to perform shading correction processing for each of the imaging elements, and the adjustment work requires a great deal of effort and time.

Therefore, in view of the problems of the conventional shading correction circuit as described above, the present invention provides first shading correction circuits each having a plurality of pixels arranged in a matrix. In the shading correction circuit that removes the shading components of the image pickup output signals of the second and third image pickup elements, appropriate shading correction processing is performed quickly and in 9Tt! , the shading correction data necessary for shading correction is formed from the imaging output signal obtained by each imaging element and stored in a storage means, and the storage means is used during actual imaging operation. The shading correction data is read from the shading correction data, and the correction processing means automatically performs black shading correction and white shading correction on the image pickup output signal of each of the image pickup devices using the shading correction signal formed by the correction signal forming means based on this shading correction data. The present invention provides a shading correction circuit that can perform shading correction.

E. Means for Solving the Problems In order to solve the above problems and achieve the above objects, the present invention provides first and second pixels each having a plurality of pixels arranged in a matrix. A shading correction circuit for removing shading components of image pickup output signals of second and third image pickup devices, the circuit comprising: the first. Exposure control means for the second and third image pickup devices, and the first. The first step is to digitize the image pickup output signals of the second and third image pickup devices. second and third analog-to-digital converters, and each image pickup output digitized by each of the analog-to-digital converters in a state where the exposure is controlled by the exposure control means and no light is incident on each image pickup surface of the image pickup device; Data and each image pickup output data digitized by each of the above analog-to-digital converters with a uniform amount of light incident on the entire surface of each image pickup surface of the above image sensor are thinned out to the number of data of 1/n. A storage means for dot-sequentially storing shading correction data as shading correction data, a correction signal forming means for forming a shading correction signal based on the shading correction data read from the storage means, and shading formed by the correction signal forming means during photographing. and a correction processing means for performing shading correction processing on the image pickup output signal of each of the image pickup devices based on the correction signal,
The present invention is characterized in that the output signal of the digital converter is supplied to a subsequent signal processing circuit as an image pickup output signal that has been subjected to shading correction processing.

F Function In the shading correction circuit according to the present invention, the first . Each imaging output signal when no light is incident on each imaging surface of the second and third imaging elements, and each imaging output signal when a uniform amount of light is incident on the entire imaging surface are converted into analog and digital signals, respectively. Digitize with a converter.

The storage means digitizes each imaging output signal digitized by the analog-to-digital converter and stores each imaging output data point-sequentially as shading correction data thinned out to 1/n data. Each image pickup output data obtained by digitizing each image pickup output signal in a state where no light is incident on each of the image pickup surfaces is stored in the storage means as black shading correction data. Furthermore, each image pickup output data obtained by digitizing each image pickup output signal in a state where a uniform amount of light is incident on the entire surface of each image pickup surface is stored in the storage means as white shading data. The correction signal forming means forms a black shading correction signal based on the black shading correction data read from the storage means, and forms a white shading correction signal based on the white shading correction data read from the storage means. do. The correction processing means performs black shading correction processing and white shading correction processing on the image pickup output signal of the image pickup device using the black shading correction signal and white shading correction signal formed by the correction signal forming means during actual photographing. .

G. Embodiment Hereinafter, an embodiment of the shading correction circuit according to the present invention will be described in detail with reference to the drawings.

The embodiment shown in FIG. 1 is an embodiment in which the present invention is applied to a three-panel color imaging device. The second and third image sensors (I
RG obtained by R), (IG), (IB)
B Imaging output signal ER of each channel, E6. It comprises a correction processing circuit (3) to which Es is supplied via preamplifiers (21?), (2G), (2B).

In this example, the image sensor (IR), (I
G).

(IB) constitutes the imaging section of the three-panel color imaging device, and includes an imaging lens (4) and an iris mechanism (5).
, a color separation prism (6), and the like. In addition, the above image sensor (IR) (IG)
, (IB) is a CCD image sensor in which MXN pixels Sll to SMN, M in the horizontal direction and N in the vertical direction, are arranged in a matrix as shown in FIG. It is driven by a CCD drive section (not shown) so that the signal charges of all pixels S, -S□ for one screen are read out.

The first image sensor (IR) then outputs an imaging output signal E of the red component of the subject image color-separated by the color separation prism (6) as an R channel signal through the preamplifier (2R). and is supplied to the correction processing circuit (3). Further, the second image sensor (IG) sends an imaging output signal E of the green component of the subject image color-separated by the color separation prism (6) as a G channel signal through the preamplifier (2G). and is supplied to the correction processing circuit (3). Further, the second image sensor (IB) outputs an imaging output signal E of the blue component of the subject image color-separated by the color separation prism (6) as a B channel signal via the preamplifier (2G). and is supplied to the correction processing circuit (3).

The correction processing circuit (3) also includes the image sensor (IR
), (IG), (IB)
Black shading correction processing and white shading correction processing are performed on the imaging output signals E, l, E, , El of each channel, and the imaging output signals ER, E
, , subtracters for each RGB channel to which Ell is supplied (
8R), (8G), and (8B), and the subtracted output signals from these subtracters (8R), (8G), and (8B) are input to variable gain amplifiers (9R) and (9B), respectively.
G), (9B) dividers for each RGB channel (IOR), (IOC), (IO
B) and ′ζ.

In this correction processing circuit (3), each of the above subtracters (8R
), (8G), and (8B) perform black shading correction processing on the imaging output signals ER, Eo, and EB of each RGB channel, and each RGB channel is supplied from a shading correction signal forming section (14) described later. Black shading correction signal BR3II + Bcsu
BBSI+ is the above imaging output signal ER+ Ec +
Black shading correction processing is performed by subtracting from EB. In addition, each of the above variable gain amplifiers (9R),
(9G).

(9B) is the imaging output signal ERE of each RGB channel.
For c and En, signal level adjustment such as 8-round white balance adjustment and rack balance adjustment is performed, and RGB is supplied from the system controller (27) described later.
Each gain is controlled by a control signal for each channel. Furthermore, each of the above-mentioned dividers (IOR).

(IOC) and (10B) perform white shading correction processing on the imaging output signals ER, Ec, and Es of each RGB channel. Shading correction signal WIIS)l I WGSH
White shading correction processing is performed by dividing the image pickup output signals ER, EG, and En by IWBsl+.

Note that the above dividers (IOR), (IOC), (
IOB) includes white shading correction signals WR, , W
, , ll, WB, and a multiplier that multiplies the imaging output signals ERIEG and El of each RGB channel by the reciprocal of WB and H may be used.

The image pickup output signals ER1EG and EI+, which have been subjected to the correction processing by the correction processing circuit (3), are sent to the Pliny circuit (IIR) from the correction processing circuit (3), respectively.
, (IIG), (JIB) to the A/D converter for each RGB channel (12R), (12G),
(12B).

Here, the above Pliny circuit (IIR), (IIG)
, (IIB) is the above A/D converter (12R),
In order to prevent the input signal levels of (12G) and (12B) from exceeding the dynamic range, nonlinear processing is performed on the imaging output signals EREG and El of the RGB channels output from the correction processing circuit (3).

Furthermore, the above A/D converter (12R), (12G)
, (12B) forms level data indicating the signal level of each of the imaging output signals ER, Ec, and EE subjected to the correction processing by the correction processing circuit (3). The above A/D converter (12+?), (12G)
The level data of the imaging output signal EREG Ee of each RGB channel obtained by , (12B) is the shading correction processed imaging output simultaneous data, DR, D
c, DB are defect correction processing circuits (13R
), (13G).

(13B) through the shading correction signal forming section (13B).
4) and is supplied to a subsequent stage signal processing circuit (not shown).

In addition, the defect correction processing circuit (131?), (13
G), (13B) is the above image sensor (IR),
Signal charges due to defective pixels of (IG) and (IB), that is, imaging output signals of each RGB channel ER1EG, E
For E, defect correction processing is performed to correct the signal level of the image sensor (IR), (IG
) and (IB), the defect correction process is performed based on level data of defective pixels detected in advance.

Further, the shading correction signal forming section (14) includes:
Imaging output simultaneous data D+t for each RGB channel above
, DG, and DR are supplied to each low-pass filter (15R
), (15G), (15B), and the above-mentioned imaging output simultaneous data DR9D0. A data selector (16) to which DB is supplied, this data selector (16)
) A data processing circuit (17) to which point sequential data D (R/G/B) selected by Acce
Working memory (18) by ss Memory)
and electrically erasable read-only memory (E
EPROM: Electrically erased
ble and programmable read
Backup memory (0nly Memory)
19), black shading correction data D (B R3II) outputted point-sequentially from the data processing circuit (17).
/ B c, sll/B 11s11) to RGB
Data selector (20) distributed to each channel, white shading correction data D (WR3H/WGS)1/ which is output point-sequentially from the data processing circuit (17).
A data selector (21) that distributes WB3H) to each RGB channel, black shading correction data D (BR3H), D [BGSl+), D of each RGB channel distributed by the data selector (20).
D/A converters (22R), (22G), (22B) that respectively convert CB++sH) into analogs; white shading correction data D (WR3H) for each RGB channel distributed by the data selector (21);
Each D/A converter (23R), (23G), (2
3B), these D/A converters (22R), (22
G), (22B), (23R), (23G
), (23B) are provided on the output side of each low-pass filter (24R), (24G), (24B).

It is composed of (251?), (25G), and (25B).

In this shading correction signal forming section (14),
The above low-pass filter (13R), (13G),
(13B) is the above A/D converter (13R)
, (13G), (13B) whose cutoff frequency is 1/8 of the clock frequency, the digital filter has a cutoff frequency of 1/8 of the clock frequency of
Bandwidth limiting processing is performed to limit the band to ⅛.

Further, the data selector (16) receives the simultaneous imaging output data DR, Dc, and Di of each R, G, and B channel that has been subjected to band-limiting processing by the low-pass filters (13R), (13G), and (13B). Each channel is selected dot-sequentially to form dot-sequential data (DCR/G/B) in which the number of data is thinned out to 1/8. The point sequential data D[
R/G/B) are all pixels S of the image sensor (IR), (IG), and (IB) shown with diagonal lines in FIG.
, ~SHN, the signal level of the image pickup output signal based on the signal charge of every 8 pixels is shown point-sequentially.

Here, the image sensor (IR), (IG), (
IB) is the iris mechanism (5) of the imaging optical system (7)
The drive unit (28) is the system controller (27).
When detecting the black shading characteristic, the imaging operation is performed with the iris mechanism (6) closed and no light enters each imaging surface, and when detecting the white shading characteristic. In this case, the iris mechanism (5) is opened, and an image is captured using a white pattern such as a voltaic pattern so that a uniform amount of light corresponding to 100% brightness is incident on the entire imaging surface.

The data processing circuit (17) then generates black shading correction data D (B R2O/B GsH/
BBSI+) and white shading correction data D
CWRsl, /W6, 11/W□□] is the point sequential data D CR/G supplied from the data selector (16).
/B'J and stored point-sequentially in the working memory (IB) as shown in FIG. Further, the data processing circuit (17) inputs the black shading correction data D (B R2O/B GSH/B B
s++ ) and white shading correction data D (WR
3II/Wc5H/WBS□] are read out point-by-point and outputted via the respective selectors (20) and (21).

In this embodiment, the data processing circuit (17) includes:
Point sequential data D indicating signal levels of image pickup output signals based on signal charges of every 8 pixels of all pixels Sll to SMN of the above-mentioned image sensors (IR), (IG), and (IB) in a point sequential manner.
(R/G/B), as shown in Fig. 2, by integrating the level data indicating the imaging output level of the pixels at the same positions Phl to Phff1 in the horizontal direction,
Data string D (j2.+~ph,,) showing horizontal shading characteristics using level data with increased S/N
, and forms horizontal shading correction data point-sequentially from this data string D (J2h+~!1.), and also indicates the imaging output level of the pixels at the same positions PVl~Pv□ in the vertical direction. Data string D C1v, -F that shows vertical shading characteristics using level data with increased S/N by integrating level data.
! v, ), and this data string D (I!, v, −/2
Vertical shading correction data is formed point-sequentially from v, ).

Such a data processing circuit (17) is configured as shown in FIG. 4, for example.

That is, in the data processing circuit (17) shown in FIG. 4, the point sequential data D from the data selector (15) is
(R/G/B) is supplied to a clip circuit (31). This clipping circuit (31) uses the point sequential data D
Regarding (R/C, /B), the above image sensor (IR),
After dot-sequentially subtracting the average value for each full screen of (IG) and (IB), clipping to the lower n bits is performed, and this clipped point-sequential data D (R/G/13) is It is supplied to the downsampling circuit (32). This downsampling circuit (32) uses a digital filter having a transfer function H(z) of 4 2 4, for example, to transfer the clipped point sequential data DCR/G/B to the image pickup device (IR), (IG), (IB)
The point sequential data D (R
/G/B) band is limited to 1/16.

The point sequential data D (R/G/B) that has been downsampled by this downsampling circuit (32) is
It is supplied to the accumulator (33). This accumulator (33) stores the above point sequential data DLR/G/B)
As shown in FIG. 2, using the working memory (18), the same position Phl to P in the horizontal direction.

By simultaneously adding and integrating level data indicating the imaging output level of pixels located in each image sensor (IR),
Black shading correction data DCBR3) l/B GSH/ is used as shading correction data according to the horizontal shading component of each (IG) and (IB)
B ss□〕□ and white shading correction data D
CWR3)l / WGSII / WllSHE
o point-sequentially, and by integrating level data indicating the imaging output level of pixels located at the same position Pvl-Pvffl in the vertical direction, each image sensor (
Black shading correction data D (B R3II/B
6so /B++s++)v and white shading correction data D (WR-11/V/cs++/WnsH
) form v point-sequentially. Here, the horizontal black shading correction data D (BRSII
/B, Sll /BESII) n and white shading correction data D (WR5II/WGSII /WBS
H) H is formed by synchronous addition on each register, and the vertical black shading correction data D [B R511/B cslI/Bns++
]v and white shading correction data D[WBSH/
WGS)l/WBSH)v are each formed by synchronous addition on the memory using the working memory (18).

In this way, the image pickup elements (IR), (IG), which are formed from the point sequential data D (R/G/B),
(IB) horizontal black shading correction data D
(B□SH/ B csu / B BS□], 1 and white shading correction data DCWRslI/WG5□/
WB31+], 1 and vertical black shading correction data DCBR5°/B cso/B BSH)
V and white shading correction data D (WBSH/
WGSH/WBSII) v are respectively written and stored in the working memory (18) point-by-point.

Further, horizontal black shading correction data D (BR3II/B
GsH/B15H)lI and white shading correction data D (WRSII/WG, +1/WBSM:]
H and vertical black shading correction data D (B
11311 / BGSH / BBSH) V and white shading correction data D (WRSII / Wc5l
l/WllsH) v is the image capture output signal ER, Eo, Eel of each RGB channel that performs shading correction processing.
When applying the data, the data is read out point-by-point from the working memory (18) and supplied to the data separator (35) via the buffer (34).

3 The data separator (35) stores horizontal black shading correction data D (B ns++ / B cs
o / BBSH) H and white shading correction data D (WBSH/WGS+l /WBSH) H and vertical black shading correction data D (B R3II/
B GSII/B Bsh) - and white shading correction data D (WRsH/wGSII/WBSI
I) V is separated from the horizontal black shading correction data D (B R5II/B csu/
B115ll]H and white shading correction data D(
WRslI/Wc5n/Wn=ll)H is supplied to the interpolation processing circuit (36), and the vertical black shading correction data D[BBSH/BGS)I
/BBSII]v and white shading correction data D (WBSII/WGSH/WIISR) are supplied to each adder (37) and (3B).

The interpolation processing circuit (36) includes the data separator (
Horizontal black shading correction data D (BR5H/BGSII/BnsH'l) supplied dot-sequentially from 35) at a data rate of 1/8 of the clock frequency.
H and white shading correction data D (WBSH/W
4 GSI (/WBSM) □ is subjected to average value interpolation processing, and the black shading correction data D (BR5H
/ B GSII / B Ils□〕□ and the above white shading correction data D (WBSII / W6sl
I/WnsH) u and output at 1/4 data rate.

Horizontal black shading correction data D at 1/4 data rate obtained by the interpolation processing circuit (35)
(B*so/BcsH/BBSII)ll is supplied to the adder (37). This adder (37
) is the horizontal black shading correction data D(
BBSH/BGSH/BBSH) H and the above vertical black shading correction data D CB R3II /
BGSH/BBslI)v to form horizontal and vertical black shading correction data DCBR3H/B, sH/BIlsH] and output via the clip circuit (39).

Also, 1/4 obtained by the interpolation processing circuit (36)
The horizontal white shading correction data D (WBSH/WGSH/WBS+()s with a data rate of is supplied to the adder (38).
) is the horizontal white shading correction data D [
WRsH/W5. H/WBsH)l, and the above vertical white shading correction data D (WR3II/W
GSM /W++5lI)v is added to obtain horizontal and vertical white shading correction data D (W R
S+1/Wc=, .

/WBSH) and output via the clip circuit (39).

Black shading correction data D (BR3□/Bcs) outputted point-sequentially from the data processing circuit (17).

/B 13M) is supplied to the selector (20)
is the black shading correction data D (B R3I
I/Bcs.

/BEs□] to the D/A converters (23R), (23G), . And the above D/A converter (23R), (23G)
, (23B) is the black shading correction data D (BR3I+) supplied from the selector (20).
), D (Bcso), D [BES+1
) are converted into analogs.

The above black shading correction data D (BR5I+)
The output signal of the D/A converter (23R) that converts into analog is sent to the R channel subtracter (8R) of the correction processing circuit (3) via the low-pass filter (25R) as a black shading correction signal B R2O. Supplied as.

In addition, the above black shading correction data D (BcsH)
The output signal of the D/A converter (23G) that converts the signal into an analog signal is sent to the G channel subtracter (8G) of the correction processing circuit (3) via the low-pass filter (25G) as a black shading correction signal B GSH. Supplied as.

Furthermore, the above black shading correction data D CB++
The above D/A converter (23B
) is passed through the low-pass filter (26B) to the B channel subtracter (
8B) as a black shading correction signal BESM.

Further, the white shading correction data D (W.sll/
WasH/WBS□] is supplied to the above selector (
21) is the white shading correction data D [W++
sH/Wc5H/WBsw) to the D/A converters (24R), (24G),
(24B), and is configured by, for example, a latch circuit. Then, the above D/A converter (24R
), (24G) (24B) are the selector (2I
) The above white shading correction data D supplied from
(BRSI+], D (BGSH:], D
(BR5H) are respectively converted into analogs.

The above white shading correction data D [WllSN]
The output signal of the D/A converter (24R) that converts the signal into an analog signal is sent to the R channel divider (8R) of the correction processing circuit (3) as a white shading correction signal WR5H via the low-pass filter (26R). Supplied. In addition, the white shading correction data D [Wc5l+
The output signal of the above 1)/A converter (24G) which converts
The white shading correction signal W6. Supplied as l+. Furthermore, the white shading correction data DCW [
The above D/A converter (24B
) is passed through the low-pass filter (26B) to the B-channel divider (26B) of the correction processing circuit (3).
8B) as a white shading correction signal WEs□.

The shading correction circuit of this embodiment is controlled by the system controller (27) as shown in the flowchart of FIG.

That is, when the shading correction mode is set, first, a black shading characteristic detection operation begins, and in a first step S1, the iris mechanism (6) is closed. As a result, the above image sensor (II?), (IG)
, (1B) performs an imaging operation in a state where no light is incident on each imaging surface.

In the next second step S2, the working memory (1
8) black shading correction data D (B*s+l/
B csH / B ssw ) are all set to 0, and white shading correction data D (W*s++ /
WGSM /WBs□] are all set to 1.

Then, in the next third step S3, the image pickup elements (IR) (IG),
Imaging output signal ER+EG obtained by (IB).

Regarding E8, the data processing circuit (17) generates black shading correction data D (B ll5H/ B Gso /
B IIs++: 1 is formed and the above working memory (
18) are stored point-sequentially.

In the next fourth step S, the data processing circuit (17
), the black shading correction data D (BRSH/BGSI-1/
BBs□] and white shading correction data D (WRS
M/Wc5o,/WBSM) are read out point-sequentially, and the image sensors (IR), (IG), (
shading correction processing is performed on the imaging output signals ER, EG, and EB from the IB) by the correction processing circuit (3);
Imaging output signals ER, EC, which have undergone shading correction processing
The black shading correction error for EE is detected by, for example, the least squares method.

In the next fifth step S5, it is determined whether the black shading correction error of the shading-corrected image output signals ER, Bc, and E++ detected in the fourth step S4 is less than a predetermined amount. If the determination result in this fifth step S5 is rNOj, that is, the shading correction error is large, the process moves to a sixth step S6 and the system controller (27)
Each variable gain amplifier (9R) of the correction processing circuit (3) is configured to reduce the shading correction error by
After performing the gain control in (9G) and (9B), the process returns to the second step S2 and repeats the operations from the second step S2 to the sixth step S6. Also,
If the determination result in the fifth step S5 is rYESJ, that is, the shading correction error is large,
Imaging output signal E that has undergone shading correction processing.

When the shading correction errors of Ec, .

In this seventh step S, a determination operation is made as to whether or not to perform a white shading characteristic detection operation, and the rNOJ of the determination result, that is, if the white shading characteristic detection operation is not performed, the shading characteristic detection mode is changed. Finish the control operation. In addition, the seventh step S7
If the determination result in step S is rYEsJ, that is, when the white shading characteristic detection operation is performed, the next eighth step S is performed.

Move to.

In this eighth step Sll, the iris mechanism (6
). Then, the image sensor (IR) (IG
), (1B) uses a white pattern such as a voltaic pattern to perform imaging in a state where a uniform amount of light corresponding to 100% brightness is incident on the entire imaging surface, and then performs the next ninth step S9. Now, the image pickup elements (IR), (IG), (11
Regarding the imaging output signals ER, E, ,E, obtained by 3), the data processing circuit (17) generates white coloring correction data D (WRSH/Wcs++/) based on the point sequential data D (R/G/B,). WBSH
) and store it in the working memory (18) point-sequentially.

Next 10th step S. Now, the above data processing circuit (
17), the black shading correction data D (B R3l1/B a
su/Bll5H) and white shading correction data D [WR3+(/WasII/WesH) are read out point-sequentially, and the image sensor (IR), (IG)
, (IB) performs shading correction processing on the imaging output signals ER, EG, and Ee by the correction processing circuit (3), and produces an imaging output signal ER that has undergone shading correction processing.
, Ec, and El, the white shading correction error is detected by, for example, the method of least squares.

In the next 11th step Sl+, the above 10th step S
The shading-corrected imaging output signals E, , E6, detected at I2. It is determined whether the white shading correction error of EB is below a predetermined amount. If the judgment result in the 11th step S is 1NO, that is, the white shading correction error is large, 1.
Moving to the twelfth step S+z, the system controller (27) changes the gains of the variable gain amplifiers (9R), (9G), (9B) of the second correction processing circuit (3) to reduce the white shading correction error. The above working memory (
18) Above white shading correction data D (WR3I
After setting all I/WGSH/W11511) to 1, the process returns to the ninth step S and repeats the operations from the ninth step S to the thirteenth step SI3. Further, if the determination result in the 11th step Sl+ is YESJ, that is, the white shading correction error of the image pickup output signals ER, Ec, and Eu that have undergone shading correction processing becomes less than a predetermined amount, the white shading characteristic detection operation is terminated, and the white shading characteristic detection operation is terminated. After moving to step S13 and performing white balance adjustment processing, the control operation of the shading characteristic detection mode is ended.

In the thirteenth step SI3, the image sensor (IR)
Regarding the imaging output signals ER, Ec, and Ee of each RGB channel obtained by , (IG), and (IB),
In this way, the black shading correction data D (BR-
Black shading correction processing and white shading correction data D based on H/Bcs++/BBSH)
The above correction processing circuit ( 3) Each variable gain amplifier <9R), <9G)
, (9B) to perform white balance adjustment.

Here, the image sensor (IR), (IG), (
The detection operation of the shading characteristic, that is, the black shading characteristic when no light is incident on each imaging surface of IB) is as follows.
The detection operation of the white shading characteristic can be performed at any time by closing the iris mechanism (5), but the detection operation of the white shading characteristic is carried out using a white pattern such as a Voltaic pattern, for example, when the image sensor (IR), (IG )(IB)
It is necessary to perform imaging with a uniform amount of light corresponding to 100% brightness incident on the entire surface of each imaging surface, and this cannot be done frequently. The shading correction data is stored in the backup memory (19) using the EEPROM.

Generally, the shading characteristics of an image sensor exhibits a larger change at the periphery than at the center of the imaging surface, so by thinning out data so that the number of data at the center of the imaging surface is reduced, the backup memory (19) can be Storage capacity can be saved.

For example, for example, horizontal white shading correction data D (
WRS)l / WGSH/WISH]u is subjected to a downsampling process in which the number of data is thinned out to 1/8 at the periphery of the imaging surface, and to 1/12B at the center, and in the vertical direction. For the white shading correction data DCW, lsH/WGSH/WB, H)v, downsampling processing is performed to thin out the number of data to 1/4 at the periphery of the imaging surface and to 1/32 at the center. administer.

In this example, the latest white shading correction data D (
WR3II/Wc5lI/WIISM) is read from the working memory (18), the data is thinned out by performing downsampling processing, and stored in the backup memory (19), and the data read from this buffer memory (19). a processing circuit that performs interpolation processing on a small number of white shading correction data and writes it as white shading correction data into the working memory (18) via a buffer circuit (41);
40) is provided in the data processing circuit (I7).

In the data thinning and interpolation processing in the processing circuit (40), for example, the transfer function H(z) is 4 2
This can be achieved by using 4 digital filters and sequentially halving (doubling) the rate of data passed through them.

Further, in the shading correction signal forming section (13), the D/A converters (23R), (23G),
(23B) to low pass filter (25R), (2
5G) and (25B) to the correction processing circuit (3).
) Black shading correction signal BIISNr of each RGB channel supplied to
/A converter (24R), (24G), (24B
) to low pass filter (26R), (26G)
, (26B) to the correction processing circuit (3), the white shade ink correction signal WR5I(lWG
SH+ W++sH are the above-mentioned low-pass filters (25R), (25G), (25B) (26R), respectively.
), (26G), and (26B), the waveforms of rising edges and falling edges become dull, as shown by the broken line in A in Figure 6, and there is a risk that proper correction processing cannot be performed. be.

Therefore, in the shading correction signal forming section (13) in this embodiment, the horizontal black shading correction data D (BI
ISH/BGSII/BnslI) M and white shading correction data D (WRs++/Wa3H
/WBSII) When reading u, by repeatedly reading out the leading data of each line for a period T early, the low-pass filter (
25R).

(25G), (25B), (26R), (
26G) and (26B) during which the influence of waveform distortion due to the filter characteristics is normalized during the correction period T. Avoid appearing in
To enable appropriate correction processing to be performed.

As described above, in the shading correction circuit of this embodiment, the first . Second
and the third image sensor (IR), (IG), (I
Regarding the imaging output signals ER, EG, and E in B), RGB
A/D converter for each channel (12R), (12G
), (12B), each image sensor (IR), (
Since shading correction data for each IG) and (IB) is formed and stored in a working memory (18) using RAM, during actual imaging, based on the shading correction data read out from the working memory (18), Each image sensor (IR), (IG), (
A shading correction signal is formed for each image sensor (IR), (IG), (IB), and the imaging output signal ER, E6. Shading correction processing can be automatically applied to EB.

Moreover, in the shading correction circuit of this embodiment, the iris mechanism (5) allows the first . Exposure is controlled so that no light enters the respective imaging surfaces of the second and third image sensors (IR), (IG), and (IB), and in this exposure control state, the image sensors (IR), (IG) , (IB) image pickup output signals ER, E, EB are sent to A/D converters (12R), (12G), (12
Image capture output data DR, DG digitized by B)
, D, to each image sensor (IR), (IG), (
IB) black shading correction data D (BR5I)
+ ), D (Bcs++), D (BesI
+) is formed. In addition, the iris mechanism (5) allows the first, second and third imaging elements (IR) and (IG) to be connected to each other.
, (IB), the exposure is controlled so that a uniform amount of light is incident on the entire surface of each imaging surface, and in this state, the image sensor (IB) is exposed.
R), (IG) (IB) imaging output signals ER, EG
, Ew are digitized from the imaging output data Di, Dc, and DB of each RGB channel to each image sensor (IR).
, (IG), (IB) white shading correction data D [WRsl+).

D (WGSll) and D (Wnsl+) are formed. Then, the black shading correction data D(
BR, □〕.

D (B63K), D (Baso) and white and white thinning positive data D (WBSH), D
(WGSll), D (WBSH) are stored in the working memory (18), so during actual imaging, the black shading correction data D [BRsl+:], read out from the working memory (18).
D[:BGSH), D(BBsl+) and white shading correction data D[WRSH), D(
Wcs++:l, DCWESM] based on the black shading correction signal BR3HI BGSHI
BESM and white shading correction signal WR3+-
1. Form Wc5o + WBSH to quickly and reliably apply black shading correction processing and white shading correction processing to the imaging output signals ER, Ec, and EB of each of the above-mentioned imaging elements (IR), (IG), and (IB). be able to.

Furthermore, in the shading correction circuit of this embodiment, the first
．． Second and third image sensors (IR), (IG) (I
Regarding the imaging output signals E, EG, EIl in B), the imaging output signals ER, E, in a state where no light is incident on each imaging surface.
, E, each digitalized image pickup output data is thinned out to 1/8 of the number of data to obtain point-sequential black shading correction data D (BR3II/Bcsll/BBS
H), and the imaging output data DR, DG, and DIl obtained by digitizing the imaging output signals ER, Ec, and Es with a uniform amount of light incident on the entire surface of each imaging surface are each 1/8 White shading correction data D [WR3ll/ Wc, lI/ WIISH
), the amount of shading ink correction data can be reduced, and the point-sequential black shading correction data D CB R3II / B csl
l/B B511) and white shading correction data D CWR3II/WGSII/WESll
) are collectively stored in the working memory (18), so it is possible to perform shading correction for multiple image sensors without requiring multiple storage means for storing black shading correction data and white shading correction data for each image sensor. Various necessary shading correction data can be stored in one memory.

Furthermore, in the shading correction circuit of this embodiment, the analog-to-digital converter (
The imaging output data DR, Dc, and Di digitized by 12R), (12G), and (12B) are digitized by each image sensor (IR), (IG), and (IB), respectively. (I
G), (IB) image pickup output signal ER, Ec of each pixel
, Ee are integrated in the horizontal and vertical directions to obtain black shading correction data D (BR3□/B cs++/
B B511) H and white shading correction data D (WIISH/Wc, so7 WBSH) s
and black shading correction data according to the vertical shading component D CB R3II / B GSH /
B as□]9 and white shading correction data D[
:WR3H/Wc5ll/WIISH) Since v is formed as shading correction data, the amount of shading correction data used for shading correction can be reduced, and the shading correction data can be stored using the working memory (1B) with a small storage capacity. Can be memorized.

Furthermore, in the shading correction circuit of this embodiment, a RAM working memory (18) and an EEPPPM are used as storage means for storing shading correction data.
By providing a backup memory (19) according to the above, the working memory (18) can be used to perform shading correction data formation processing and shading correction processing based on this shading correction data,
The shading correction data can be stored for a long period of time using the backup memory (19). Moreover, since the backup memory (19) stores shading correction data thinned out so that the number of output data corresponding to the center part is smaller than the output data corresponding to the edges of the image sensor, the storage capacity is It is possible to use a relatively inexpensive EEPROM with a small amount of memory.

Note that the present invention is not limited to the above-described embodiments. For example, in the above-mentioned embodiments, the first, second, and third imaging elements (II?), (1il;), (IB)
The image pickup output signals ER, Ec, and EB are subjected to analog shading correction processing by the correction processing circuit (3), but the A/D converters (12R), (12G), (12B) ) is provided with a correction processing circuit that performs digital shading correction processing, and each of the above selectors is connected to this correction processing circuit (
20), black shading correction data D [B15l+), D [BG!] via (21). , H:l
, D (BESH:l and white shading correction data D [WIISII 1. D (W, Sll
], DrWB311].

Effects of the Invention H As described above, in the shading correction circuit according to the present invention, the first. Regarding the imaging output signals of the second and third imaging elements, black shading correction data for each imaging element is formed from each imaging output data obtained by digitizing each imaging output signal in a state where no light is incident on each imaging surface. In both cases, white shading correction data for each image sensor is obtained from each image sensor output data obtained by digitizing each image sensor output signal with a uniform amount of light incident on the entire surface of each image sensor. Forming a black shading correction signal and a white shading correction signal based on the black shading correction data and the white shading correction data, and automatically performing black shading correction processing and white shading correction processing on the image pickup output signal of each of the image pickup devices. I can do it. That is, the shading correction circuit according to the present invention automatically detects the black shading component and the white shading component for each of the image sensors, and applies black shading correction processing and white shading correction processing to the image pickup output signal of each of the image sensors. can be applied quickly and reliably.

Further, in the shading correction circuit according to the present invention, the first
．． Regarding the imaging output signals of the second and third imaging elements, each imaging output data obtained by digitizing each imaging output signal in a state where no light is incident on each imaging surface is thinned out to 1/n the number of data, and black shading is performed. In addition, each image pickup output data obtained by digitizing each image pickup output signal with a uniform amount of light incident on the entire surface of each image pickup surface is thinned out to 1/n of the number of data and used as white shading correction data. Therefore, the amount of shading correction data can be reduced. Furthermore, since the black shading correction data and the white shading correction data are collectively stored in the storage means point-sequentially, the black shading correction data can be stored for each image sensor. FIG. 7 is a waveform diagram of a shading correction signal that stores white shading correction data.

Various types of shading correction data necessary for shading correction of a plurality of image sensors can be stored in one storage means without requiring a plurality of storage means.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing the configuration of a shading correction circuit according to the present invention, and Fig. 2 shows the arrangement of pixels of a solid-state image sensor that supplies an image output signal to the shading correction circuit and its horizontal and vertical shading. An explanatory diagram showing an example of the characteristics, FIG. 3 is an explanatory diagram showing data strings of black shading correction data and white shading correction data stored in the memory in the shading correction circuit, and FIG. 4 is a shading correction signal of the shading correction circuit. FIG. 5 is a block diagram showing the specific configuration of the data processing circuit of the forming section, FIG. 5 is a flowchart showing the details of control by the system controller of the shading correction circuit, and FIG.

Claims (1)

[Claims] First, each having a plurality of pixels arranged in a matrix,
A shading correction circuit that removes shading components of image pickup output signals of second and third image pickup devices, the circuit comprising: exposure control means for the first, second and third image pickup devices; and exposure control means for the first and second image pickup devices, respectively. and first, second, and third analog-to-digital converters that digitize the image output signal of the third image sensor, and the exposure is controlled by the exposure control means so that no light enters the imaging surface of each of the image sensors. Each image pickup output data is digitized by each of the analog-to-digital converters described above in a state in which the image output data is digitized by each of the above-mentioned analog-to-digital converters, and the data is digitized by each of the above-mentioned analog-to-digital converters in a state where a uniform amount of light is incident on the entire imaging surface of each of the above-mentioned image sensors. Each imaging output data is 1/n
storage means for dot-sequentially storing the data thinned out to the number of data as shading correction data; correction signal forming means for forming a shading correction signal based on the shading correction data read from the storage means; and a correction processing means for performing shading correction processing on the imaging output signal of each of the image sensors based on the shading correction signal formed by the signal forming means, and the output signal of the analog-to-digital converter is subjected to shading correction processing. A shading correction circuit characterized in that the circuit is configured to supply an output signal to a subsequent signal processing circuit.