JPH03261086A - Device for preventing electrostatic breakdown - Google Patents
Device for preventing electrostatic breakdownInfo
- Publication number
- JPH03261086A JPH03261086A JP5749290A JP5749290A JPH03261086A JP H03261086 A JPH03261086 A JP H03261086A JP 5749290 A JP5749290 A JP 5749290A JP 5749290 A JP5749290 A JP 5749290A JP H03261086 A JPH03261086 A JP H03261086A
- Authority
- JP
- Japan
- Prior art keywords
- discharge
- conductive pattern
- pattern
- internal circuit
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000015556 catabolic process Effects 0.000 title claims abstract description 8
- 239000000758 substrate Substances 0.000 claims description 20
- 230000002265 prevention Effects 0.000 claims description 13
- 230000005611 electricity Effects 0.000 abstract description 12
- 230000003068 static effect Effects 0.000 abstract description 12
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical group [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 abstract description 2
- 238000011109 contamination Methods 0.000 description 5
- 239000004071 soot Substances 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
Landscapes
- Structure Of Printed Boards (AREA)
- Emergency Protection Circuit Devices (AREA)
- Protection Of Static Devices (AREA)
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、静電破壊防止装置に関し、特にプリント回路
板上に導電パターンによって形成さメ1、た放電端子近
辺における基板の損傷および汚染吟を防止する技術に関
する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an electrostatic damage prevention device, and particularly to a device for preventing damage and contamination of a printed circuit board in the vicinity of discharge terminals formed by a conductive pattern. Regarding technology to prevent this.
[従来の技術]
集積回路装置等の内部回路を静電気による破壊から防止
する/こめ、プリン1−回路板あるいCj集積回路装置
内の入力回路部に抵抗およびタイオー1−・等で構成さ
れる保護回路を設けることが一般に行なわれている。と
ころが、集積回路装置あるい(・注プリント回路板上の
回路数が多くなり集積度が高くなるとこのような保護回
路のために回路スペスを確保することが困難になり、ま
た保護用ダイオード自体の劣化によって保護回1烙が機
能しなくなる場合がある。[Prior Art] To prevent the internal circuits of an integrated circuit device etc. from being destroyed by static electricity, a circuit board or an input circuit in a CJ integrated circuit device is configured with a resistor, a resistor, etc. It is common practice to provide a protection circuit. However, as the number of circuits on an integrated circuit device or printed circuit board increases and the degree of integration increases, it becomes difficult to secure circuit space for such protection circuits, and the protection diodes themselves become Due to deterioration, the protection unit may no longer function.
このような不都合を除去するため、従来、例えば実公昭
56−11408号に記載されているように、プリン1
〜回路板の導電パターンに土って放電端子を形成し、高
電圧の静電気が印加された場合に該放電端子間で放電を
起させることにより内部回路への高電圧の印加を抑制し
内部回路の保護を行なうものが知られている。In order to eliminate such inconveniences, conventionally, as described in Utility Model Publication No. 11408/1983,
- Forms discharge terminals on the conductive pattern of the circuit board, and when high-voltage static electricity is applied, a discharge occurs between the discharge terminals, thereby suppressing the application of high voltage to the internal circuitry. There are some known protection methods.
[発明が解決しようとする課題]
ところか、このような従来例の装置においては、前記放
電端子間に印加された高電圧の静電気によって放電が起
った場合に放電端子用の導体箔の間のプリント回路基板
が損傷を受けあるいはすす等によって汚染され、放電特
性が変化し、場合によっては放電端子間の絶縁特性が悪
化するという不都合があった。[Problems to be Solved by the Invention] However, in such a conventional device, when a discharge occurs due to high voltage static electricity applied between the discharge terminals, the discharge occurs between the conductive foils for the discharge terminals. The printed circuit board may be damaged or contaminated with soot or the like, changing the discharge characteristics and, in some cases, deteriorating the insulation characteristics between the discharge terminals.
本発明の目的は、前述の従来例の装置における問題点に
鑑み、静電破壊防止装置において、プリント回路基板上
に構成された静電破壊防止用の放電端子の間のプリント
基板の損傷および汚れを防止し、安定した放電特性を維
持できるようにすることにある。SUMMARY OF THE INVENTION In view of the problems in the conventional devices described above, an object of the present invention is to provide an electrostatic damage prevention device that prevents damage and dirt on a printed circuit board between discharge terminals for preventing electrostatic damage constructed on a printed circuit board. The objective is to prevent this and maintain stable discharge characteristics.
[課題を解決するための手段]
本発明に係わる静電破壊防止装置は、非導電性の基板上
に所定間隔のギャップ部を介して対向するよう形成され
た放電端子用の導電パターンを右し、前記ギャップ部に
おいて前記非導電性基板に開口またはくぼみが設けられ
ている。[Means for Solving the Problems] The electrostatic damage prevention device according to the present invention includes conductive patterns for discharge terminals formed on a non-conductive substrate so as to face each other with a gap section at a predetermined interval. , an opening or depression is provided in the non-conductive substrate in the gap portion.
また、例えば、前記放電端子用の導電パターンの一方は
グランドパターンにつながり、かつ他方は入力端子とつ
なかっており、該入力端子は抵抗を介して前記非導電性
基板上に形成された内部回路の入力端に接続することが
できる。Further, for example, one of the conductive patterns for the discharge terminal is connected to a ground pattern, and the other is connected to an input terminal, and the input terminal is connected to an internal circuit formed on the non-conductive substrate via a resistor. can be connected to the input end of
[作用]
上述の構成においては、高電圧の静電気が放電端子用の
導電パターンに印加されると、該放電端子間で放電が起
り内部回路に高電圧か印加されることが防止される。こ
の場合、放電端子間のギャップ部における非導電性基板
には開口またはくぼみが設けられているため、放電電流
が基板表面に近接して流れることかなくなり、従来のよ
うに放電経路付近の基板が損傷または汚染されることが
なくなる。このため、長期に渡り安定した放電特性が維
持される。[Function] In the above configuration, when high-voltage static electricity is applied to the conductive pattern for the discharge terminals, discharge occurs between the discharge terminals, and high voltage is prevented from being applied to the internal circuit. In this case, since the non-conductive substrate in the gap between the discharge terminals is provided with an opening or a depression, the discharge current does not flow close to the substrate surface, and the substrate near the discharge path is No more damage or contamination. Therefore, stable discharge characteristics are maintained over a long period of time.
また、放電端子用の導電パターンの一方をグランドパタ
ーンとしあるいはグランドパターンに接続し、他方を入
力端子用の導電パターンとしあるいは入力端子に接続す
ると共に、該入力端子を抵抗を介して内部回路の入力端
に接続することにより、高電圧の静電気が放電端子間の
放電にまり減圧されると共に、前記抵抗によりさらに減
圧され内部回路のより適確な保護が行なわれる。Also, one of the conductive patterns for the discharge terminal is used as a ground pattern or connected to the ground pattern, and the other is used as the conductive pattern for the input terminal or connected to the input terminal, and the input terminal is connected to the internal circuit through a resistor. By connecting the terminals, high-voltage static electricity is trapped in the discharge between the discharge terminals and the pressure is reduced, and the pressure is further reduced by the resistor, thereby providing more appropriate protection of the internal circuit.
[実施例コ 以下、図面により本発明の詳細な説明する。[Example code] Hereinafter, the present invention will be explained in detail with reference to the drawings.
第1図(a)および(b)はそれぞれ、本発明の1実施
例に係わる静電破壊防止装置の部分的平面図および断面
図を示す。これらの図に示されるように、本発明に係わ
る静電破壊防止装置は、絶縁基板1上に形成された導電
パターン3.5.7等を有する。導電パターン3はこの
場合例えばグランドパターンとされ、導電パターン5,
7は例えば入力端子用の導電パターンとされる。これら
の入力端子用導電パターンには外部回路のリード線が半
田付けされ入力信号か印加される。そして、グランドパ
ターン3のそれぞれ導電パターン57に対向する部分は
放電端子を構成するため尖りた形状になっている。但し
、この尖った形状は導電パタ−ン5.7の1則にiXけ
てもよく、あるいはグランドパターン3と導電パターン
5,7の双方に対向して設けることもできる。FIGS. 1(a) and 1(b) respectively show a partial plan view and a sectional view of an electrostatic breakdown prevention device according to an embodiment of the present invention. As shown in these figures, the electrostatic breakdown prevention device according to the present invention has conductive patterns 3, 5, 7, etc. formed on an insulating substrate 1. In this case, the conductive pattern 3 is, for example, a ground pattern, and the conductive patterns 5,
7 is a conductive pattern for an input terminal, for example. Lead wires of an external circuit are soldered to these conductive patterns for input terminals, and input signals are applied thereto. The portions of the ground pattern 3 facing the conductive patterns 57 each have a sharp shape to constitute a discharge terminal. However, this sharp shape may be provided in accordance with one rule of the conductive patterns 5 and 7, or it may be provided facing both the ground pattern 3 and the conductive patterns 5 and 7.
そして、本発明によれば、このような放電端子を構成す
る導電パターン9と5の間、および11と7との間の絶
縁性基板1に例えばざぐりによりくぼみまたは凹部13
.15が設けられている。According to the present invention, depressions or recesses 13 are formed by counterboring, for example, in the insulating substrate 1 between the conductive patterns 9 and 5 and between the conductive patterns 11 and 7 constituting such a discharge terminal.
.. 15 are provided.
また、入力端子を楕戒する各導電パターン57はそれぞ
れ比較的低い抵抗値、例えば数10Ωから数100Ω、
の抵抗17.19を介して図示しない内部回路の入力端
につながる導電パターン21.23に接続されている。In addition, each conductive pattern 57 that connects the input terminal has a relatively low resistance value, for example, several tens of ohms to several hundred ohms,
It is connected to a conductive pattern 21.23 connected to an input terminal of an internal circuit (not shown) via a resistor 17.19.
この場合の内部回路は、例えば基板1上に搭載された集
積回路装置によって構成される回路等とされる。The internal circuit in this case is, for example, a circuit configured by an integrated circuit device mounted on the substrate 1.
第1図の装置においては、例えば導電パターン5に接続
された図示しないリード線を介して外部から高電圧の静
電気か印加されると、導電バタン5とグランドパターン
3に形成された放電端子用パターン9との間で放電が起
る。この放電により、高電圧の静電気が導電パターン5
がらグランドパターン3に放電され、導電パターン5の
電圧が低減される。また、導電パターン5の電圧が図示
しない内部回路に伝達される時に抵抗17を通るため、
この抵抗と内部回路の入力インピーダンス等とによって
さらに減圧される。このため、内部回路の入力端に高電
圧の静電気か直接印加されることかなくなり、内部回路
の破損が的確に防止される。In the device shown in FIG. 1, for example, when high voltage static electricity is applied from the outside via a lead wire (not shown) connected to the conductive pattern 5, the discharge terminal pattern formed on the conductive button 5 and the ground pattern 3 9, a discharge occurs between the two. Due to this discharge, high voltage static electricity is transferred to the conductive pattern 5.
is discharged to the ground pattern 3, and the voltage of the conductive pattern 5 is reduced. In addition, since the voltage of the conductive pattern 5 passes through the resistor 17 when being transmitted to the internal circuit (not shown),
The pressure is further reduced by this resistance and the input impedance of the internal circuit. Therefore, high-voltage static electricity is not directly applied to the input terminal of the internal circuit, and damage to the internal circuit is accurately prevented.
このような放電が生じた場合、放電端子を構成する導電
パターン9と5との間のギャップ部分の基板1にはざぐ
り加工等によってくぼみ13が設けられているため、前
記放電は導電パターン9および5の間の空間を経由して
行なわれる。このため、放電経路が基板1の表面に近接
しなくなり、放電電流により基板1が焼けて損傷したり
、あるいはすす等が発生して基板か汚染されることがな
くなる。従って、放電端子を構成する導電パタン9と5
との間の放電経路の状態が当初の状態のまま保持され、
常に安定した放電特性が維持される。When such a discharge occurs, since a recess 13 is provided in the substrate 1 in the gap between the conductive patterns 9 and 5 constituting the discharge terminal by counterbore processing or the like, the discharge occurs between the conductive patterns 9 and 5. This is done via the space between 5. Therefore, the discharge path is no longer close to the surface of the substrate 1, and the substrate 1 is not burned or damaged by the discharge current, or the substrate is not contaminated by soot or the like. Therefore, the conductive patterns 9 and 5 forming the discharge terminal
The state of the discharge path between the
Stable discharge characteristics are always maintained.
第2図は、本発明の他の実施例に係わる静電破壊防止装
置の第1図A−A線における断面図である。第2図の装
置においては、第1図(b)の装置におけるくぼみ13
に代えて、放電ギャップ部分における基板1に貫通口2
5か設けられている。FIG. 2 is a sectional view taken along the line A--A in FIG. 1 of an electrostatic breakdown prevention device according to another embodiment of the present invention. In the device of FIG. 2, the recess 13 in the device of FIG. 1(b)
Instead, a through hole 2 is provided in the substrate 1 at the discharge gap portion.
5 are provided.
そして、このような構成においても、放電端子を構成す
る導電パターン9,5間等で放電か生じた場合、基板表
面の損傷、汚染等が生じないことは第1図(b)の場合
と同じである。Even in this configuration, if a discharge occurs between the conductive patterns 9 and 5 that constitute the discharge terminal, damage or contamination of the board surface will not occur, as in the case of Fig. 1 (b). It is.
尚、上述の静電破壊防止装置における放電端子間のギャ
ップ幅を例えば0.5mm程度とした場合には、放電開
始電圧はおよそ数1oov以下となる。これにより、例
えば入力端子に数10KVの電圧の静電気か印加された
場合にも、放電端子間の電圧が数100V以下に減圧さ
れる。また、入力端子に直列接続された抵抗により実際
の内部回路の入力端に印加される電圧はさらに減衰され
る。In addition, when the gap width between the discharge terminals in the above-mentioned electrostatic damage prevention device is set to about 0.5 mm, for example, the discharge starting voltage will be about several 10 oV or less. As a result, even if, for example, static electricity with a voltage of several tens of kilovolts is applied to the input terminal, the voltage between the discharge terminals is reduced to several hundred volts or less. Furthermore, the voltage applied to the input terminal of the actual internal circuit is further attenuated by the resistor connected in series with the input terminal.
[発明の効果]
以上のように、本発明によれば、極めて簡単な′lf4
造により放電端子間の基板の損傷、汚染等が防止され、
さらには放電端子自体の汚染等も防止される。このため
、長期に渡って安定した放電条件が維持され内部回路の
的確な保護か行なわれる。[Effect of the invention] As described above, according to the present invention, the extremely simple 'lf4
The structure prevents damage and contamination of the board between the discharge terminals,
Furthermore, contamination of the discharge terminal itself is also prevented. Therefore, stable discharge conditions are maintained over a long period of time, and internal circuits are properly protected.
17.19:抵抗、 21.23:入力端導電パターン、 25:貫通口。17.19: Resistance, 21.23: Input end conductive pattern, 25: Penetration opening.
第1図(a)は、本発明の1実施例に係わる静電破壊防
止装置を示す部分的平面図、
第1図(b)は、第1図(a)のA−A線における断面
図、そして
第2図は、本発明の他の実施例に係わる静電破壊防止装
置を示す部分的断面図である。
1:非導電性基板、
3ニゲランドパターン、
5.7二人力端子用導電パターン、
911:放電端子用パターン、
13 15:<ぼみ部、FIG. 1(a) is a partial plan view showing an electrostatic breakdown prevention device according to an embodiment of the present invention, and FIG. 1(b) is a sectional view taken along line A-A in FIG. 1(a). , and FIG. 2 are partial cross-sectional views showing an electrostatic breakdown prevention device according to another embodiment of the present invention. 1: Non-conductive substrate, 3 Nigerland pattern, 5.7 Conductive pattern for two-person terminal, 911: Pattern for discharge terminal, 13 15: < recessed part,
Claims (2)
ャップ部を介して対向するよう形成された放電端子用の
導電パターンとを有する静電破壊防止装置であって、 前記ギャップ部において前記非導電性基板に開口または
くぼみを設けたことを特徴とする静電破壊防止装置。1. An electrostatic breakdown prevention device comprising a non-conductive substrate and a conductive pattern for a discharge terminal formed on the non-conductive substrate to face each other with a gap at a predetermined interval, An electrostatic damage prevention device characterized by having an opening or a depression in a conductive substrate.
性基板上に形成されたグランドパターンとつながり、他
方は入力端子とつながっており、該入力端子は抵抗を介
して前記非導電性基板上に形成された内部回路の入力端
に接続されている請求項1に記載の静電破壊防止装置。2. One of the conductive patterns for the discharge terminal is connected to a ground pattern formed on the non-conductive substrate, and the other is connected to an input terminal, which is formed on the non-conductive substrate via a resistor. The electrostatic damage prevention device according to claim 1, wherein the electrostatic damage prevention device is connected to an input terminal of an internal circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5749290A JPH03261086A (en) | 1990-03-08 | 1990-03-08 | Device for preventing electrostatic breakdown |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5749290A JPH03261086A (en) | 1990-03-08 | 1990-03-08 | Device for preventing electrostatic breakdown |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH03261086A true JPH03261086A (en) | 1991-11-20 |
Family
ID=13057223
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5749290A Pending JPH03261086A (en) | 1990-03-08 | 1990-03-08 | Device for preventing electrostatic breakdown |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH03261086A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5714794A (en) * | 1995-04-18 | 1998-02-03 | Hitachi Chemical Company, Ltd. | Electrostatic protective device |
JP2014175399A (en) * | 2013-03-07 | 2014-09-22 | Denso Corp | Static electricity protection circuit board |
-
1990
- 1990-03-08 JP JP5749290A patent/JPH03261086A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5714794A (en) * | 1995-04-18 | 1998-02-03 | Hitachi Chemical Company, Ltd. | Electrostatic protective device |
DE19615395C2 (en) * | 1995-04-18 | 1999-09-23 | Hitachi Chemical Co Ltd | Spark gap protection device and method for its production |
JP2014175399A (en) * | 2013-03-07 | 2014-09-22 | Denso Corp | Static electricity protection circuit board |
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