JPH03252710A - Constant voltage output circuit - Google Patents

Abstract

PURPOSE:To prevent a power factor from lowering by detecting the output current of a rectifier circuit, and stopping the supply of an on-pressing signal to a switching means when detecting a current exceeding a preset level. CONSTITUTION:Detecting means 27, 21, 22, and 24 detect the output current of the rectifier circuit 5 i.e. an input current i1p to DC-DC converters 6-9, and when it exceeds the preset level Vref, peak suppression means 23, 25, and 28 stop the supply of the on-pressing signal ton to the switching means 8. Therefore, no excessive current peak at the peak part of an AC power source flows on the DC-DC converters 6-9. Thereby, no input current exceeding the upper limit flows on the DC-DC converters 6-9, and also, the envelope value of the input current is limited in moderate sine wave shape, and the power factor of the input current can be maintained in the neighborhood of 1, and no remarkable lowering of the power factor occurs.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a constant voltage output circuit that rectifies and smoothes an AC input and applies it to a load, and also controls the load voltage to a set value at a constant voltage. An inductance is inserted between the rectifier circuit that rectifies the AC input and the smoothing capacitor to which the load is connected, and the current flowing from this inductance to the smoothing capacitor is controlled by turning on/off the switching means. The envelope waveform of the pulsed output current of the rectifier circuit.

The present invention relates to a constant voltage output circuit that supplies power to a load with a high power factor by using a waveform similar to that of an AC input voltage.

[Conventional technology]

Conventionally, in full-wave rectifier circuits using diode bridges, there is a smoothing capacitor input type circuit as an internal circuit, but in order to reduce the ripple value of the rectified DC voltage, it is necessary to increase the capacitance of the capacitor considerably. be. Therefore, the peak value of the rectified current increases, the power factor decreases, and adverse effects such as harmonic generation cannot be ignored.

In order to improve the power factor, a choke coil is used in front of the capacitor, but in order to sufficiently improve the power factor, a coil with a large inductance corresponding to the capacity of the capacitor is required. Since the outer diameter of the coil becomes large, there are limitations in practical use.

Another method for improving the power factor is to use a chopper circuit to switch the pulsating current that has been rectified by a rectifier circuit. This method basically performs PWM control (pulse width control) on the chopper circuit so that the power supply input current becomes a sine wave, and stops the chopper operation when the load current decreases (Japanese Patent Laid-Open No. 53-5755). Public bulletin) or
PWM control that chops the pulsating current, turns on the switching transistor using a saturable reactor, compares the waveforms of the output voltage and input voltage, and turns it off (Japanese Patent Laid-Open No. 56-10778
Publication No. 0).

Kirani, those using a microcomputer for switching control of chopper circuits (Japanese Patent Laid-Open No. 63-220767, Japanese Patent Laid-Open No. 63-224670, Japanese Patent Laid-open No. 63-22467,
224671), and a PWM control method using control of both switching on time and frequency has also been proposed in order to cope with a wide range of load fluctuations.

FIG. 4 shows one conventional example using a microcomputer. In this case, the smoothing capacitor 9 is charged by the switching element 8 and the inductance element 6, but the PWM The switching element 8 is turned on/off by control.

Inductance 6, diode 7, switching element 8
．． and capacitor 9 form a step-up DC/DC converter circuit. The output AC voltage of the AC power supply 1 is subjected to rectification by a diode bridge circuit 5, and then applied to the converter circuit. AC power supply 1 and diode bridge circuit 5
There is an inductance between 2. Inductance 3. A noise cut filter circuit formed by a capacitor 4 and a capacitor 4 is inserted to cut off noise from the converter circuit to the AC power supply 1. That is, the noise cut filter circuit is a filter circuit for preventing switching noise generated by the switching element 8 from flowing back into the AC power supply 1.

In the step-up DC-DC converter circuit, when the switching element 8 is turned on, energy is accumulated in the coil core of the inductance 6, and when the switching element 8 is turned off, this accumulated energy is released from the inductance 6 and is transferred via the diode 7. Current flows to the load 10. Note that the capacitor 9 is a smoothing capacitor.

The circuit for controlling on/off of the switching element 8 includes a resistor 11 and a resistor 12 (potentiometer for output voltage adjustment) that divides the output voltage, and an A/D that digitally converts the analog output obtained by the resistor 12. converter 1
8 and the output voltage from the output of the A/D converter 18, compare this value with the set value, and set the PWM signal data (on/off period of the switching element 8 to T) so that there is no error with the set value. A microprocessor (hereinafter referred to as CPU) 17 with a built-in ROM and RAM, which calculates data indicating the on-time Ton and data indicating the on-time Ton, and a timer 19 for determining the period consisting of a preset counter, and a timer 20 that determines and outputs a PWM pulse signal, and a timer 20 that turns on the switching element 8 when the PWM pulse signal is H (on time = ton period).
5 (off period), the driver 15 is turned off. Note that the AC power supply 1 is connected to a zero-cross detection circuit 14 that detects the zero-cross point of the full-wave rectified output of the diode bridge 5.

The CPU 17 converts the load voltage (voltage output from the resistor 12) into digital data using the A/D converter 18, calculates the load voltage, compares this value with a set value held within the CPU, and determines the load voltage by a predetermined calculation. On/off frequency f (period T) and on time Ton to match the set value
is calculated, and data indicating the period T is updated and output to the timer 19, and data indicating the on-time Ton is updated and output to the timer 20.

FIG. 3a shows a basic configuration diagram of the boost converter circuit shown in FIG. 1. Now, when the switching element 8 is turned on, a current 11 flows through the inductance 6 due to the input voltage Vin. Since the current 11 flowing through the inductance 6 increases monotonically in proportion to time as shown in FIG. 3d, i 1 =(Vin/t,) =ton, and 11 is the maximum current i1p. That is, the following equation holds.

i 1p= (Vin/L)X ton −(2)
When formula (2) is changed, it becomes formula (3).

ton=(i 1p/Vin)XL ・・−(3)Vi
Since n is a sinusoidal pulsating current, the average current of 11 is
If the current is to flow sinusoidally as shown in Figure d, the envelope of the peak value i1p of the current flowing through the inductance 6 will also become sinusoidal, as can be seen from the figure. Since the switching frequency is very high compared to the power supply frequency, Vin can be seen as a direct current during a period of ton, as shown in Figure 3c, and from equation (3), if ton is kept constant, the current flowing through the inductance 6 is The envelope of the peak value ixp becomes a sine wave having the same phase as the input voltage Vin. The input current at this time also becomes a sine wave with the same phase as the input voltage Vin, and has a high power factor.

However, in order for this relationship to hold true, a condition is required that the switching element 8 is not turned on again before the current in the inductance 6 becomes zero. If the switching element 8 is turned on before the current in the inductance 6 becomes zero, the peak current value i1p will be the sum of the residual currents and will not be sinusoidal. Therefore, in Fig. 3d, if the time from the peak value i1p until the current becomes zero is toff, then t
on+toff≦T, (T=l/f)...-('l
) f: It is necessary to satisfy the condition of on/off repetition frequency.

Now, assuming that the current in the inductance 6 when the switching element 8 is off is 12, Vin-V o = L X d i 2 /dt
=・(5). Integrating equation (5) and setting the initial value to imp, i2 = (Vin-Vo)/LX t + i
1 p - (6) From equation (6), t off is 12=0.

toff” i 1 p/(V o-Vin)
...(7) When imp is substituted in equation (2), we get (
7) Equation is t off = Vin/ (V o −Vi
n) X t on −(8).

FIG. 5a shows the waveform of the sinusoidal input voltage Vin, and FIG. 5b shows the ton voltage waveform with a constant pulse width. Voltage V
The time to when the current flowing through the inductance 6 becomes zero when in is switched with a pulse width ton.
The voltage waveform of f is as shown in FIG. 5c.

As can be seen from Figures 5a, 5b, and 5c, t
Even when on is constant, t off is not constant, and the relationship has a value determined by equation (8). Transforming equation (8), toff=1/((Vo/Vin)-1)Xt
On −(9), the following condition holds true.

When V o / V in≧2, ton≧toff
-(10) When V o / V in < 2
t on < t off ・・111) In other words, when the ratio of the output voltage Vo and the input voltage Vin is more than twice
is always greater than toff.

The relationships expressed by equations (10) and (11) will be required later when determining the upper limit (lower limit of the period T) of the switching frequency (on/off repetition frequency of the switching element 8) f.

According to the above explanation, if the switching element 8 is not turned on again before the current in the inductance 6 becomes zero, and the switching is performed with a constant value of on time ton, the input current becomes a sine wave and the power factor is improved. I understand.

Next, we will describe the control by which the circuit of the present invention outputs a constant output voltage even in response to fluctuations in the AC power source and changes in the load.

In Fig. 3a, the energy PL accumulated in the inductance 6 when the switching element 8 is closed is as follows per unit time, assuming that the switching frequency is f: PL=L/2Xi1p2Xf = (Vin "XVon")/2 L X f
−(12). When the switching element 8 is turned off, a back electromotive force is generated in the inductance 6 and charges the rectifying capacitor 9 through the diode 7. The voltage across the capacitor 9 is the output voltage vO, so if the output current is Io, the output power Po consumed by the load 10 is P o = I o X V o "413).The output current Pa and the inductance 6 are Since the accumulated power is equal, PL=PO (12).

From formula (13), V o = (Vin” ・ton” ・f )/(2L
-Io) -(14) From equation (14), input voltage Vin and output current I.

It can be seen that when ton or f changes, the output voltage can be kept constant by changing ton or f. In other words, if the input voltage Vin decreases or the output current Io increases, ton is lengthened or f is increased, and conversely, the input voltage Vin increases,
If the output current decreases, ton can be shortened or f can be decreased.

[Problem to be solved by the invention]

The clock of the timer of the microcomputer circuit is a frequency-divided oscillation wave of a crystal oscillator, and is determined by the maximum operating frequency of the timer.

That is, the operating speed of the switching element 8 also increases at t.
on (on time of switching element 8) and f (frequency) have upper limits. When the load current exceeds this upper limit, the digital control circuit mainly composed of a microcomputer can no longer control the load, and the output voltage decreases. In addition, the zero cross point of the output AC of the input AC power supply 1 (
0, π) to the peak (π/2), the input voltage Vin gradually increases as shown by the dotted line in FIG.
Since the load current TL of the C-DC converter circuit increases as shown by the dotted line in FIG. 5b, the next ton period occurs before the energy release of the inductance 6 ends at the peak (π/2) portion. The residual current due to the residual energy of the inductance 6 and the current in the next ton period are added, and as a result, the envelope of the input current becomes a peak shape as shown at 11ρ in Figure 5C, and the input current also has a peak shape. Current flows, causing a significant drop in power factor.

An object of the present invention is to prevent a drop in power factor by suppressing a peak input current even when a load current exceeding a control range flows in a digitally controlled constant voltage output circuit. do.

[Means to solve the problem]

The present invention consists of a rectifier circuit (5) that rectifies AC input; a load (
a smoothing capacitor (9) connected to the smoothing capacitor (9); an inductance (6) inserted between the smoothing capacitor (9) and the output end of the rectifier circuit (5);
Switching means (8) for controlling the supply from 6) to the smoothing capacitor (9); Voltage detecting means (11, 12) for detecting the load voltage of the load (10); and a switching control means (15, 1?) that controls on/off of the switching means (8) by pulse duty control so that the load voltage is set to a set value.
, 19.20); and a detection means (27°21.22.24) for detecting the output current of the rectifier circuit (5);
1, 22, 24) is detecting a current equal to or higher than the set level, the on-energizing signal (t
peak suppressing means (23, 25,
28);

Note that symbols in parentheses indicate corresponding elements with the embodiments described later.

[Effect]

An inductance (6) is inserted between the rectifier circuit (5) that rectifies the AC input and the smoothing capacitor (9) to which the load (10) is connected, and the inductance (6) is connected to the smoothing capacitor (9). Since the power supply is controlled by turning on/off the switching means (8), the envelope waveform of the pulsed output current of the rectifier circuit (5) due to this turning on/off becomes a waveform similar to the waveform of the AC input voltage, and the pulsed output current The smoothed value of the AC input voltage has a similar waveform that is synchronized with the waveform of the AC input voltage, resulting in a high power factor.

Therefore, the switching control means (15, 17, 19 to
23) is detected by the voltage detection means (11, 12,) and A/
The load voltage data converted by the D conversion means (18) is compared with the set value, and the switching means (15, 17, 19 to 23) are set to the pulse width and on-time such that the load voltage becomes the set value.
Roughly speaking, the load voltage is controlled to a constant value corresponding to the set value.

The detection means (27, 21, 22, 24) is a rectifier circuit (5)
, that is, the input current (ilp) of the DC-DC converter (6 to 9), and this is the set level (Vr
ef), the peak suppression means (23, 25
, 28) stops supplying the ON energizing signal (ton) to the switching means (8), the excessive current peak at the peak portion of the AC power supply shown in FIG. 9), therefore, DC-
The input current that exceeds the upper limit does not flow through the DC converter (6 to 9), and the envelope value of the input current is limited to a smooth sine wave, so that the power factor of the input AC is maintained close to 1, and the power No significant decrease in rate.

Other objects and features of the invention will become apparent from the following description of an embodiment with reference to one drawing.

〔Example〕

An embodiment of the present invention is shown in FIG.
Since the conventional circuit shown in the figure has been improved based on the present invention, a description of the common parts with the circuit of FIG. 4 will be omitted, and the different parts will be described next.

A secondary winding 27 is added to the inductance 6, which generates a voltage corresponding to the input current, which is applied to the comparator 21. The comparator 21 is given a reference voltage V ref for regulating the input current value within the upper limit, and the comparator 21 is at a high level H when the voltage of the coil 27 corresponding to the input current is equal to or higher than Vref. The voltage of V ref
When the value is less than 0, a signal COMP of low level L is generated.

The inverted signal COMP of this signal COMP is sent to the inverter 24.
to J- is applied to the J input terminal of the flip-flop 23.

Here, referring also to FIG. 2 which shows time-series changes in electrical signals of various parts of the circuit in FIG. 1, the inverted signal COMP is at a low level L while the inductance 6 is releasing energy. On the other hand, the control signal ton (high level H instructs on, low level L instructs off) for the switching element 8 calculated by the microcomputer 17 is given to the differentiating circuit 28, and the differential signal of the differentiating circuit 28 is applied to the flip-flop. Pu 23
is applied to the reset input terminal R of. flip flop 2
The clock input terminal of No. 3 receives an inverted signal t of the control signal ton.
on is applied from the inverter 25.

Since the K input terminal of the J- flip-flop 23 is connected to the equipment ground (low level L), when the J signal is H (input current is less than the set level), the falling edge of the clock signal (the rising edge of ton) is The signal PWM at the output terminal Q is inverted from L (off instruction) to H (on instruction) at the switching timing of element 8 from off to on. Therefore, when the input current i1p is less than the set level, to
The switching element 8 is turned on/off in synchronization with n.

When the J signal is L (input current is above the set level),
The flip-flop 23 at J- does not invert the output PVM of the output terminal Q even when the clock signal falls (the timing at which the switching element 8 switches from off to on at the rising edge of t on ), that is, it keeps the output PIIIM low. (switching element 8 off). Therefore, when the energy release of the inductance 6 has not yet been completed, that is, when the input current exceeds the set level, the next t
Disable (L) on=H (on instruction). In other words, ton==H (on instruction) in the following one section is invalidated.

In FIG. 2, (a) shows the current flowing through the inductance 6 (output current of the rectifier 5: input current of the DC-DC converter), (b) shows the voltage generated by the coil 27, and (c) shows the voltage generated by the comparator 21. Indicates the inverted signal COMP of the output COMP of
(d) shows an inverted signal ton of the conduction control signal ton that determines the on/off duty of the switching element 8.

Now, if the current flowing through the inductance 6 has not finished releasing energy even when ton falls (when ton rises), COMP becomes L, and the signal PVN at the output terminal Q of the flip-flop 23 becomes tor+=H. It does not invert to the corresponding H (on instruction). When the energy release from the inductance 6 is completed, the signal PWM at the output terminal Q is inverted to H (on instruction) corresponding to ton=H at the next fall of ton (at the rise of ton). The differential signal ton' is used to invert the signal at the output terminal Q from H to L.

As described above, when the input current increases excessively without completing the energy release of the inductance 6, the next ON instruction signal is automatically cut off, so that the input current increases until it reaches the highest peak as shown in Figure 5C. A peak is automatically prevented.

That is, the input current is suppressed within the upper limit range, and thereby the envelope value of the input current is maintained in a smooth sinusoidal shape, and the power factor of the input AC is maintained high.

〔Effect of the invention〕

As described above, according to the present invention, the detection means (27, 21°2
2.24) is the output current of the rectifier circuit (5), that is, DC-
The input current (ilp) of the DC converter (6 to 9) is detected, and when it exceeds the set level (Vref),
Since the peak suppressing means (23, 25, 28) stops supplying the on-energizing signal (ton) to the switching means (8), the excessive current peak at the peak portion of the AC power supply shown in FIG. - Does not flow to the DC converter (6-9).

Therefore, the input current that exceeds the upper limit does not flow through the DC-DC converters 6 to 9), and the envelope value of the input current is limited to a smooth sine wave, and the power factor of the input AC is maintained close to 1. and does not cause a significant drop in power factor.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a time chart showing time-series changes in electrical signals of various parts of the circuit shown in FIG. FIG. 3a is an equivalent electrical circuit diagram of the DC-DC converter circuit (6 to 9) shown in FIG. 1. FIG. 3b is a time chart showing waveforms of electrical signals at various parts of the electric circuit shown in FIG. 3a. FIG. 3c is a waveform diagram showing the voltage across the switching element 8 shown in FIG. 3a. FIG. 3d is a waveform diagram showing the current IL flowing through the inductance 6 shown in FIG. 3a. FIG. 4 is a block diagram showing an example of a conventional constant voltage output circuit. FIG. 5a is a waveform diagram showing the voltage across the switching element 8 shown in FIG. 4. FIG. FIG. 5b is a waveform diagram showing the current flowing through the inductance 6 shown in FIG. 4. FIG. 5c is a time chart showing the waveform of the current flowing through the inductance 6 shown in FIG. 4. FIG. 1: AC power supply 2, 3: Inductance 4
: Capacitor 5: Diode bridge (rectifier circuit) 6: Inductance (inductance) 7: Diode 8 Niswitching element (switching means) 9: Smoothing capacitor (smoothing capacitor) 10: Load (load) 11
: Voltage dividing resistor 12: Output voltage adjustment resistor (11, 12: Voltage detection means)
14: Zero cross detection circuit 15: Base drive circuit 16: AND circuit 17: Microprocessor (15, 17, 19, 20 switching control means) 18: A/D converter (A/D converter)
D conversion means) 19.20: Timer circuit 22: Reference voltage setter 24.25: Inverter 27: Secondary coil 28: Differential circuit 21: Comparator 23: Flip-flop 26 double crystal oscillator in J-

Claims (1)

[Claims] A rectifier circuit that rectifies AC input; a smoothing capacitor to which a load is connected; an inductance inserted between the smoothing capacitor and the output end of the rectifier circuit; Switching means for controlling power supply; Voltage detection means for detecting the load voltage of the load; A/C converting the load voltage into digital load voltage data;
In a constant voltage output circuit comprising: D conversion means; and switching control means for controlling on/off of the switching means by pulse duty control so as to set the load voltage to a set value; detecting the output current of the rectifier circuit; detection means; and
A constant voltage output circuit comprising: peak suppressing means for stopping supply of an on-energizing signal to the switching means when the detecting means detects a current equal to or higher than a set level.