JPH03243080A - Video printer - Google Patents

Abstract

PURPOSE:To obtain a video printer capable of inexpensively and simply correcting the movement of a frame image by changing at least one of the reading phases of horizontal and vertical scanning directions of image data read out from a field memory. CONSTITUTION:The video printer is constituted of frame memories 25, 26, a synthesizing circuit 27, a monitor 45, a CPU, and so on. The focus part AR1 of the 1st field of a frame image is moved in the H direction in the 2nd field because of a time difference between the fields and a focus part AR 2 is formed, so that image oscillation is generated on the shown frame image. In such a case, the reading address of image data in a memory 26 is adjusted and synthesized in accordance with the quantity of image oscillation with the reading address of the image data in the memory 25. Namely, a synthetic mode is specified by a prescribed key switch and a preset point to be supposed as an optimum point is specified while observing the focus point of the frame image on the monitor 45, so that the image oscillation can be removed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a video printer, and particularly to a video printer that can perform motion correction of a frame image to be printed out.

[Summary of the invention]

In a video printer, the present invention includes first and second field memories for storing image data of l frames to be printed, and composition of l frames read from the first and second field memories and combined. means for displaying image data; and means for varying at least one of the reading phases in the horizontal and vertical scanning directions of the L-field image data read from one of the first and second field memories. With this feature, it is possible to perform motion compensation and remove image blur in moving parts of the frame image.Moreover, this motion compensation can be performed at low cost and without the need for complex circuit configurations or algorithms. It is designed to be easy to perform.

(Prior Art) Video printers are known that can obtain images from image sources such as tuners, VTRs, video disk playback devices, computers, etc. as hard copies of still images.

[Problem to be solved by the invention]

One of the signals handled by the video printer described above is a television signal.

Television signals are interlaced, so when a moving image is used as a still frame, the moving parts of the image will be shaken due to the time difference between fields, causing image blur. There was a problem with it being put away.

Even if a conventional video printer is provided with an internal frame memory, the above-mentioned image blur cannot be avoided unless image data of a complete still image is input.

Conventional techniques for solving this problem include the following. One is to create a still image of one frame using only one field of image information, and the other is to detect motion based on the image information and correct only the moving parts to create a frame image. It is something to be corrected.

Among the above-mentioned conventional techniques, in the former case where one frame of still image is created using only one field of image information,
Since the amount of information is only half of the original amount of information in one frame, there is a problem in that image quality deteriorates.

In addition, in the latter case, in which the frame image is corrected by detecting motion and correcting only the moving parts, the circuit configuration and algorithms for motion detection and motion correction become complicated, making it extremely expensive. There was a problem with becoming.

Therefore, an object of the present invention is to provide a video printer that can perform motion correction of frame images easily and inexpensively.

[Means to solve the problem]

The present invention includes first and second field memories for storing one frame of image data to be printed, and means for displaying one frame of composite image data read from the first and second field memories and composited. and means for varying at least one of the readout phases in the horizontal and vertical scanning directions of one field of image data read out from one of the first and second field memories. There is.

[Effect]

As mentioned above, in the case of a moving frame image, the first
Due to the time difference between the second field and the second field, image blur occurs in moving parts.

Therefore, with one of the first and second field memories as a reference, the reading phase of the image data of the other field memory is made variable in at least one of the horizontal and vertical scanning directions.

As a result, motion correction can be performed and one frame of composite image data from which image blur has been removed can be formed.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 to 5.

FIG. 1 is a block diagram of a color video printer using a sublimation type thermal transfer method according to the present invention.

In the configuration shown in Figure 1, IA, IB, and Ic are input terminals,
2 is an input changeover switch, 3 is a mode changeover switch, and 4A, 4B, and 4C are output terminals.

Input terminal IA is a terminal to which RGB signals are supplied, input terminal IB is a terminal to which luminance signal Y and color signal C are separately supplied, and input terminal LC is a terminal to which composite color video signal is supplied. be.

To these input terminals IA, IB, and IC, image sources such as a VTR, a video disc playback device, a tuner, and a computer are connected, although not shown. Conversion circuits 5B and 5C for converting input signals into RC and B signals are connected to input terminals IB and 1C.

One of the three input signals as RGB signals is selected by the input changeover switch 2.

The mode changeover switch 3 is provided to switch between a mode in which the above-mentioned input signals are directly led to the output terminals 4A, 4B, and 4C, and a mode in which signals processed by the printer are led to the output terminals 4A, 4B, and 4C. .

The signals processed by the printer are read out from two field memories provided in the image memory 8, which will be described later, and combined into one frame of image data.
It has characters, symbols, etc. added to it. Output terminal 4
A, 4B, or 4C is connected to a monitor (not shown), and the output signal is displayed on the monitor.

The signal from the input changeover switch 2 is converted into a digital signal by the A/D converter 6, and this digital signal is supplied to one input terminal of the switch circuit 7 and the image memory 8.

The internal configuration of image memory 8 is shown in FIG.

This image memory 8 is composed of field memories 25 and 26 that each hold image data for one field, and a synthesis circuit 27 that synthesizes the image data output from the field memories 25 and 26. .

In field memory 25.26, 28.29 is
These are terminals to which control signals such as read commands and write commands are supplied, and 3o and 31 are terminals to which read addresses and write addresses are supplied. And 3
2 is a terminal for taking out the combined image data.

The image memory 8 stores one frame of image data to be printed divided into two fields, and the print image is not limited to one frame, but can also be one field, or several areas divided into one screen. It is.

The RGB signal image data taken into the image memory 8 is supplied to the other input terminal of the switch circuit 7 and also to the line memory 13.

The output of the line memory 13 is supplied to a thermal head 15 of a printing mechanism section 14 surrounded by a broken line.

The output data of the switch circuit 7 is supplied to the D/A converter 9 and converted back into an analog signal, and this analog signal is supplied to the mixer 10.

On the other hand, the mixer 10 is supplied with a character display signal from the character display circuit 11, so that the character display signal is superimposed on the analog signal described above, and the character data to be displayed on the monitor screen is mixed. The output signal of the mixer 10 is supplied to the mode changeover switch 3, the Y/C conversion circuit 12B, and the video conversion circuit 12C.

The Y/C conversion circuit 12B forms a luminance signal Y and a color signal C from the RGB signals, and the video conversion circuit 12C forms a luminance signal Y and a color signal C from the RGB signals.
Forming a video signal from the signal.

The printing mechanism unit 14 includes a platen for feeding printing paper, a mechanism for feeding the printing paper to the platen and ejecting the printing paper after printing is completed, as in a conventional color video printer.
An ink ribbon on which heat-sublimable yellow, cyan, and magenta inks are sequentially applied, a thermal head 15 that performs dot printing, and a motor 1 that rotates a platen.
It is equipped with 6th class. The thermal head 15 and the ink ribbon print on the printing paper wrapped around the platen.
The stored frame image is printed in color.

CPU17 is a CPU for memory and head control.
It is. This CPU 17 controls writing and reading operations of the image memory 8 and line memory 13. Also, from the CPU 17 to the line memory 13,
Caption data PD, which is additional character information constituting headings, explanatory text, etc., is supplied. Words corresponding to this caption data PD are printed simultaneously with the image and in black outside the print area of the image.

The internal configuration of this CPU 17 is shown in FIG.

A CPU 36, registers 37, 38, etc. are connected by a path 35, and various data are supplied to each other by this bus 35.

Registers 37.38 are connected to counters 39.40, respectively, and the data held in registers 37.38 is taken into counter 39.4o.

Further, a low active load signal SLO formed based on a vertical synchronization signal is connected to the terminal 41, for example.
A clock signal CLK is supplied from U 18 and a terminal 42 is supplied. These load signals SLO
, clock signal CLK are supplied to counters 39 and 40, respectively.

From each counter 39.40, row and column address data formed by counting the clock signal CLK is taken out from terminal 43.44. Further, the counter 40 supplies a signal SUC to the counter 39, which indicates that the current value has reached the upper limit value in the horizontal scanning direction.

Incidentally, within the CPU 1V, an address generator shown in FIG. 3 is provided for each of the field memories 25 and 26.

CPU1B is a CPU for system control.

A key switch 19 for data input to the CPU 18
is connected. The CPU 18 also includes a terminal 24 for vertical and horizontal synchronization signals, a terminal 20 for remote control signals, and a terminal 21 for external connection (for example, R3-2
32-C) is provided. Further, the output signal of a rotation detector and the output signal of a sensor provided in connection with the motor 16 of the printing mechanism section 14 are supplied to the CPU 1B.

The data formed by the operation of the key switch 19 is
It is supplied to PU18. Various control signals, data, etc. are sent from the CPU 18 to the CPU 17, the input changeover switch 2, the switch circuit 7, and the character display circuit 1.
1, the motor 16, and the mode changeover switch 3. The CPU 18 controls the input changeover switch 2, the switch circuit 7, the character display circuit 11, the motor 16, and the mode changeover switch 3.

The motion correction will be explained below. In the following description, it is assumed that the image data of the frame (1) is synthesized by adjusting the readout phase of the image data of the second field using the image data of the first field as a reference.

For example, when a one-frame image shown in FIG. 4 is displayed on the monitor 45, the part of the airplane in the center of this one-frame image is the part on which you want to focus (hereinafter referred to as the focal part) ARP shall be.

Due to the time difference between fields, the focus portion API of the first field of the one-frame image shown in FIG. 4 moves in the horizontal scanning direction (hereinafter simply referred to as the H direction) and focuses It forms part AR2, and this 2
A focal portion ARP of the frame image is formed by two focal portions ARI and AR2.

The positions of the above-mentioned focus portions API and AR2 move in the direction of arrow H due to the time difference between fields, and therefore image blur occurs in the illustrated one-frame image. In such a case, the field memory 26
It is considered that the shake of the frame image can be removed by adjusting the read address of the image data corresponding to the amount of image shake and composing them.

When the user specifies the frame image synthesis mode using the key switch 19, the CPU 18 generates a control signal for frame image synthesis. Further, when the user specifies a preset point that is considered to be optimal using the key switch 19 while viewing the focal point ARP of the frame image on the monitor 45 shown in FIG. is formed.

This preset point address data and the above-mentioned control signal are supplied from the CPU 18 to the CPU 17.

The CPU 17 performs the following operations on the field memory 25.

A preset value as a reference value for counting is supplied from the CPU 8 to the CPU 36 shown in FIG. This preset value is not the address data of the preset point mentioned above, but is based on the field memory 25 for the field memory 26, so the field memory 25 is used as a reference.
represents the address of the starting point PS1, and the value is zero.

This preset value is then fetched from the CPU 36 to the register 37 via the bus 35, and the preset value
36 to the register 38 via the bus 35.

The counter 39 is supplied with the above-described preset value, a clock signal CLK, and the like. When the load signal SLO becomes low level, the counter 39 takes in the preset value,
This is the preset value for the count.

Further, the counter 40 is supplied with a preset value, a clock signal CLK, and the like. The counter 40 receives a load signal S
When LO becomes low level, the preset value is taken in and used as the preset value for counting.

On the other hand, at the stage when the vertical synchronization signal is supplied to the CPU 18,
A signal corresponding to this is supplied to the CPU 17. Then, the CPU 17 forms a read command, and this read command is supplied to the field memory 25 of the image memory 8 via the terminal 2.

The counter 40 starts counting the supplied clock signal CLK immediately after the load signal SLO is supplied, and starts counting the clock signal CLK from a preset count value.
By counting up K, column address data of the field memory 25 is formed, and this column address data is
The signal is supplied to the field memory 25 via the terminal 44.

Further, when the count value in the counter 40 exceeds the upper limit value of the H direction of the field memory 26, that is, each line, the contents of the counter 40 are reset and the preset value is loaded again, and the upper limit value is exceeded. A signal SUC representing the value SUC is supplied to the counter 39.

The counter 39 receives a signal S supplied from the counter 4o.
[The IC starts counting immediately after the load signal SLO is supplied, and the signal SU starts from the preset count value.]
By counting up C, row address data of the field memory 25 is formed, and this row address data is
It is output to the field memory 25 via the terminal 43.

Also, at this time, if the count value of the counter 39 exceeds the upper limit value in the direction (■) of the field memory 25, the contents of the counter 39 are reset, and the CPU
17, the supply of read commands and row and column address data to the field memory 25 is stopped.

In the field memory 25, row and column address data formed at the timing of each clock signal CLK is supplied to the CPU 17 via a terminal 30. At this timing, from the starting point PS1 of the field memory 25 to the first
The field image data is read out and sequentially supplied to the synthesis circuit 27.

The CPU 17 performs the following operations on the field memory 26.

The CPU 18 supplies the address data of the above-mentioned preset points, that is, the preset values in the ■ direction and the H direction, to the CPU 36 shown in FIG.

Then, the preset value in the ■ direction is sent from the CPU 36 to the bus 3.
The preset value in the H direction is taken into the register 38 from the CPU 36 via the bus 35.

The counter 39 is supplied with the above-mentioned preset value in the {circle around (2)} direction, the clock signal CLK, and the like. When the load signal SLO becomes low level, the counter 39 takes in the preset value and uses it as the preset value for counting.

Further, the counter 40 is supplied with a preset value in the H direction, a clock signal CLK, and the like. When the load signal SLO becomes low level, the counter 40 takes in the preset value and uses it as the preset value for counting.

On the other hand, at the stage when the vertical synchronization signal is supplied to CPtJlB, a corresponding signal is supplied to the CPUI 7. Then, the CPU 17 forms a read command, and this read command is supplied to the field memory 26 of the image memory 8 via the terminal 29.

The counter 40 starts counting the supplied clock signal CLK immediately after the load signal SLO is supplied, and starts counting the clock signal CLK from a preset count value.
By counting up K, column address data of the field memory 26 is formed, and this column address data is
It is supplied to the field memory 26 via the terminal 44.

Further, when the count value in the counter 40 exceeds the upper limit value of the H direction of the field memory 26, that is, each line, the contents of the counter 40 are reset and the preset value is loaded again, and the upper limit value is exceeded. A signal SUc representing the current value is supplied to the counter 39.

The counter 39 receives the signal S supplied from the counter 40.
UC starts counting immediately after the load signal SLO is supplied, and from the preset count value, the signal SU
The row address data of the field memory 26 is formed by the count amplifier of C, and this row address data is
It is output to the field memory 26 via the terminal 43.

Also, at this time, if the count value of the counter 39 exceeds the upper limit value in the direction (■) of the field memory 26, the contents of the counter 39 are reset, and the CPU
From 17 onwards, the supply of read commands and row and column address data to the field memory 26 is stopped.

In the field memory 26, the row and column address data formed at the timing of each clock signal CLK is supplied to the CPU 17 via the terminal 31, so that the image data of the second field is stored in the preset row and column address data. It is read out from the address of the column and sent to the synthesis circuit 27.
They will be supplied sequentially.

In the synthesis circuit 27, the starting point PS1 of the field memory 25
A frame image is synthesized based on the image data supplied from the address of the field memory 26 and the image data supplied from the address of the preset point of the field memory 26, and is supplied to the switch circuit 7 and the line memory 13 described above.

The frame image thus formed is subjected to signal processing as described above and is supplied to the monitor 45 or the printing mechanism section 14.

The frame image synthesized as above iM (7) is
Since the image is displayed on the monitor 45, if you want to combine the images again, you can operate the key switch 19 while looking at the screen on the monitor 45, and the process described above will be performed, so you can select the optimal frame. An image is formed.

In this frame image, for example, as shown in FIG. 5, the readout phase of the image data of the second field is adjusted so that the focus area API of the image of the first field matches the focus area AR2 of the image of the second field. Since this is done through adjustment, it is possible to easily focus the image of the focused portion ARP.

As a result, motion correction can be performed, image blur in a moving portion of a frame image can be removed, and image quality can be improved. Further, this motion correction does not require a complicated circuit configuration or algorithm, and can be performed easily and inexpensively.

In this case, the error when matching the frame images is at most (1/2) clocks and (1/2) lines, and it is possible to focus within this error range. Note that when performing motion compensation in this manner, the non-overlapping portion between the field memories 25 and 26 may become large depending on the specified position of the preset point.
In the case of the video printer shown in this example, it is possible to superimpose field images in an area slightly wider than the effective screen of a normal television receiver, that is, in an area that includes part of the invalid screen area. be.

When photographing a subject with a video camera, the shake of the frame image due to camera shake of the photographer is greater than the movement of the subject. As described above, if the readout phase of the other field in the H direction and the ■ direction can be adjusted with respect to one field, it is possible to correct motion due to hand shake.

In this embodiment, the composite image is formed using the first field as a reference, but either field may be used as a reference. Further, the minimum amount of movement that can be varied is 1 dot in the H direction, and 16 minutes in the ■ direction.

(Effects of the Invention) According to the video printer according to the present invention, at least one of the readout phases in the horizontal and vertical scanning directions of one field of image data read out from one of the first and second field memories is controlled. Since it is variable, it is possible to perform motion compensation, which has the effect of eliminating image blur in moving parts of the frame image and improving image quality.Moreover, this motion compensation This method has the advantage of being inexpensive and easy to perform without requiring any circuit configuration or algorithm.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
FIG. 2 is a block diagram showing the configuration of the image memory, FIG. 3 is a block diagram showing the internal configuration of the CPU, and FIGS. 4 and 5 are diagrams showing frame images before and after focusing. Explanation of main symbols in the drawings 8: Image memory, 25.26: Field memory, 27
: Synthesis circuit, 45: Monitor, SUC, SUR: Signal, C
LK: clock signal, SLO: load signal.

Claims (1)

[Scope of Claims] First and second field memories storing one frame of image data to be printed; and a field memory that is read from the first and second field memories;
means for displaying one frame of synthesized image data; and readout phases in horizontal and vertical scanning directions of one field of image data read from one of the first and second field memories. and means for making at least one variable.