JPH03237824A - Fm radio receiver - Google Patents

Abstract

PURPOSE:To prevent generation of noise sound and noise at reception by providing a means shifting an oscillated frequency of a voltage controlled oscillator in a direction parted from a disturbing frequency when no intermediate frequency is inputted. CONSTITUTION:A control microcomputer 10 operates a front end 1 so as to be tuned to a desired reception frequency f1 and an output of a D/A converter 9 controls a voltage controlled oscillator 6 so that the free-run frequency f0 of the voltage controlled oscillator 6 reaches an intermediate frequency. When a disturbing strong signal f2 exists in the vicinity of a desired frequency, the D/A converter 9 is acted to shift the free-run frequency opposite to the frequency of the disturbing strong signal within a lock range and the front end 1 is acted again to the desired reception frequency. Since part of the disturbing frequency f2 is not invaded in the lock range, noise sound is not entered in the detection output by the signal of the disturbing frequency f2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an FM radio receiver, and more particularly to an FM detection circuit.

[Conventional technology]

Conventionally, this type of FM detection circuit includes a phase comparator to which an IF output is applied to one input, and a voltage-controlled oscillator to which the output of the phase comparator is applied via a low-pass filter. The oscillation output is added to the other input of the phase comparator and the FM signal is applied to the output of the low-pass filter.
The configuration was such that a detected audio signal was extracted, and the oscillation frequency (free run frequency) was constant when the IF output of the voltage controlled oscillator was not input.

[Problem to be solved by the invention]

The conventional phase-locked loop (PLL) mentioned above
In order to ensure stability of the detector, the lock range is set to the maximum value of the audio modulation frequency (±
75kHz) is taken larger than that (±200kHz
In this case, if there is an interfering broadcasting station very close to the desired reception frequency, this frequency will also be detected as shown in Figure 3, causing abnormal sounds and noise during reception. There is a drawback.

The lock range is the width in which the PLL circuit is locked around the free-run frequency f, where fl is the intermediate frequency of the desired reception frequency (usually 10.7MHz), and f
FIG. 3 shows the relationship between f Orf+, fz, and lock range when 2 is the interference frequency.

SUMMARY OF THE INVENTION An object of the present invention is to provide an FM radio receiver that solves the above-mentioned drawbacks and does not generate abnormal sounds or noise during reception.

[Means to solve the problem]

The configuration of the present invention includes a phase comparator to which an intermediate frequency output is applied to one input, and a voltage controlled oscillator to which the output of the phase comparator is applied via a low-pass filter.
In an FM radio receiver that adds the oscillation output of the voltage controlled oscillator to the other input of the phase comparator and extracts the FM detected audio signal to the output of the low-pass filter,
The present invention is characterized by comprising means for moving the oscillation frequency of the voltage controlled oscillator in a direction away from the interfering frequency when the intermediate frequency is not input.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of an FM radio receiver according to an embodiment of the present invention.

In FIG. 1, in the FM radio receiver of this embodiment, the FM reception waves received from the antenna are transmitted to the front end 1.
The signal is sent to the IF amplifier 2 via the IF amplifier 2, and further sent to the phase comparator 4. A voltage controlled oscillator (VCC) 6 includes a varactor diode 7 and a coil 8. The output of the IF amplifier 2 is input to the control microcomputer IO via the signal meter circuit 3. The microcomputer 10 sends a detection frequency to the front end 1, and a control voltage is applied to one end of the varactor diode 7 via the D/A converter 9.

The front end 1 receives a signal received from an antenna, selects a desired frequency to be received, and transmits the signal to an intermediate frequency (hereinafter referred to as IF).

Normally 10.7MHz is used. ). The converted IF multiplied signal is amplified by the IF amplifier 2 and sent to the phase comparator 4.
is input to one side. The other input of the phase comparator 4 is the output of a voltage controlled oscillator 6 to which the output of the phase comparator 4 is applied via a low-pass filter 5. The low pass filter 5 and the voltage controlled oscillator 6 constitute a PLL circuit. The oscillation frequency of this PLL circuit when it is not locked is the coil 8. It is determined by the internal capacitance of the varactor diode 7 and voltage controlled oscillation. The signal meter circuit 3 represents the IF multiplied signal strength and the D/A converter 9
is a D/A converter controlled by the control microcomputer 10, and its analog output is connected to the varactor diode 7.

This receiver performs the following operations. The control microcomputer 10 operates the front end 1 to tune to the desired reception frequency f1.

At this time, the output of the D/A converter 9 is operated so that the free run frequency f0 of the voltage controlled oscillator 6 is approximately the same as the intermediate frequency of 10.7 MHz. The voltage value (1) of the signal meter circuit 3 at that time is memorized.

Next, the control microcomputer 10 operates the front end 1 to obtain a frequency near that frequency (usually the desired frequency ±200 kHz), and stores the voltage value (2) of the signal meter circuit 3 at this time.

As shown in Fig. 4, when there is a strong interference signal f2 near the desired frequency, V2>Vl, and when ■2 exceeds a certain set value, the D/A converter 9 is operated and the free Run frequency within lock range (typically 100kHz)
degree) move in the direction opposite to the frequency of the strong interfering signal, and then operate the front end 1 again at the desired reception frequency. In the receiver of this embodiment, since fo moves in the opposite direction to f2, part of the modulation frequency of f2 no longer falls within the lock range. As described above, the FM radio receiver of this embodiment differs from the conventional one in that the free run frequency of the voltage controlled oscillator 6 is varied during reception, and the center frequency of the lock range is varied.

FIG. 2 is a block diagram of an FM radio receiver according to another embodiment of the present invention.

In FIG. 2, the FM radio receiver of this embodiment has D/
The output of the A converter 9 and the output of the low-pass filter 5 are added by an adder 11, and the free run frequency of the voltage controlled oscillation circuit 6 is set such that the voltage applied to the internal variable capacitance element changes depending on the added voltage. It has become. In this example,
Unlike the previous embodiment, this embodiment has the advantage that the external variable capacitance element 7 is not required.

〔Effect of the invention〕

As explained above, in the present invention, by changing the free run frequency, a part of the interference frequency f2 does not enter the lock range, so that the signal of this interference frequency f2 causes abnormal noise etc. in the detection output. It has the effect of preventing people from getting into it.

A characteristic diagram showing the relationship between wave number f0, desired frequency f1, jamming frequency f2, and lock range. Figure 4 shows the free run frequency f0, desired frequency f1, and jamming frequency f2 of the FM radio receiver of Figure 1 or Figure 2. FIG. 4 is a characteristic diagram showing the relationship between and lock range.

1...Front end, 2...IF
Increase 11! instrument, 3...signal meter circuit, 4.
... Phase comparator, 5 ... Low pass filter, 6 ... Voltage controlled oscillator, 7 ... Varactor diode, 8 ... Coil, 9・・・・・・
...D/A converter, 10... Control microcomputer, 11... Adder.

Claims (1)

[Claims] a phase comparator to which an intermediate frequency output is applied to one input; and a voltage controlled oscillator to which the output of the phase comparator is applied via a low-pass filter, the oscillation output of the voltage controlled oscillator being applied to the phase comparator. In addition to the other input of
An FM radio receiver that extracts an FM-detected audio signal from the output of the low-pass filter, comprising means for moving the oscillation frequency of the voltage-controlled oscillator in a direction away from the interfering frequency when the intermediate frequency is not input. An FM radio receiver featuring: