JPH03234121A - Current injection type josephson gate - Google Patents

Abstract

PURPOSE:To improve the switching speed of a current injection Josephson gate without disturbing input/output separation by inserting an inductance in series with the input/output separation resistor of the current injection Josephson OR gate. CONSTITUTION:An inductance 20 is provided in parallel with an input output separation junction 19 and in series with an input/output separation resistor 15 at the input terminal of a current injection Josephson gate. Thus, an input current is branched into a path having the input/output separation resistor 15 and a path having switching junctions 17, 18 according to the inductance ratio at the rise of an input current. Since a current enough to switch the switching junctions 17, 18 flows to the switching junction synchronously with the rise of the input current, the gate is switched at a high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a current injection type Josephson gate used in superconducting integrated circuits and the like.

[Conventional technology]

Current-injection type Josephson OR (OR) gates are important components of superconducting integrated circuits because they enable miniaturization of circuits, have a wide operating margin, and have high gain characteristics. Here, Applied Physics Letters,
Vol. 40, p. 741, 1982.
upled Josepbson Logic))OR
The conventional technology will be explained using gates as an example.

FIG. 2 shows a circuit diagram of a conventional RCJL OR gate. The RCJL gate has a bias resistor 11. Current dividing resistors 12-14. Input/output separation resistor 15. Load resistor 16 and first switching junction 17. Second switching junction 18. It is composed of three Josephson junctions with a high pressure separation junction 19. The bias current introduced through the bias introduction end A and the bias resistor 11 is divided by the current dividing resistors 12 to 14, and the bias current is divided by the current dividing resistors 12 to 14. It is divided into a second switching junction 17.18. When an input current is injected from the input terminal into the first switching junction 17 through the input/output isolation junction 19 in this state, the first switching junction 17 switches to a voltage state, and the current flows through the first switching junction 17. A current is injected into the second switching junction 18, which also switches to the voltage state. 1st. Second switching junction 17.1.
When 8 switches, the bias current flows through one input/output isolation junction, the input/output isolation resistor 15 to the ground terminal, and switches the input/output isolation junction 19 to a voltage state.

The bias current flows out to the output terminal C via the load resistor 16. On the other hand, since the input/output isolation junction 19 is switched to a voltage state, the input current flows through the input/output isolation resistor 15 to the ground terminal, and the input/output is separated.

[Problem to be solved by the invention]

Conventional current injection type Josephson gates, such as RCJ L, are capable of high-speed switching of several tens of picoseconds to several picoseconds, but there are circuit problems in increasing the switching speed even faster.

That is, the Josephson junction effectively acts as an inductance and the input current does not immediately flow into the first switching junction 17. The Josephson junction equivalently acts as an inductance of Φo/(2πICcosθ). Here, Φ0 is the quantum magnetic flux of 2.07X 10-”W
b, IC is the critical current value of the Josephson junction, and θ is the phase difference between the superconducting order parameters at both ends of the Josephson junction. Here the parameters of a typical RCJL OR gate, I c of the first switching junction 17
= 0.3 mA, Ic-〇 of input/output isolation junction 19, assuming 2mA, and considering the case of 80% bias,
The combined value of the equivalent inductance of the first switching junction 17 and one input/output isolation junction is approximately 3.4 PH. In contrast, the typical value of the input/output isolation resistor 15 is 1.
3Ω, but L/R when the input current flows through the input/output isolation junction 19 into the first switching junction 17
The time constant is 2.6 picoseconds. For this reason, even if high-speed switching of about 1 picosecond is attempted, for example, it takes too much time for the input current to flow into the switching junction 17, so such high-speed switching cannot be achieved. In order to reduce the above-mentioned L/R time constant, the input/output separation resistor 1
If the value of 5 is too large, the input/output isolation junction 19 . The current flowing into the path including the input/output isolation resistor 15 decreases, the input/output isolation junction 19 does not switch, and input/output isolation is no longer performed.

The present invention aims to overcome these problems of the conventional current injection type Josephson gate and improve the switching speed without interfering with input/output separation.

[Means to solve the problem]

According to the present invention, in a current injection Josephson gate including at least an input/output isolation junction and an input/output isolation resistor,
A current injection type Josephson gate is obtained, characterized in that an inductance is provided at a position relative to the input terminal in parallel with the input/output isolation junction and in series with the input/output isolation resistor.

[Effect]

The current injection type Joffson gate of the present invention includes an inductance at an input terminal in parallel with the input/output isolation junction and in series with the input/output isolation resistor. Therefore, when the input current rises, the input current is divided according to the inductance ratio between the path with the input/output separation resistor and the path with the switching junction. If the above-mentioned inductance is set larger than the equivalent inductance of the Josephson junction, sufficient current for the switching junction to switch will flow into the switching junction in synchronization with the rise of the input current. can be switched quickly. After the switching junction switches, the current tries to flow from the path including the switching junction to the path including the input/output isolation junction, but since this path includes the above-mentioned inductance, the rise of the current is delayed. However, unlike the case where the value of the input/output isolation resistor is increased, the current flowing through the path including the input/output isolation junction immediately increases, and the input/output isolation junction switches, so that the input/output is separated.

〔Example〕

FIG. 1 is a circuit diagram of an RCJL OR gate according to an embodiment of the present invention.

In FIG. 1, 11 to 1 are R as described in the conventional technology.
It is the same as the CJL OR gate. 2° is the inductance added according to the present invention.

The parameters of each part are that the bias resistor 11 is 30Ω, the current dividing resistors 12 to 14 are each 1.0Ω, the input/output separation resistor 15 is 1.3Ω, the load resistor is 8.0Ω, the first... Second
The critical currents of the switching junctions 17 and 18 are respectively 0
．． 3 mA, the capacitance is 0.09 pF, the critical current value of the input/output isolation junction 19 is 0.2 mA, and the capacitance is 0.06 pF. These resistance values and critical current values are the most typical values, and the load resistance 16
The resistance ratios and critical current ratios, excluding , are set to maximize the operating margin. In addition, the capacitance value is set to be much smaller than that of a normal gate because the purpose is high-speed operation. The value of the inductance 2o added according to the present invention is set to 10 pH.

The operation of the circuit shown in FIG. 1 will be explained below using the above-mentioned circuit parameters. A bias current of 0.48 mA is supplied from the bias current introducing end A through the bias resistor 11. The bias current is passed through current dividing resistors 12 to 14 to the first. 0.24m to the second switching junction 17.18
A is divided into 1st and 1st. Second switching junction 17.
18 is 80% biased. When an input current of 0.2 mA is supplied through the input terminal B, the input current flows through the inductance 2o and the first switching junction 17. The current is divided according to the ratio to the equivalent inductance of the input/output separation junction 19. In the case of this embodiment, the value of the inductance 2o is 10pH1.As mentioned in the section on problems to be solved by the invention, the sum of the equivalent inductances of the first switching junction 17 and the input/output separation junction 19 is 3.4pH, so About 75% of the input current, about 0.15 mA, flows into the path including the first switching junction 17 in synchronization with the rise of the input current. The first switching junction 17 is biased at 80% and therefore switches with an input current of 0.06 mA. For these reasons, the first switching junction 17 can be switched in synchronization with the rise of the input current, and the time due to the equivalent inductance of the input/output isolation resistor 15 and the Josephson junction as described in the conventional technology is There will be no delay.

When the first switching junction 17 switches, the current flowing through the first switching junction 17 flows into the second switching junction 18, and the current flowing through the first switching junction 17 flows into the second switching junction 18.
switch. After this, the current flows to the input/output isolation junction 19
．． The current is divided into a path that passes through the inductance 20 and the input/output separation resistor 15 to the ground terminal, and a path that passes through the load resistor 16 and reaches the output terminal C. At this time, due to the presence of the inductance 20, the rise of the current flowing through the path including the input/output isolation junction 19 is somewhat delayed compared to the case without the inductance 20, but since the load resistance 16 is relatively large at 8.0Ω, it is possible to The total L/R time constant is relatively short, and the delay of the input/output separation resistor switch does not pose much of a problem.

The output current appearing at the output terminal C is the second switching junction 1
After 8 switches, the current starts to rise, decreases somewhat because the current flows through the path including the input/output isolation junction 19, and then increases again as the input/output isolation junction 19 switches.

As explained above, by using the circuit described in this embodiment, it is possible to construct an RCJL OR gate that can perform high-speed switching without interfering with input/output separation.

Although this embodiment has been explained using the RCJL OR gate as an example, inductance can be added at the position shown in the present invention in the same way in other types of current large Josephson OR gates having input/output isolation resistors and junctions. This allows switching time to be shortened without interfering with input/output separation. Also, by combining such OR gates, AN
Although it is well known that the D function can be realized, it is generally possible to realize high speed current injection type Josephson gates.

〔Effect of the invention〕

As explained above, the present invention inserts an inductance in series with the input/output isolation resistor of the current injection type Josephson ○R gate, thereby achieving
This has the effect of improving the switching speed of the current injection type Josephson gate.

[Brief explanation of drawings]

FIG. 1 and FIG. 2 are circuit diagrams of an embodiment of the present invention and a conventional example, respectively. 11... Bias resistance, 12-14... Current division resistance, 15... Input/output separation resistance, 16... Load resistance,
17... First switching junction, 18... Second switching junction, one... Input/output separation junction, 20...
...Inductance, A...Bias current introducing end, B
...Input end, C...Output end.

Claims (1)

[Claims] In a current injection type Josephson gate including at least an input/output isolation junction and an input/output isolation resistor, an inductance is provided at a position parallel to the input/output isolation junction and in series with the input/output isolation resistor with respect to the input terminal. A current injection type Josephson gate characterized by: