JPH03223894A - Image processing circuit - Google Patents

Abstract

PURPOSE:To enable anti-aliasing processing in real time by detecting color discontinuous points horizontally and vertically and changing the display color of right and left or upper and lower picture elements of the detected discontinuous points to an intermediate level. CONSTITUTION:An anti-aliasing circuit 4 uses a flip-flop as, for example, a one-picture element delay element (delay circuit) 4b and a register 3 as a delay element (delay circuit) 4d for one horizontal display period, and comparators 4a and 4c, and an arithmetic circuit 4e are added to perform data processing. The horizontal border of data C1 is detected and the vertical border of image data C2 is detected, so that the data are converted into other data C3 and C4. Thus, the anti-aliasing processing can be performed in real time.

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to an image processing circuit, and particularly to an image processing circuit that has been improved to improve the display quality of a display device.

<Prior Art> A conventionally well-known technique of this kind is to reduce the amount of jaggedness that occurs when diagonal lines are displayed on a raster scan type display (the jagged appearance that occurs when diagonal lines are displayed on a medium such as a bit map). However, anti-aliasing processing is known to be effective in smoothing out this judder. An example of this anti-aliasing processing is a technique that is performed by selectively disabling write enable for bit planes, and this technique is available as a commercially available product, such as A.D.
M (Advanced Micro Devices
) AmQ5c60 IC is widely used.

<Problems to be Solved by the Invention> However, this conventionally well-known anti-aliasing processing requires a large amount of time for calculation, so when displaying dynamic images such as in avionics, it is difficult to perform the processing due to constraints such as execution time. The problem was that it was impossible to hire from the outside.

The present invention has been made in view of the problems encountered in the conventional technology, and its purpose is to perform anti-aliasing processing in real time with a simple circuit configuration consisting of a small amount of hardware. The present invention provides an image processing circuit that can display dynamic images.

<Means for Solving the Problems> In order to achieve the above object, the present invention performs anti-aliasing processing on an image signal sent using a graph ink controller, a frame memory and a shift register, and displays the image signal on a display. In an image processing circuit that displays a predetermined image, the anti-aliasing circuit that performs the anti-aliasing process compares the input image signal with data delayed by one pixel in time and the original data in the horizontal direction. Detect discontinuous points in display color, and compare the data delayed by one horizontal display period with the original data to detect discontinuous points in display color in the vertical direction. The present invention is characterized in that the anti-aliasing process is performed by changing the display color of the upper and lower pixels to an intermediate level.

Regarding the image @signal (display data), by comparing the data delayed by one pixel in time with the original data, it is possible to detect discontinuous points in the display color (brightness) in the horizontal direction, By comparing the data delayed by the display period with the original data and detecting discontinuous points in the display color (11 degrees) in the vertical direction, the pixels to the left and right or above and below the detected discontinuous points can be detected. As a component of an anti-aliasing circuit for performing anti-aliasing processing by changing the brightness to an intermediate level, for example, a free-lag frog (hereinafter abbreviated as rFFJ) is used as a delay element (delay circuit) for one pixel. However, a register is used as a delay element (delay circuit) for one horizontal display period, and a comparator and an arithmetic unit are added to the register to perform data processing.

<Example> Examples will be described with reference to the drawings.

FIG. 1 is a program system diagram showing a specific embodiment of the image processing circuit of the present invention.

In Fig. 1, 1 is a graphics control, 2 is a frame memory, 3 is a shift register, 4 is an anti-aliasing 7 circuit consisting of the following configuration, and 5 is a look which is a circuit element used in a normal graphics system. It's an up table.

The anti-aliasing circuit 4 includes, for example, the graphics controller 1. When the image signal from the frame memory 2 is transferred through the shift register, the image signal is n be, g image data, and the simultaneous display color is 2n (in this case, n = 4)]. (The circuit configuration is well known, so the explanation will be omitted below.) A comparator 4a receives this image signal as one input and receives 4-bit fixed data (specific image data) C1 as the other input.
, the comparison output (1 bit) M+ from the comparator 4a is guided and delayed by one pixel, resulting in a delayed output (1 bit) N1.
For example, a delay circuit using FF that outputs 2 (ID in the diagram is l)
(representing a dot) 4tl, a comparator 4C1 which has the aforementioned signal as one input and 4-bit fixed data (specific image data) C2 as the other input, and a comparison output (1 bit) M3 from the comparator 4C. For example, a delay circuit configured using a shift register (IH in the figure) delays one horizontal display period and outputs a delayed output (1 bit) M4.
represents one horizontal scanning period, and the meaning at this time is shown when the number of stages of the delay circuit is configured to be exactly IH)
4d, signal output, comparison output M+, delay output M2.

Data processing is performed by a computing unit 4e which inputs the comparison output M3 and the delayed output M4, performs a predetermined operation, and outputs image data (4 bits) Do to the look-up table 5.

FIG. 2 is a diagram for explaining FIG. 1.

With this configuration, for example, as shown in FIG.
It has the following functions and the functions shown in FIG. That is, FIG. 2 shows a certain image data C1 of the image signal.
Detects the horizontal boundaries of the image and transfers that part to other image data (halftone part).

This is assumed to be 03).

Further, FIG. 3 shows the case of a function that detects a vertical boundary of certain image data C2 and converts that part into other image data (a halftone part, which is designated as 04).

FIGS. 3 to 6 are diagrams for explaining FIGS. 1 and 2. FIG.

Examples of use of the present invention and its operation will be described below with reference to FIGS. 1 to 6.

For example, consider the case where a white line segment is displayed on a screen with a black background.

Now, anti-aliasing episode F! Image data D0 which is the output of @4 is specific image data Co, C.

When Do is C2, the output of the lookup table 5 is "white", and when Do is C3, the output of the lookup table 5 is "gray".Then, the three types of white, C8 to C3, are (a) White parts that do not require anti-aliasing processing are drawn with “Co,” and (b) Parts 1 where horizontal anti-aliasing is applied.
For example, a line segment with an ungrooved slope of 45° is drawn with "C1" (partially converted to gray "C3" and displayed as shown in Figure 2), and (c) a line segment for which vertical anti-aliasing is applied is drawn with "C1". Draw with “C2”.

In such a case, the comparator 4a is connected to the shift register 3.
When a signal (image data) D is input from , if D matches the specific image data C4, the comparison output M1 becomes "H", and this comparison output M is led to the arithmetic unit 4e and one dot is output. The signal M2 is guided to the delay circuit 4b, subjected to delay processing, and then guided to the arithmetic unit 4e as a signal M2.

Further, when the signal of the comparator 4C matches the specific image data C2, its comparison output M3 becomes "H", and this comparison output M3 is led to the arithmetic unit 4e and also to the one-dot delay circuit 4d. The signal M3 is then delayed and guided to the arithmetic unit 4e as a signal M3. At this time, for example, as shown in FIG. 4, the arithmetic unit 4e is connected to an AND gate 4 to which an exclusive OR 4e2.4e3 inputted by M, .
e3 and a 1 (A) or 2 (B) selector 4e in which the output of the AND gate 4e3 is guided to the SEL terminal, the signal is guided to the A terminal, and the signal C3 is guided to the B terminal. , in this arithmetic unit 4e, the following logical operations are performed. Therefore, M1-M2
Alternatively, the output DO is set to C3 only when M, to M4, and D is output as is in the case of a pond.

FIG. 5 shows a time chart of an actual example of each signal relationship in the horizontal direction.

In FIGS. 1, 2, and 5, the contents of image pig D consist of C1 and unrelated data CX. The comparison output M becomes "H" only when the signal is C4, and the delayed output M2 is obtained by shifting M to the right. Therefore, M
At the time of M2 to l, that is, the content of Do changes to C only where the content of D becomes Cx -+C and (:, , -+ CX. Therefore, as shown in Figure 2 (B), Figure 2 (A) is M.

= M2.

FIG. 6 shows a time chart of an actual example of each signal relationship in the vertical direction.

In Figures 1, 3, and 6, when the comparison output M passes through the delay circuit 4d, it becomes M4 delayed by IH, so the fifth and sixth horizontal scanning timings are displayed in Figure 3. are as shown in Figures 6(A) and (B), respectively.
), the image data is the same as the previous fourth horizontal scanning data, so M3 and M4 are the same signal, and as a result, the output data D0 is exactly the same as the input signal, and the result is The display shown in FIG. 3(A) will be obtained.

On the other hand, in Fig. 6(B), there is a difference between M3 and M4, and as mentioned above, the image data of the different part is changed to C2 and becomes output data D0, resulting in the display as shown in Fig. 3(B). Become.

<Effects of the Invention> As explained above, the present invention has the following advantages regarding display data:
Detect discontinuities in horizontal display color (luminance) by comparing data delayed by one pixel in time with the original data, and also compare data delayed by one horizontal display period with the original data. The vertical display color (!1 degree) is not 3M! The anti-aliasing process is performed by detecting continuous points and changing the brightness of the pixels on the left and right or above and below the detected discontinuous points to an intermediate level, so the anti-aliasing process requires precision. Although it is not a big deal, it has the effect of being able to perform real-time processing (processing time is almost zero) with a simple circuit.

[Brief explanation of drawings]

FIG. 1 is a block system diagram showing a specific embodiment of the image processing circuit of the present invention, FIG. 2 is a diagram for explaining FIG. 1, and FIG.
6 to 6 are diagrams for explaining FIG. 1 and FIG. 2. DESCRIPTION OF SYMBOLS 1...Graphics controller, 2...Frame memory, 3...Shift register, 4...Anti-aliasing circuit, 5...Lookup table.

Claims (1)

[Claims] In an image processing circuit that performs anti-aliasing processing on an image signal sent using a graphic controller, a frame memory, and a shift register to display a predetermined image on a display, an anti-aliasing circuit that performs the anti-aliasing processing is provided. , Compare the input image signal with data delayed by one pixel in time and the original data to detect discontinuous points in the display color in the horizontal direction,
In addition, the data delayed by one horizontal display period is compared with the original data to detect discontinuous points in the display color in the vertical direction, and the display color of pixels to the left and right or above and below the detected discontinuous points is changed to an intermediate level. An image processing circuit configured to perform the anti-aliasing processing by performing the anti-aliasing process.