JPH03218529A - High speed interruption processor - Google Patents

Abstract

PURPOSE:To attain a high speed and optimum saving operation by processing only registers which require stack saving among stack saving of registers which are required at the time of generating an interruption by means of hardware or software. CONSTITUTION:Flags 2 showing whether the registers are used or not on a user program are given for respective registers 1-8, and hardware sets the flags 2. When interruption generates, the flags 2 are referred to and only the registers 1-8 which require saving are saved in a stack area. Software which extracts the registers 1-8 that use the user program at the time of compiling and previously saves the registers 1-8 as a saving program is prepared. Thus, the registers can be saved at high speed when interruption generates and a user does not need to prepare the saving program, whereby the burden of software can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a high-speed interrupt processing device that can save registers from a stack at high speed by hardware or optimized software when an interrupt occurs. It is.

2. Description of the Related Art Conventionally, when data in a register is saved when an interrupt occurs, the save operation is executed by software. A register is made up of multiple registers to form a register group, but depending on the user program, not all registers may be used, and there is a method of saving all registers to the stack when an interrupt occurs, but it is not possible to use them. The method used is to save only the registers that are available on the stack to the stack and use the stack area effectively.

Problems to be Solved by the Invention However, the method of searching a used register from a plurality of registers takes time and also increases the burden on software.

On the other hand, as a method to solve this problem, a method has been considered in which a plurality of register groups (register files) are prepared in hardware and the register files are switched when an interrupt occurs. However, with this method, the nesting level of interrupts is limited by the number of register files, and if an interrupt larger than the register file occurs, the software saves the register contents to the stack. Ta.

The present invention solves the above-mentioned conventional problem, and achieves high-speed and optimal saving operation by processing only the registers that need to be saved from the stack using hardware or software when saving registers that occur when an interrupt occurs. The purpose is to provide a high-speed interrupt processing device.

Means for Solving the Problem In order to solve this problem, the high-speed interrupt processing device of the present invention has a flag for each register indicating whether the register is used in the user program, and this flag is set by hardware. set, and when an interrupt occurs,
By referring to this flag, only registers that need to be saved are saved to the stack area. Alternatively, at the time of compiling the user program, the registers in use are extracted, software for saving these registers is prepared in advance as a save program, and the software is stored in the ROM.

Effect: With this configuration, it is possible to realize high-speed and optimized register saving when an interrupt occurs.

Example Examples of the present invention will be described below.

FIG. 1 is a block diagram showing an embodiment of the present invention in which a flag is set by hardware when an access is made on a user program, and only registers with flags set when an interrupt occurs are saved. A plurality of general-purpose registers 1 are configured to form a register group. Each general-purpose register 1 is provided with an access history flag 2 that indicates whether or not it has been accessed by the user program, and a write access signal 9 from the micro ROM 5 is input to the flag set signal generator 3 and becomes a set signal. enable the corresponding access history flag 2. Since the contents of the general-purpose register 1 become valid only after a write access is made, the access history flag 2 is set only by the write access signal 9 of the micro ROM 5.

When saving the register when an interrupt occurs, the value of the access history flag 2 is inputted to the flag detection unit 4 as the flag signal 7. In the flag detection section 4, the flag signal 7
is enabled, and transmits it to the micro ROM 5 as general-purpose register number 8. The micro ROM 5 receives this general-purpose register number 8 and saves the corresponding general-purpose register 1 to a stack area (not shown). When the saving is completed, the next general-purpose register number 8 is received, and the micro ROM 5 saves the next general-purpose register.
This operation is repeated until all general-purpose registers to be saved are saved to the stack. Since the registers to be saved when an interrupt occurs can be extracted by hardware, and the registers are saved by hardware, only the registers that need to be saved can be saved at high speed.

FIG. 2 is a block diagram showing an embodiment of the present invention in which general-purpose registers used at the time of compilation are extracted and a general-purpose register saving routine is stored in a ROM. When the source program 10 written in a high-level language is converted into machine language by the compiler 13, the registers used are extracted,
The information is stored as general-purpose register number l1. Next, the register corresponding to the extracted general-purpose register number 11 is saved to the stack area when an interrupt occurs. A save program 12 in machine language is created separately from the user program of the main body. By running this interrupt save routine before executing interrupt processing, there is no need to check the register used when an interrupt occurs, and interrupt save processing can be performed at high speed.

Effects of the Invention As described above, according to the present invention, it is possible to perform register saving at high speed when an interrupt occurs, and there is no need for the user to prepare a saving program, thereby reducing the burden on software.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the structure of one embodiment of the invention, and FIG. 2 is a block diagram showing the structure of another embodiment of the invention. 1...General-purpose register, 2...Access history flag, 3...Flag set signal generator,
4...Flag detection unit, 5...Micro ROM, 6...Flag set signal, 7...
...Flag signal, 8...General-purpose register number, 9
...Write access signal line, 10...
Source program, 11... Extracted general-purpose register number, 12... Save program in machine language, 13... Compiler of the present invention.

Claims (2)

[Claims] (1) Each general-purpose register has a flag indicating whether or not there has been a write access in the past, and a predetermined flag is set by the hardware at the time of a write access, and only the register to which the predetermined flag is set when an interrupt occurs is transferred to the hardware. A high-speed interrupt processing device that realizes high-speed interrupts by saving them to a stack area. (2) In a compiler that converts a source program written in a high-level language into machine language, a routine that extracts a predetermined general-purpose register to be used, saves or restores this general-purpose register to the stack area, is written in ROM, and an interrupt is generated. 2. The high-speed interrupt processing device according to claim 1, wherein high-speed interrupts are realized by activating this routine at certain times.