JPH03201603A - Variable delay circuit and device - Google Patents

Abstract

PURPOSE:To make an output waveform almost same even through any line and to specify a delay amount to be obtained at a fixed value by generating a transmission loss similar to the transmission loss caused by the passage of the delay line equipped with distribution constant impedance, by a loss line equipped with concentration constant impedance. CONSTITUTION:Delay lines l1-ln are provided to delay electric signals for prescribed time, and loss lines Z1-Zn are provided while replacing the impedance of the constant distribution transmission loss for these delay lines l1-ln with the concentration constant. Then, switching means SW1-SWn are provided to switch the delay lines l1-l2 and the loss lines Z1-Zn between the input/output terminals of the electric signals to be delayed. Thus, similarly to the transmission loss caused by the passage of the delay lines l1-ln equipped with the distribution constant impedance the transmission loss is generated by the loss lines Z1-Zn equipped with the concentration constant impedance and therefore, the output waveform can be made almost same even through any line.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a variable delay circuit and device for delaying electrical signals with a high degree of time resolution. /
Amplitude converter (Tlmet.

AspHtude Converter).

[Conventional technology]

Such a variable delay device is required to have high time resolution and low jitter, and the conventional device is constructed as shown in FIG. 8 using a coaxial cable. As shown in the figure, the variable delay device is constructed by connecting n variable delay circuits in series. Each variable delay circuit is formed by connecting a delay line p made of a coaxial cable and a through path TP in parallel, and these can be switched by a changeover switch SW. Therefore, for example, with the changeover switch sw - sw, the through bus Tl
n-1 P -TP is selected and selector switch 5Wni
When the through bus TP is selected at n-1, the electrical signal input from the human input terminal IN will be delayed by the delay line g in the process of reaching the output terminal OUT.

[Problem to be solved by the invention]

However, in the conventional device as described above, the through bus TP causes almost no transmission loss, but the delay line causes transmission loss, even if it is small, so the output waveform changes depending on the changeover switch SW. come. For example, if you want to obtain a delay amount of 20nsec,
The coaxial cable used as the delay line g requires a length of 4 m, but when a 3D-2V line is used as the coaxial cable, the transmission loss is 2 for a frequency of 200 MHz.
20 dB/km. Therefore, a 4m coaxial cable has a transmission loss of 0.88dB, so a signal with an input amplitude of 1V (frequency -200MHz) has a transmission loss of 0.9dB.
It will be output with an amplitude of V.

For this reason, as shown in FIG.

Furthermore, there is a problem in that if the frequency components of the human input signal are different, the delay time is also different.

That is, when the input signal v1□ having the waveform shown on the left side in FIG. 9(a) is applied to the variable delay circuit, the output signal V
. The waveform of No. 1 is the waveform on the right side of FIG. 3A, and if the trigger level is vT, a difference of Δt will occur in the delay time. The magnitude of Δ11 varies depending on the length of the delay line p, and therefore the delay time cannot be accurately defined. Further, as shown in the waveform shown on the left side of FIG. 9(b), when a human input signal v1□ with a low frequency component is applied to the variable delay circuit, the output signal V. 2 is the waveform shown on the right side of the same figure (b), and if the trigger level is VT, the delay time is Δ
It becomes t. Here, Δ11>Δt2, and therefore, as the frequency component increases, the amount of delay increases. .

The present invention aims to solve the above problems.

[Means to solve the problem]

The variable delay circuit according to the present invention includes a delay line for delaying an electric signal by a predetermined time, a loss branching line in which the impedance for the distributed constant transmission loss of the delay line is replaced with a lumped constant, and a delay line and a loss branching line. It is characterized by comprising a switching means for switching between the input and output terminals of the electrical signal to be delayed between the branch line and the input/output terminal of the electrical signal to be delayed.

Further, in the variable delay device according to the present invention, a plurality of variable delay circuits are connected in series via their input/output terminals, and each of the plurality of variable delay circuits is configured to delay an electrical signal by a predetermined time. A delay line, a loss branch line in which the impedance of the distributed constant transmission loss of the delay line is changed by a lumped constant, and a switch for switching between the input and output terminals of the electrical signal to be delayed between the delay line and the loss branch line. It is characterized in that it is configured by having means.

[Effect]

According to the present invention, a transmission loss similar to that caused by passing through a delay line having a distributed constant impedance is generated by a loss branch line having a lumped constant impedance. Even if the output waveform is negative, the output waveform will be negative.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a configuration diagram of a variable delay circuit according to an embodiment. A filter having a lumped impedance Z is connected to the through bus TP arranged in parallel with the delay line p. This filter is equivalent to the distributed constant impedance of the delay line p, and constitutes a loss branching line. Such a delay line and a loss branch line are selectively connected to the input terminal IN and the output terminal OUT by a changeover switch SW.
be interposed between. That is, when the delay line is selected by the changeover switch SW, the signal to the input terminal IN is delayed by a predetermined amount and output from the output terminal OUT, and when the lossy line is selected by the changeover switch SW,
It is output from the output terminal OUT without being delayed. At this time, the waveform of the signal appearing at the output terminal OUT is almost the same whether the delay line or the loss branch line is selected.

In the embodiments described above, the changeover switch SW can be composed of, for example, a relay, an analog switch, a semiconductor switch, or the like. In addition, the filter (impedance 2) that replaces the distributed constant loss of the delay line g with a lumped constant is composed of a resistor R1, a capacitor, and a C1 inductance. Further, a coaxial cable or a phase variable means can be used as the delay line p, and the length when a coaxial cable is used is set to an appropriate length depending on the required amount of delay.

FIG. 2 is a configuration diagram of a variable delay device according to an embodiment. As shown in the figure, n variable delay circuits are connected in series, each having a delay line p and a filter with impedance 2. Here, the delay amount of the delay line I is defined as the delay amount of the delay line I
The delay amount of the delay line I is set to be half of the delay line I, and the delay amount of the delay line I is set to be half of the delay line I, and the delay amount of the delay line I is set as n-1.
2n-1 Similarly, if the delay amount of the delay line p1 is set to half that of the delay line I2, the maximum delay amount can be realized by the step of the delay amount of the delay line 11.

Next, in order to confirm the usefulness of the above example, the present inventor
The following experiment was conducted.

First, a coaxial cable (1,5D-QEV) with a length of 4 m and a resistance of 50 Ω was prepared as a delay line. The delay amount of this coaxial cable is 20 nsec.

Next, the circuit shown in FIG. 3(a) was prepared as a filter in which this was replaced with a lumped constant. Here, L −L2=
7nHSR-250Ω, C-4pF. Such a filter is actually created by the circuit shown in FIG. 3(b). That is, a capacitance of 4 pF is generated by stray capacitance. Note that L 1 and L 2 are made up of 2 cm 2 of copper wire with a diameter of 1 mm, and resistance R is made up of 1 connected to four resistors r of Ω.

We verified that the transmission losses of the delay line and the loss branch line are the same through measurements using a spectrum analyzer and step voltage transmission characteristics.

First, a spectrum analyzer is a device that analyzes the frequency components of a signal, with the horizontal axis representing frequency and the vertical axis representing signal strength. In this device, the frequency characteristics of the line can be measured by sweeping the frequency of signals of the same intensity using a frequency sweeper.

As a result of actual measurements, the frequency characteristics of the delay line using the coaxial cable (1,5D-QEV) were as shown by the solid line in FIG. 4(a). Next, as a result of actual measurements, the frequency characteristics when passing through the loss line shown in FIG. 3 were as shown by the solid line in FIG. 4(b). Here, when the frequency characteristic curve of the delay line shown in FIG. 4(a) is superimposed with a dotted line on FIG.

Next, step voltage transfer characteristics are obtained as follows. That is, a step voltage with a very fast rise is applied to the line, and the output waveform is observed with an oscilloscope to determine the actual attenuation of the waveform. The above coaxial cable (1,5D-
The waveform when passed through a delay line consisting of
It has been found through actual measurements that the waveform when passing through the loss line in FIG. 3 is as shown by the solid line in the figure, and the waveform is as shown by the dotted line in the same figure. Here, the waveform indicated by the dashed line in the figure is the waveform in the case of no loss, and it can be seen that the waveforms when passing through the delay line and when passing through the loss branch line match well.

FIG. 6 shows an embodiment of a variable delay circuit using phase variable means as a delay line. In this circuit, a filter (impedance 2) with a value equivalent to the loss caused by the phase variable means F is provided so that the waveforms when passed through both are the same, and only the phase (time difference) is different. .

FIG. 7 shows an embodiment in which the changeover switch SW is composed of an FET. In this embodiment, the switching signal S causes the FETQ to
, delay Sw when Q2 turns ON
l Line g is selected and the signal is delayed by a predetermined amount.

Then, with the switching signal S, FETQ, Q becomes 0NSW.
3 4 , the loss branching line by the filter (impedance 2) is selected, and the waveform of the output signal is made to be between the waveform and the line when the waveform is delayed.

〔Effect of the invention〕

As explained above in detail, according to the variable delay circuit and device of the present invention, transmission loss similar to that caused by passing through a delay line having a distributed constant impedance can be reduced by a transmission loss caused by passing through a delay line having a lumped constant impedance. Since it is generated by a loss branch line, the output waveform will be negative regardless of which line it passes through.

Therefore, regardless of the trigger level Vr when the signal passes through the delay line or not, the amount of delay obtained can be set to a constant value. Furthermore, the amount of delay can always be the same regardless of whether the frequency component becomes high or low.

[Brief explanation of drawings]

FIG. 1 is a configuration diagram of a variable delay circuit according to an embodiment of the present invention,
FIG. 2 is a configuration diagram of a variable delay device according to an embodiment of the present invention;
Figure 3 is a circuit diagram of the loss branch line used in the experiment, Figure 4 is a frequency characteristic diagram obtained by a spectrum analyzer, Figure 5 is a diagram showing step voltage transmission characteristics, and Figure 6 is a variable delay using phase variable means. A block diagram of an embodiment of the circuit, FIG. 7 is a block diagram of an embodiment of a variable delay circuit using an FET as a changeover switch SW, FIG. 8 is a block diagram of a conventional variable delay device, and FIG. 9 is a block diagram of a conventional variable delay circuit. It is a figure showing a problem. ρ...delay line, SW...changeover switch, TP...
-Through path, IN...input terminal, OUT...output terminal, VT...trigger level, F...phase variable means.

Claims (2)

[Claims] 1. a delay line for delaying an electrical signal by a predetermined time; a loss branch line in which the impedance for the distributed constant transmission loss of this delay line is changed to a lumped constant; and an electric signal to delay the delay line and the loss branch line. A variable delay circuit comprising: switching means for switching between signal input and output terminals. 2. In a variable delay device in which a plurality of variable delay circuits are connected in series via their input/output terminals, each of the plurality of variable delay circuits has a delay line for delaying an electrical signal by a predetermined time, and a distributed constant of this delay line. a loss branching line in which the impedance corresponding to the transmission loss is changed by a lumped constant, and a switching means for switching between the input and output terminals of the electrical signal to be delayed between the delay line and the loss branching line. A variable delay device characterized by: