JPH0319855A - Thermal transfer recorder - Google Patents

Abstract

PURPOSE:To perform color half tone recording by a method wherein a means which records variable density information according to an image information signal is provided, image information which is written in an image information storing means based on a command to be sent selectively from an external device is treated by conversion, and a light and shade image is recorded according to that. CONSTITUTION:A digital processing part 2 analyzes a content of a command, reads an image data of an image memory 13, performs arithmetic processing such as correction or the like, and stores that again in the image memory 13. When an analog interface part 2 inputs a video signal from an analog image signal source 6, a controller 22 sends an information signal to an arithmetic controller 12, a system controller 26, and an image memory part 4 via a status bus 11. The video signal is digitized with an A/D converter 17 and is outputted to a data bus 8. The image data to be outputted to the data bus 8 is stored in a line memory 23 with a thermal transfer recording part 5, is converted to a signal of density corresponding to the image data with a half tone control circuit 24, and a half tone image is recorded with a thermal head 25.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is capable of generating images, characters, figures, etc. (hereinafter referred to as , these are collectively referred to as images), and particularly relates to a thermal transfer recording apparatus suitable for recording halftones of color images.

[Conventional technology]

There are information terminal output devices that record characters and figures in response to digital signals output from communication devices and computers.
Recently, among these output devices, devices that are capable of recording an image by outputting halftones from a color digital image signal having intermediate gradation (halftone) information have been put into practical use and are becoming popular. In addition, equipment that handles analog image signals, such as television broadcasting and video tape recorders, has become widespread, and devices that can record images in color and with halftones from these analog image signals have also been put into practical use and are becoming more widespread. .

This type of recording device has the following advantages: it is easy to maintain, the shading can be controlled for each pixel, so it can express many tones without sacrificing resolution, and it is small and can be used in general offices and homes. Therefore, among the thermal transfer recording methods, the sublimable dye thermal transfer recording method is considered to be promising.

In addition, the progress of this type of recording method is remarkable, and in principle, the recording method itself makes it possible to obtain high-quality images approaching that of conventional photographs. It was difficult to obtain a signal, and the performance of this recording device could not be fully exploited. For this reason, in order to enable high-quality image recording based on image information signals obtained from electronic equipment such as computers and video equipment, various types of processing such as color tone correction and shading correction are required. After that, it was necessary to record using the above recording method.

Conventionally, as this type of correction, for example, the Journal of the Television Society Vol. 4 2, No. 2 (1988),
As disclosed in the paper entitled "Image Processing Techniques in Printing" by Fujita et al. in PP 98-107, it is stated that recording must be performed after performing various corrections. In this prior art, the necessary correction processing was performed by an image processing system centered on a computer, etc., provided separately from the recording device.

In addition, thermal transfer recording devices themselves have problems that cause image quality deterioration, and in order to correct the density unevenness of recording due to heat accumulation in the thermal head part, one of them is
In Japanese Patent No. 9-48169, when recording image data for one line at a time, image data for multiple lines that have already been used for recording are calculated on the image data for one line to be recorded. A technique has been disclosed that detects the temperature of the thermal head and corrects one line of image data to be recorded accordingly.

[Problem to be solved by the invention]

As mentioned above, in a thermal transfer recording device that can perform color and halftone recording, it is necessary to perform recording based on image information commensurate with the performance of this recording device, and for this purpose, an external electronic It is necessary to perform various correction processes on the original image information supplied from the device.

However, in the apparatus described in the above-mentioned Journal of the Society of Television Engineers, the above-mentioned correction process must be performed by external means, mainly a large-sized computer, and therefore the recording apparatus becomes large-scale. The system itself is used in large-scale printing factories and research facilities, and is not suitable for use in general offices or homes. In addition, there are problems in that the handling of image information is complicated and operation time is long, and since a computer is used for correction, programs are required to perform the various corrections mentioned above, and image data cannot be transferred from a printer. It was only possible to implement this system to a limited extent, as it required a dedicated interface for reading data.

In addition, corrections necessary for the characteristics of the recording device itself, corrections related to the characteristics of the recording medium applied to the recording device, and special information such as characters and line drawings that cannot be handled as images, etc. It was difficult for this computer to handle corrections and changes that it did not know about.

On the other hand, the above-mentioned Japanese Patent Application Laid-Open No. 59-48169 solves one problem that occurs in recording devices, which is heat accumulation in the thermal head portion, but the problem is that the recording density changes due to temperature changes throughout the inside of the recording device. Heat accumulation over a large area of the recording screen where the change is not just a few lines but hundreds of lines, uneven recording (shading) of the recording device itself
Further, correction contents that differ depending on the recording medium were not considered, and the necessity of correction related to the structure of the recording apparatus itself was not fully recognized.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thermal transfer recording device that solves these problems and allows image information to be easily corrected within the device.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a thermal transfer recording apparatus having an image information input means and an image storage means having a storage capacity of one image or more, in which image information already input to the image storage means is stored. Provide a means to internally read and perform calculation processing. Further, by providing a means for storing small-scale information from the outside in conjunction with the arithmetic processing means, it is possible to refer to this information and perform arithmetic operations on the image information.

Furthermore, it has means for inputting image information from an external image source in synchronization with the progress of thermal transfer recording, and in response to the input,
This function serves as a means for sequentially changing the contents of arithmetic processing corresponding to the progress of recording.

Furthermore, the thermal transfer recording apparatus has a temperature condition detection means and a fixed correction information storage means inside the thermal transfer recording apparatus, and is capable of correcting the fixed pattern of the apparatus itself. The plan is to make corrections that correspond to the ambient temperature.

[Effect]

Correction operations can also be applied within the recording apparatus to information signals, such as analog signals, that are input to the image storage means within the recording apparatus without passing through an electronic computer.

Even for image information that has been compressed and cannot be used as is, the thermal transfer recording device can input decompression and restoration algorithm data from the outside and perform the restoration operation within the device, making it possible to record. became.

In addition, it is now possible to record the previously inputted image information and newly inputted images from the outside by sequentially combining them and storing them, and at the same time send the image information to the outside. This eliminates the need for recording, reducing the overall processing time.

Furthermore, by providing means for changing the content of correction processing based on information obtained from the temperature status detection means inside the thermal transfer recording apparatus, correction corresponding to the temperature inside the apparatus is performed.

Since the device itself is provided with a storage means for fixed pattern correction information, correction operations corresponding to correction contents that differ from device to device are performed based on this correction information.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a thermal transfer recording device according to the present invention, in which 1 is a thermal transfer recording device, 2 is a digital processing section, 3 is an analog interface section, 4 is an image memory section, and 5 is a thermal transfer recording device. 6 is an analog image signal source, 7 is an image processing switch, 8 is a data path, 9 is an address bus, 10 is a control bus, 11 is a status bus, 12
13 is an arithmetic controller, 13 is an image memory, 14 is a bidirectional data path switch, 15 is an address monitoring circuit, 16 is an address bus switch, 17 is an A/DitA device, ■8 is a digital data switch, 19 is a synchronization separation circuit, 20
21 is an address control circuit, 21 is an address switch, 22 is a controller, 23 is a line memory, 24 is a halftone control circuit, 25 is a thermal head, 26 is a system controller, 27 is an address control circuit, 28 is an address switch, 29 is a mechanism section.

In FIG. 1, the thermal transfer recording apparatus 1 of this embodiment is composed of a digital processing section 2, an analog interface section 3, an image memory section 4, and a thermal transfer recording section 5.

The digital processing unit 2 analyzes the contents of the command sent from the image processing switch 7 provided externally, and
It is composed of an arithmetic controller 12 that performs overall control, reads out image data in the image memory 13, and performs arithmetic processing, an address control circuit 15, an address bus switch 16, and a bidirectional data path switch 14, and the image memory l3, which will be described later. The image data stored in the image memory 13 is read out, subjected to arithmetic processing such as correction, and then stored in the image memory 13 again.

The analog interface unit 3 includes a controller 22 that controls the entire analog interface unit 3, a sync separation circuit 19 that extracts a sync signal from a video signal from an external analog image signal source 6, and a sync separation circuit 19 that extracts the sync signal from the video signal from the external analog image signal source 6. An address control circuit 20 generates a control address to the image memory section 4, and an A/D converter digitizes the video signal based on the synchronization signal extracted by the synchronization separation circuit 19.
A D converter 17, a digital data switch 18, and an address switch 21 are arranged. Furthermore, the thermal transfer recording section 5 includes a line memory 23 that stores image data for one line to be printed, a halftone control circuit 24 that controls the thermal head 25 based on the data read out from the line memory 23, and a thermal transfer A system controller 26 that controls the entire recording section 5, and an address control circuit 2 that controls the read address of the image memory section 4 during thermal transfer recording.
7, an address switch 28 and a mechanism section 29 of the thermal transfer recording section 5.

Temperature information detected from a temperature detection sensor (not shown) inside the mechanism section 29 is sent to a part of the control bus 10 via the system controller 26 . Similarly, information indicating the type of recording medium detected by the recording medium detecting means (not shown) inside the mechanism section 29 is stored in another part of the control bus 10 by the system controller 26.
sent via.

When the analog interface section 3 inputs a video signal from an external analog image signal source 6, the analog interface section 3 operates under the control of the controller 22. The controller 22 also connects the analog interface unit 3 to the arithmetic controller 12 of the digital processing unit 2, the system controller 26 of the thermal transfer recording unit 5, and the image memory unit 4 via the status bus 11.
sends an information signal that the video signal is input.

In the analog interface section 3, the input video signal is supplied to an A/D converter l7 and a sync separation circuit 19.

In the synchronization separation circuit 19, a synchronization signal is separated from this video signal, and a sampling pulse for the A/D converter 17 and a clock for the address generation circuit 20 are generated. A/D
In the converter l7, the input video signal is digitized using the sampling pulse from the sync separator circuit l9, and the image data is sequentially output to the data bus 8 via the digital data switch 18.

When writing the image data output from the analog interface section 3 to the data bus 8 to the image memory section 4, the controller 22 sends a write control signal to the image memory section 4 via the control bus 10, and also sends a write control signal to the image memory section 4 via the control bus 10. 20 generates an address signal whose contents change every clock supplied from the synchronization separation circuit 19, and sends it to the image memory section 4 via the address switch 21 and the address bus 9.

As a result, in the image memory section 4, the image data sequentially supplied from the analog interface section 3 via the data bus 8 is transferred to the address specified by the address signal supplied from the analog interface section 3 via the address bus 9. written.

Also, from the analog interface section 3 to the data bus 8
When the thermal transfer recording section 5 records an image based on the image data outputted to the image data, the system controller 26 causes the thermal transfer recording section 5 to start a recording operation.

That is, in the thermal transfer recording section 5, the image data output from the analog interface section 3 to the data bus 8 is stored in the line memory 23 one line at a time, and the halftone control circuit 24 adjusts the density according to the content of the image data. It is converted into a signal representing the signal and supplied to the thermal head 25. As a result, an image with halftones is recorded on recording paper (not shown).

Note that the video signal inputted by the analog interface section 3 may be temporarily recorded in the image memory section 4, or may be sent directly to the thermal transfer recording section 5 for image recording. The thermal transfer recording section 5 may perform recording while the image memory section 4 performs recording.

The digital processing section 2 can perform processing to be described later on the image data stored in the image memory section 4. In this case, the arithmetic controller 12 of the digital processing section 2 reads out control signals via the control bus 10 and sends them to the image memory section 4.
and puts the image memory unit 4 into the read state. Further, an address signal is generated by the address generation circuit 15 and sent to the image memory 4 via the address bus switch 16 and the address bus 9. As a result, the image data at the specified address is read from the image memory unit 4, and is supplied to the arithmetic controller 12 via the data bus 8, bidirectional data path switch 14, and data bus L1, and the image data is subjected to predetermined processing. will be applied.

When this process is completed, the image memory section 4 is similarly set to the write state, and an address signal is generated by the address generation circuit 15 and supplied to the image memory section 4 via the address bus switch 16 and the address bus 9. be done. At the same time, the arithmetic controller l/roller l2 outputs processed image data, and this image data is sent to the image memory unit 4 via the data bus L, bidirectional data path switch 14, and data bus 8, and is sent to the image memory section 4 according to the specified data. is written to the specified address.

As described above, desired processing can be performed on the image data to be recorded.

When recording an image using the image data stored in the image memory unit 4, the thermal transfer recording unit 5 operates, the system controller 26 sets the image memory unit 4 to the read state, and the address generation circuit 27 An address signal is generated and supplied to the image memory unit 4 via the address switch 28 and the address bus 9. As a result, image data is read out from the image memory unit 4 and transferred via the data bus 8 to thermal transfer recording. The image is supplied to section 5 and image recording is performed as described above.

FIG. 2 is a perspective view showing a specific example of the mechanism portion 29 in FIG. 1.

In the figure, the surface of the thermal head 25 has a large number of microscopic particles (for example, 1024 pieces with a width of 150 μm) arranged in a row.
A heating element 30 (with a length of 250 μm) is provided,
The front surface of the heating element 30 and the back surface of the ink paper 31 are in contact with each other.

Further, the front surface on the opposite side of the ink paper 31 is in contact with a recording paper 32, and the back surface of this recording paper 32 is in contact with a platen 33. By being pressed by means not shown, the heating element 30, ink cover 31, and recording cover 32 of the thermal head 25 are supported. The platen 33 has a cylindrical shape and is rotatably supported, and the central axis of the platen 33 is coupled to the rotating shaft of a motor 34 via a reduction gear. Therefore, as the motor 34 rotates, the platen 33 rotates, and the ink paper 31 and the recording paper 32 are fed. The motor 34 is provided with a rotation amount detector 35, and the detection result is sent to a motor speed control circuit 36 and the system controller 26, thereby controlling the speed of the motor 34.

With this structure, recording is performed by passing a current through a large number of minute heating elements 30 provided on the surface of the thermal head 25 and causing them to generate heat. Each of the many heating elements 30 corresponds to a pixel, and by controlling the amount of heat generated for each pixel according to the image information signal,
The density of recording for each pixel is controlled. This gray level control is performed by the halftone control circuit 24.

When the recording of the part where the heating elements 30 are lined up in one row is completed,
The next column is recorded by driving the motor 34 as described above and moving the ink paper 31 and the recording paper 32 by a predetermined distance (for example, 166 μm). In this way, a planar image is formed by repeating recording for each row of successive heating elements 30. Furthermore, multiple color overlapping recording is performed using the ink paper 31 with different coloring materials, thereby performing color recording.

FIG. 3 is a perspective view showing the external appearance of the thermal transfer recording apparatus 1 shown in FIG. 1.

In the figure, the exterior of the thermal transfer recording device 1 including the thermal transfer recording section 5 and other parts includes a power switch 37, a print start switch 38, a freeze switch 39, an image processing switch 7, a consumables replacement M40, and a paper ejection slot. 41 and a discharge tray 42 are provided.

When the power switch 37 is turned on and the freeze switch 39 is pressed, an analog image signal such as a video signal from the analog image signal source 7 in FIG. written as data. Further, when the image processing switch 7 is pressed, the image data in the image memory section 4 is changed. Then, when the print start switch 38 is pressed, the recording operation is started.

When recording is completed, the recording paper 32 is discharged from the discharge port 4l and placed on the paper discharge tray 42.

Use the consumables replacement lid 40 to replace consumables such as ink paper and recording paper.
You can open it and do it.

FIG. 4 is a perspective view of the internal circuit board portion of the thermal transfer recording apparatus 1 shown in FIG. 3, viewed from the back side.

In the figure, inside the thermal transfer recording apparatus 1, the boards of a digital processing section 2, an analog interface section 3, and an image memory section 4 are respectively attached. These substrates are inserted into the connector 43 and electrically connected to the main body of the thermal transfer recording apparatus 1, and can be attached or detached as needed. The analog interface section 3 also includes a video input connector 44.
is provided at a position where it can be connected to equipment external to the thermal transfer recording apparatus 1.

FIG. 5 is a block diagram showing the digital processing section 2 in FIG. 1 in more detail, and 7A is an address line, an IO
A, IOB is a signal line, IOC is a bus line; - {i No. L
10D is the refresh control line, IOE is R/
W (read/write) signal line, IOF is RAS line, I
OC is the CAS line, 1oH is the refresh line, IOI, I
OJ and IOK are delay circuits, 15A is a serial address generation circuit, 15B is a random address generation circuit,
L3 is a strophe signal line, L4 is a serial control line, and L is a random control line. Portions corresponding to those in FIG. 1 are given the same reference numerals.

In the same figure, the bidirectional data path switch 14 connects the data bus L. Connect or disconnect between 8. Signal lines 10A, 10B, bus busy signal line 1
0C. Refresh control line 10D, R/W
Signal line 10E, RASfI1 0 F, CAS line 10G
．． Refresh line 10H, delay circuit 101~IOK
is guarding the control bus 10. Also, a serial address generation circuit 15A and a random address generation circuit 15A.
B constitutes the address control circuit 15 in FIG. .

Now, the image processing switch 7 installed on the outside of the device
Assume that a command is input to the arithmetic controller 12 to perform image processing on the entire image as a result of an operation.

In this case, the arithmetic controller 2 issues a command to connect the bidirectional data path switch 14 to the bus connection line L2.
The bidirectional data path switch 14 connects the data bus 8 and the internal data bus L1. Further, the arithmetic controller 12 outputs an R/W signal specifying reading to the R/W signal line 10E, and sets the bidirectional data path switch l4 to the input direction. Further, the arithmetic controller 12 outputs bus and refresh signal switching signals to the bus busy signal line 10C and the refresh control IIOD, respectively, and sets the digital processing section 2 to read data from the image memory section 4 using the bus. do. When a signal is output to the bus bus line 10C and the refresh control line 10D, the RA
S line 10F, CAS line 10G, refresh line 10H
and address line 7A are connected to control bus 10 and address bus 9, respectively.

Here, from the arithmetic controller 12 to the strobe signal line L
, a strobe signal is output to the serial address generation circuit 1 which is configured by a counter.
5A, and the count value is output to the address signal line 7A as an address signal. This address signal is used to select the address of the image memory section 4 (FIG. 1) via the address bus switch I6 and the address bus 9.

Further, the strobe signal on the strobe signal line L3 is delayed by the delay circuit 1OI and output to the RAS line 10F, and the output signal of the delay circuit 101 is also delayed by the delay circuit 10J and output to the CAs line 10G. Furthermore, the output signal of the delay circuit 10J is
It is delayed by 0K and output to the refresh line 10H.

Therefore, signals whose timings are sequentially shifted are obtained on the RAS line 10F, the CAS line 10G, and the refresh line 10H.

At this time, the R/W signal on the R/W signal line 10E represents reading, and thereby the image memory section 4 (
from the address specified by the address signal from the address bus 9 in FIG.
One piece of data is read out onto the data path 8 at the timing of the AS signal and the CAS signal on the CAS line 10G.
Next, a refresh operation is performed on the address from which the data in the image memory section 4 has been read by a refresh signal supplied via the refresh line 10H.

When the arithmetic controller 12 outputs the next strobe signal to the strobe signal line L3, the serial address generation circuit 15A counts up this signal and generates the next address signal, and the above-mentioned data reading and refreshing in the image memory section 4 is performed. It is done. In this way, data is read from sequentially arranged addresses in the image memory section 4.

The above is the process from the image processing switch 7 to the calculation controller l2.
This is an operation of reading data from the image memory section 4 when there is a command to perform image processing over the entire image in the image memory section 4.

Next, the operation when there is a command from the image processing switch 7 to the arithmetic controller 12 to process some data of an image in the image memory section 4 will be described.

In this case, the arithmetic controller 12 uses the bus connection line L!
It outputs a signal to and controls the bidirectional data path switch l4 to connect the data paths L+ and 8. Further, the arithmetic controller 12 outputs a signal to the bus busy signal line 10C and the refresh control line 10D to connect the arithmetic controller 12 and the control bus 10.

Next, the arithmetic controller 12 sets predetermined address information in the random address generation circuit 15B via the random control signal line L, and this address signal is outputted to the address bus 9 via the address bus switch 16. As a result, an address corresponding to this address signal is selected in the image memory section 4. At this time, a stop signal is supplied from the arithmetic controller 12 to the serial address generation circuit 15A via the serial controller line L4, so that the serial address generation circuit 15A is not outputting an address signal.

Then, from the arithmetic controller 12, R/
The W signal is output to the R/W signal line 10E, and the data transmission direction of the bidirectional data bus switch 14 is the input direction from the data path 8 to the data bus L+. Further, as described above, a strobe signal is output from the arithmetic controller I2 to the strobe signal line L, and the RAS lines 10F and C
Signals with different timings are sequentially obtained on the AS line 10G and the refresh line 10H, whereby predetermined pixel data is read from the address specified by the address signal output from the random address generation circuit 15B in the image memory section 4. and is supplied to the arithmetic controller 12 via the data bus 8, bidirectional data path switch 14, and data bus L.

By operating the random address generation circuit 15B in this manner, image data at an arbitrary address in the image memory section 4 can be read out.

The image data read from the image memory section 4 as described above is subjected to various arithmetic operations as will be described later in the arithmetic controller 12. Next, the image data thus arithmetic processed is transferred to the image memory section 4. We will explain how to write.

When the arithmetic processing of the image data is completed, the arithmetic controllers 1 and 2 output an R/W signal indicating writing to the R/W signal line 10E, and switch the bidirectional data path switch l4 so that the data transmission direction is from the data bus L1. The output direction is set to be toward the data bus 8. As a result, the image memory section 4 enters the writing state. Then, the arithmetic controller 12 outputs the arithmetic-processed image data to the data bus L, and sends it out to the data bus 8 via the bidirectional data path switch 14. Next, a strobe signal is output to the strobe signal line L, and the RAS
Control signals are generated on control lines such as the line 10F and the CAS line 1OG, and image data is written into a predetermined position in the image memory section 4 in response to an address signal from the serial address generator 15A or the random address generation circuit 15B.

Next, a specific example of the image memory section 4 in FIG. 1 will be explained with reference to FIG. 6. In addition, in Figure 6, 4
B, 4G, 4R are memories respectively, 8B, 8G, 8R are data paths, 4x is X7'}'1, latch, 4Y is Y address latch, and the parts corresponding to those in Fig. 5 are given the same reference numerals. .

In FIG. 6, the image data handled here is color image data, and for this purpose, the image memory unit 4 includes a RED memory 4R for storing red component data, and a RED memory 4R for storing green component data. GREE for
N memory 4G, BL for storing data of blue color
A UE memory 4B is provided, and a RED memory 4R is connected to a RED data bus 8R in a data path 8.
Memory 4G is GREEN data path 8 in data bus 8
G, BLUE memory 4B is BLUE memory 4B in data lot 8
The UE data path 8B is connected to the UE data path 8B.

Further, the X address bus 9X of the address bus 9 is connected to the X address latch 4X, and the Y address path 9Y is connected to the Y address latch 4Y.
The line 10F is connected to the Y address latch 4Y, and the CAS line 10G is connected to the X address latch 4X. and,
An address signal consisting of an X address signal and a Y address signal is supplied through the address bus 9, and this X address signal is supplied through the X address bus 9X and latched into the X address latch 4X by the CAS signal supplied through the CAS line 10G. Similarly, the Y address signal is latched into the Y address latch 4Y by the RAS signal supplied through the RAS line 10F. As a result, in each of the memories 4R, 4G, and 4B, an address determined by the latched X address signal and Y address signal is selected.

Furthermore, the R/W signal line 10E of the control bus 10 is
/W signal is supplied to memories 4R, 4G, 4B, and this R
Depending on whether the /W signal indicates writing or reading, the memories 4R, 4G, and 4B are set to a writing state or a reading state.

FIG. 7 is a block diagram showing another embodiment of the thermal transfer recording apparatus according to the present invention, in which 45 is a digital image signal source;
46 is a digital data line, 47 is a strobe line, 48
1 is a busy signal line, 49 is a data latch, and 50 is a data switch. Portions corresponding to those in FIG.

Further, FIG. 8 shows details of the digital processing section 2 in FIG. 7. In the figure, L6 is a strobe signal line, 5
1 is an OR gate, and parts corresponding to FIGS. 5 and 7 are given the same reference numerals.

In this embodiment, digital image data from an external digital image signal source 45 is also processed by the digital processing section 2,
The image can be stored in the image memory section 4.

In FIGS. 7 and 8, the digital processing section 2 starts its operation in response to a command sent from a digital image signal source 45 outside the apparatus. That is, when command data for one character of the command content is sent to the digital data line 46, and then a signal indicating sending is sent to the Strope line 47, the data latch 49 operates and the data on the digital data line 46 is sent to the digital data line 46. is latched. On the other hand, the strobe line 47 is also connected to the arithmetic controller 12, and the arithmetic controller 12, which has received this sending signal, notifies the digital image signal source 45 via the busy signal line 48 that the decoding process is in progress. , makes sending the next data wait.

Then, the arithmetic controller 12 connects the data latch 49 to the data path L1 by the data switch 50,
The data latched in the data latch 49 is input via the data bus L. The data input to the arithmetic controller l2 is decoded, and then a busy signal is sent to the digital image signal source 45 to indicate that it is ready to receive the next command data. ,'i! Please let us know via 48. The method of transferring data character by character while exchanging signals with the digital image signal source 45 is called a handshake method. Through this handshake method, the arithmetic controller 12 receives a series of commands from the digital image signal source 45. After that, a predetermined operation is started.

When receiving a command to receive continuous image data for one screen from the digital image signal source 45 and write it into the image memory section 4, the arithmetic controller l2 sends a command to connect the bidirectional data path switch 14 to the bus connection line L2. The data bus 8 and the data path L+ are connected to each other. Further, an R/W signal specifying writing is output to the R/W signal line 10E, and the data path switch 14 is set in the output direction. Further, a bus/refresh switching signal is output to the bus busy signal line 10C and the refresh control 4910D, so that the digital processing section 2 can write data to the image memory section 4 using the bus. When a signal is output to the bus busy line 10C and refresh control line 10D, other control signal lines, RAS line 10F, CAS line 10G, refresh line 10H, and address line 7A are connected to the bus, respectively.

Here, the strobe signal supplied to the strobe signal line 47 is sent as a clock to the serial address generation circuit 15A via the OR gate 51. This serial address generation circuit 15A counts the input strobe signals and outputs the result as an address signal to the address bus 7A. This address signal is output to the address bus 9 via the address bus switch 16, and selects a predetermined address within the image memory section 4. Further, the signal on this strobe signal line L3 is transmitted to the delay circuit 10I.
The signal is sent to the RAS line 10F via the delay circuit 10J, to the CAS line 10G via the delay circuit 10K, and to the refresh line 10H via the delay circuit 10K, thereby outputting three types of signals with different timings.

At this time, the R/W signal output to the R/W signal line 10E indicates the writing state, and the image memory section 4
Then, one piece of data on the data path 8 is written to the address selected by the previous address signal in response to the input of the RAS signal and the CAS signal, and the refresh operation of the contents of that address is performed by the input of the subsequent refresh signal. will be carried out. When the next data is sent, the serial address generation circuit 15A similarly generates the next address, and the image data is written to the next address in the image memory section 4.

When the command received by the arithmetic controller 12 instructs partial processing of the data inside the image memory unit 4, the operation is as follows.

The arithmetic controller 12 first outputs a busy signal to the busy signal line 48 and stops inputting data from the outside. Next, the data switch 50 is turned off to cut off the data path with the outside. Next, a signal is output to the bus connection line L2 to connect the bidirectional data path switch l4, thereby connecting the data bus 8 and the data bus L1. Furthermore, bus busy & 110C and refresh control line 1
0D, and connects the control signal output from the arithmetic controller 12 and the control bus IO.

After that, from the arithmetic controller 12 to the random address generation circuit 1 via the random control line L,
Address information is set in 5B and output to address bus 7A. This set value is sent to the address bus 9 via the address bus switch 16, and selects a specific pixel in the image memory section 4. At this time, the serial address generation circuit 15A suspends its operation in response to a suspension signal output to the serial control line L4.

Then, from the arithmetic controller 12 to the R/W signal line 10E
An R/W signal indicating readout is output to the image memory section 4.
is set to read state. Further, the bidirectional data path switch 14 has an input direction for transmitting data from the data path 8 to the data bus L1. Further, a strobe signal is output from the arithmetic controller l2 to the strobe signal line L6, and this strobe signal is supplied to the delay circuit 101 through the OR gate 51, and as described above,
RAS line 10F, CAS line 10G, refresh line 10
Signals with different timings are obtained at H. As a result, pixel data at a predetermined address in the image memory section 4 is transferred to the arithmetic controller 1 and the roller l2 via the data bus 8 and L+.
is input to. The arithmetic controller l2 performs various arithmetic processing operations as described below. And R/
A signal indicating writing is output onto the W signal line 10E, setting the bidirectional data path switch 14 in the output direction, and putting the image memory section 4 into the writing state.

Then, the arithmetic controller 12 outputs the processed data to the data bus L+, then outputs a trigger signal to the trigger signal line L4, and outputs control signals to write control lines such as the RAS line 10F and the CAS line LOG to memory the image memory. The processed data is written into a predetermined position of the unit 4.

Next, the arithmetic controller 1 in FIGS. 1 and 7
The arithmetic processing of image data in step 2 will be explained.

(1) Correction processing for the ambient temperature inside the thermal transfer recording apparatus 1: FIG. 9 is an explanatory diagram of the temperature correction processing by comparing the detection result of the ambient temperature inside the thermal transfer recording apparatus 1 and the contents of image data. In other words, the ambient temperature inside the device obtained before recording starts and the heat capacity of the device itself. Based on the heat dissipation performance and the content of the image data used for recording, the temperature change around the thermal head 25 during recording can be predicted as shown in the graph 52 of FIG. 9(a). For this expected temperature change, the expected recording density is determined as shown in graph 53 in FIG. 9(b). In order to stably obtain a uniform density with respect to this expected recording density change, it is sufficient to apply correction to the image data at a rate as shown in the graph 54 of FIG. 9(C). In this way, the entire image is recorded with stable density.

(2) Tone correction processing: As explained previously with reference to FIGS. 1 and 7, image data previously input to the image memory unit 4 (for example
A digital signal (transmitted from an external analog image signal source 6 via the analog interface unit 3) is read out and recorded by the thermal transfer recording device 5. Ordinary analog signals (e.g. video signals) are subjected to gradation correction in advance to match the characteristics of the device being displayed (for example, γ correction is applied to suit the characteristics of a cathode ray tube, and (The output is the γ characteristic of the camera's image pickup tube.) If the thermal transfer recording device 5 records the gradation of linear characteristics with respect to the signal value, an image with tone characteristics different from the original image will be created. .

FIG. 10 shows examples of characteristics of various gradation corrections, and the characteristics shown by curves a to d are respectively input data (
For example, in the case of 8-bit data, it shows the correspondence between the values obtained as outputs for values indicating shading in the range from 0 to 255.

For example, when the value of the input data is 100, when the characteristic a is corrected, a value of 6o is obtained as the output. When the characteristic of this correction is curve C, the value of 170 is
When the characteristic is curve d, a value of 100 is obtained as the output. In this way, the correction included in the input analog signal can be returned to its original value.

Next, an actual algorithm for the above tone correction will be explained using FIG. 11.

As shown in FIG. 11(a), the original image is R. G. B.
The data size of each brane is, for example, 1024 x 1280 pixels. The structure of the image is
In FIG. 11(a), each pixel is represented by the R-brane 55, for example, with the X axis in the horizontal direction and the Y axis in the vertical direction.
In the case of R, RX, Y are displayed.

11) shows the correction data string of each plane, and the correction data string corresponding to the R-brane 55R is the correction data string 5.
6R, and tone correction can be performed by referring to this correction data string 56R. That is, R plane 55R
For example, if the value of a certain pixel RX, Y is 100, the 100th value in the correction data string 56R, in this case the value 60, is determined. For all pixels in the R-brane 55R, correction values corresponding to possible values of each pixel are set in the correction data string, and desired continuous correction can be performed. Others, G-brane 55G, B
Similarly, correction data string 560 is applied to plane 55B.
．． 56B, the desired continuous correction can be made.

When the corrected data is compiled, new data such as the R plane 57R, G plane 51G, and B plane 57B shown in Figure 1 (C) can be obtained as image data with the same dimensions as the original image. . By recording an image using the corrected image data 57R, 57G, and 57B, desired gradation characteristics can be reproduced.

Next, the gradation correction processing operation in FIGS. 1 and 7 will be explained.

Image data input from the outside via the digital processing section 2 or the analog interface section 3 is stored in the image memory section 4 in advance.

The reference data used for gradation correction is stored in a memory 13 provided in the arithmetic controller 12 in the digital processing section 2.
It is contained in

As described above, when the arithmetic controller 12 starts the gradation correction operation, it first turns off the data switch 50, sets the input of the data path switch l4, and stores the pixel data to be read out on the address bus 7. An address signal representing the address of the image memory section 4 is output, and then a read control signal is sent to the control bus 10.

Then, the image data at the address specified by the address signal on the address bus 7 is read out from the image memory unit 4, and the data is transferred to the data bus 8 and the bidirectional data path switch I4.
and data bus L, to the arithmetic controller 12. Inside the arithmetic controller 12, reference data corresponding to the supplied image data is read from the memory 13. Next, the R/W signal is set to indicate writing, and the corrected image data is output from the arithmetic controller 12 to the data bus 8, and is further sent to the image memory section 4 via the data bus 8. ．． In this state, the write strobe signal line L. When a strobe signal is output to (FIGS. 5 and 8), a write signal is sent to the image memory section 4 via the control bus 10, and image data is written to the predetermined address, resulting in one image data. The conversion process ends.

In this way, the addresses in the image memory section 4 are sequentially changed and the correction process for l image data is repeated, thereby performing tone correction for one screen's worth of image data.

(3) Fixed pattern unevenness correction processing: FIG. 12 is an explanatory diagram showing fixed pattern correction processing.

That is, the resistance unevenness of each heating element 30 (FIG. 2) of the thermal head 25 and the individual characteristics of the device itself are determined by
As shown in FIG. 2(a), uneven shading 58 may occur in one recorded line. To deal with such fixed pattern unevenness, one column of image data is corrected in advance, and the image data corresponding to areas that are recorded lightly is corrected to become darker, and then the correction process is performed. To perform uniform and stable recording by complementing the actual unevenness occurrence situation.

That is, for thick image data, a data table 59 (Fig. 12 (
b)), refer to this data table 59, use the result multiplied by this coefficient as a correction value for recording, and make the corrected recording characteristic 60 (Fig. 12 (C)) almost flat. I can have a child.

(4) Restoration processing from compressed images to recordable image data: In general, relatively simple devices that handle images
Some devices do not have an image memory for three colors, but instead compress and handle images in an image memory for one image.

Such compressed image data can be restored to a necessary image using a restoration data string. This will be explained below using the example shown in FIG.

In FIG. 13(a), original image data 61 is created by compressing an image for three colors, and one pixel in the image data, for example, D)l+Y, has a certain value of R, G,
One of the three color value combinations of B is shown. Here, if the value of DX,v is, for example, 100, then the value contained in the 100th position of the restored data string 62 shown in FIG. 13(b), for example, the value of 55 of R, A value of Rx. v r Gx. v + B, l. v
As shown in FIG. 13(C), the R plane 63
These are obtained as pixels at predetermined positions inside each of the R and G planes 63G and B planes 63B. By performing this process for one screen, it is possible to obtain data for three branes necessary for recording.

The operations shown in FIGS. 1 and 7 for the above restoration process will be explained.

Image data input from the outside via the digital processing section 2 or the analog interface section 3 is stored in the image memory section 4 in advance.

Reference data used for data expansion is stored in a memory 13 provided in the arithmetic controller 12 for three colors. As described above, when the arithmetic controller l2 starts the decompression and restoration operation, first, the data switch 50 is
is disconnected, the input setting of the bidirectional data path switch 14 is performed, an address signal representing the address of the image data to be read out in the image memory section 4 is outputted to the address bus 7, and an R signal representing readout is then outputted to the control bus 10. /W signal is sent.

Then, the image data at the address specified by the address signal on the address bus 7 is read out from the image memory section 4, and the image data on the data bus 8. The signal is supplied to the arithmetic controller 12 via the bidirectional data path switch 14 and the data bus L1. In the arithmetic controller l2, reference data corresponding to the supplied image data is read out from the memory 13 for three colors.

Next, the R/W signal is set to indicate writing, and the arithmetic controller 12 outputs the restored image data to the data bus L1 for one color (for example, R), and then sends the image data via the data bus 8. It is sent to the memory section 4. In this state, the write strobe signal line L. When a strobe signal is output to (FIG. 1, FIG. 2, and FIG. 7), a write signal is sent to a predetermined position specified by the address signal of the image memory section 4 via the control bus 10, and the image data is written into one image. The expansion and restoration of one color of pixel data is completed. Similarly, for the remaining image data, the image data is written to a predetermined position in the image memory section 4 by specifying the address in the image memory section 4 corresponding to each color using the address signal output to the address bus 9. be able to.

Furthermore, the correction of one screen's worth of image data is also performed by sequentially incrementing the contents of the address signals, as in the case of the above-mentioned gradation correction.

(5) Pixel aspect ratio conversion process: The aspect ratio of the recording screen of the thermal transfer recording device and the aspect ratio of the image data screen may be different, and if the data is used as is for recording, the aspect ratio of the entire image may be different. It becomes a thing. This often occurs, for example, when a video signal is A/D converted and digitized. In other words, A/D conversion is often performed at a sampling frequency that is a certain integer multiple of the color modulation frequency included in the video signal, and this is done in order to prevent moiré (periodic unevenness) in the sampling frequency. However, regardless of the aspect ratio of the image, the aspect ratio of the sampled image (for example, l:1.
25) is often different from the aspect ratio (for example, 1:1) of the recording pixels of the thermal transfer recording device.

In such a case, the image data needs to be used for recording after being subjected to a conversion process as shown in FIG.

That is, as shown in FIG. 14(a), the input l
Column image data string an + an + I + an
When performing aspect ratio expansion conversion (for example, ■. 25 times expansion) on original image data such as +2 +,
The conversion is performed by weighting the position of each pixel so that the number matches the number of pixels after conversion (Figure 14 (b)), and the output data shown in Figure 14 (C) is obtained. .

Furthermore, when performing reduction processing on the original image data, one input image data string a,,a, shown in FIG. 15(a) is used. l + an+Z + 1・---
Even when performing aspect ratio reduction conversion (for example, reduction to 0.66 times) on the original image data such as −～−−・−, each pixel is The output data shown in FIG. 15(b) is obtained by applying weighting related to position.

In this way, it is possible to record even image data having different aspect ratios.

FIG. 16 shows an image after recording when recording is performed with different aspect ratios. That is, if image data having a horizontally long aspect ratio (FIG. 16(a)) is used as is for recording, a vertically long image as shown in FIG. 16(b) will be recorded. On the other hand, if vertically long image data is used as is for recording, a horizontally long image as shown in FIG. 16(a) will be recorded.

Here, the operation in FIGS. 1 and 7 for performing such aspect ratio conversion processing will be described.

Image data input from the outside via the digital processing section 2 or the analog interface section 3 is stored in the image memory section 4 in advance.

Further, conversion constants used for aspect ratio conversion are stored in a memory 13 provided in the arithmetic controller 12.

As described above, when the arithmetic controller 12 starts the aspect ratio conversion operation, it first turns off the data switch 50 and
The input setting of the bidirectional data path switch l4 is performed, and an address signal designating the address of the image data to be read out in the image memory section 4 is outputted to the address bus 9. Subsequently, a read strobe signal is sent to the control bus 10. .

As a result, the image data at the address specified by the address signal on the address bus 9 is read from the image memory section 4 and supplied to the arithmetic controller 12 via the data bus 8 and L1. Then, the above reading operation is repeated for the number of pixels required for one conversion process.

The arithmetic controller 12 reads out necessary constants from the memory 13 by arithmetic processing of the supplied image data. Expansion or reduction processing is performed based on this constant.

When this arithmetic processing is completed, the arithmetic controller 1-roller 12 next sets the R/W signal to indicate writing, and the arithmetic controller 12 sends the converted image data to the data bus, The data is sent to the memory section 4. When a strobe signal is output to the write slave/rope signal line L3 in this state, the write signal is supplied to the image memory section 4 via the control bus lO, and one image is placed at a predetermined position specified by the address signal. Data is written. Then, by performing this write operation for the number of times obtained in the previous one calculation process, one data aspect ratio conversion process is completed.

(6) Image data addition process: FIG. 17 is an explanatory diagram showing the image data addition process of two images 64 and 65.

In the figure, the image data at the j-th horizontal position and the i-th vertical position of the image 64 is now D i + j, and the image data at the same position of the image 65 is DD. ,j (however, i
= 1. 2,----1・,1024. j=1
．． 2, ... 1280), and the image 66 obtained by adding these images (34.65) is obtained by adding together the image data of the corresponding positions of each image 64.65, that is, Di,...
+DD, , 2 image data is assumed to be the combined precept image.

FIG. 18 shows a combined image 66 when the actual image 64 and a different image 65 are added together.

That is, the added image 66 is the original images 64, 6
Both images can be seen transparently without being blocked by either one of the images.

As described above, in any of the above embodiments, the image data stored in the image memory section can be changed. It is also clear that, in the embodiment shown in FIG. 1, it is also possible to add further digital data inputs to the common bus.

FIG. 19 is a block diagram showing a digital processing section of still another embodiment of the thermal transfer recording apparatus according to the present invention,
7 is an adder circuit, 6th is a reference memory, 69 is a selector switch, 70 is a latch circuit, 71 is a select signal line, 72
is a latch signal line, 73 is a reference memory control line, L
II+L12 is a data path, and parts corresponding to those in FIG. 8 are given the same reference numerals.

In this embodiment, a dedicated circuit performs the image data arithmetic operation that was performed by the arithmetic controller l2 in the embodiments shown in FIGS. 1 and 7.

In FIG. 19, first, the bidirectional data path switch l
4 operates the bus connection line L2, thereby connecting the data bus 8 and the internal data path L. connect with. Data bus L. is connected to the reference memory 68, and sends a series of signals to the image memory section 4 such as the R/W signal line 10E, address bus 9, RAS signal line 10F, and CAS signal line 10G through the bus as described above. predetermined image data is sent to the image memory section 4 via the data bus 8. The image data read onto data bus 8 is supplied to reference memory 68 via bidirectional data path switch l4 and data bus Ll+. At this time, predetermined reference data is supplied from the arithmetic controller 12 to the reference memory 68 via the reference memory controller j/roll line 73,
The reference memory 68 converts the supplied image data based on the reference data and supplies it to the selector switch 69.

The selector switch 69 selects the input signal according to the selection signal supplied from the arithmetic controller 12 via the selection signal line 71 and supplies it to the latch circuit 70 . The arithmetic controller 12 outputs a temporary holding command to the latch circuit 70 via the latch signal line 72.

Subsequently, reading of the image memory section 4 is stopped, and the R/W
An R/W signal indicating writing is output to the signal line lOE.

Then, a signal designating the connection direction as an output is outputted to the bidirectional data bus switch l4 via the bus connection line L2. The converted image data output from the latch circuit 70 is transferred to the common data bus L11 and the bidirectional data path switch l4.
Via de? The image data is sent to the tabus 8 and finally written into the image memory section 4.

In this way, lookup data table conversion processing can be performed using a dedicated circuit.

In addition, in FIG. 19, image data sent from the outside via the digital data line 46 is also transferred to the data latch 49.
, data switch 50 to the data bus L1■. Then, the data bus L is selected by the selector switch 69 and latched by the latch circuit 70.
,,, it can also be sent to the data bus 8 via the bidirectional data path switch l4 and written into the image memory section 4. Furthermore, the adder circuit 67 adds data from the image memory section 4 to the data bus L. Image data supplied to the data switch 5
Addition processing can also be performed with image data starting from 0, and the result of this processing can also be selected by the selector switch 69 and sent to the image memory section 4 in the same manner as described above.

In this way, in this embodiment, the image conversion processing performed in the embodiments shown in FIGS. 1 and 7 can be realized using a dedicated circuit instead of using a microcomputer such as an arithmetic controller.

FIG. 20 is a block diagram showing the overall structure of still another embodiment of the thermal transfer recording device according to the present invention, in which 74 is an adder, 75 to 77 are multipliers, 78 is a black predetermined memory,
Parts corresponding to those in FIG. 1 are given the same reference numerals.

This example uses UCR processing (Under Color
R cmova I). Generally, analog image signals such as video signals are constructed based on the principle of additive color mixture based on the three primary colors of light (red, green, and blue). On the other hand, in the case of a device such as a thermal transfer recording device that records images on recording paper, it is constructed based on the principle of subtractive color mixing of these reflected colors (cyan, magenta, and yellow). In principle, the three primary colors of light of the input signal may be inverted as they are and used as the three reflected colors. However, in addition to the original color, the ink used for recording contains other colors (turbidity), so if you use it as is and combine the three colors, it will not be pure black. has a different color.

Therefore, there is a method in which a certain amount of black included in this image is removed by calculation in advance, and only the black portion is recorded using pure black ink during printing, and this is UCR processing. Second
FIG. 21 shows details of the digital processing section 4 in FIG. In addition, in FIG. 21, 7 is an addition processing command line,
80 is a black data line, 81 is a red data line, 82 is a green data line, and 83 is a blue data line, and parts corresponding to those in FIG. 20 are given the same reference numerals.

The image data supplied from the image memory section 4 via the data bus 8 is passed through the bidirectional data path switch 14, and the red data is sent via the red data line 81, the green data is sent via the green data line 82, and the blue data is sent via the red data line 81. are supplied to the multipliers 75, 76, and 77 via the blue data line 83, and the red data is multiplied by the coefficient a, the green data is multiplied by the coefficient b, and the blue data is multiplied by the coefficient C. Supplied.

In the adder 74, the image data multiplied by the respective coefficients of the three colors are added together according to the commands supplied from the arithmetic controller 12 via seven addition processing command lines, and as a result, the black component of the image is extracted. Ru.

Then, this black data is black data 80. Via data path 8, it is supplied to black component memory 78 (FIG. 20) and written therein.

Here, FIG. 22 shows ink paper when such four-color image data is used.

In the figure, the ink paper used for recording is a thin film coated with ink, and the three primary colors of reflection, yellow, magenta, and cyan, are painted in fixed widths.
Furthermore, in addition to these three primary colors, a pure black (Bk) part is provided, and by using this black part, UC
Black image data created by R processing is recorded.

FIG. 23 is a block diagram showing the overall structure of still another embodiment of the thermal transfer recording apparatus according to the present invention, and parts corresponding to FIGS. 7 and 20 are given the same reference numerals.

This embodiment differs from the embodiment shown in FIG. 20 in that the portions that perform arithmetic processing are an arithmetic controller 1 and a roller 12.

In FIG. 23, image data read out from the image memory section 4 is transferred to the digital processing section 2 via the image data bus 8.
sent to.

In the digital processing section 2, the arithmetic controller 12 and its attached memory 13 extract a black component from image data for three colors. The extracted data is sent to the black precept memory 78 via the data bus 8 and written therein. The black component data written in the black component memory 78 is read out again and sent to the thermal transfer recording section 5, where recording is performed using pure black ink.

In this way, it is also possible to realize the structure using a microcomputer.

FIG. 24 is a block diagram showing the overall configuration of still another embodiment of the thermal transfer recording apparatus according to the present invention, in which 84 is a recording-only data path, and parts corresponding to those in FIG. 23 are given the same reference numerals. There is.

In the figure, image data read from the image memory section 4 is sent to the digital processing section 2 via the data bus 8, and after being subjected to conversion processing by the arithmetic controller 12,
The data is sent to the thermal transfer recording section 5 via the recording-only data bus 84. That is, in response to the recording signal from the thermal transfer recording unit 5, the address switch 28 transfers I'll to the address bus 9.
According to the address signal sent next, the image memory section 4
The internal image data is sent to the image data bus 8.

This image data is subjected to conversion processing in the digital processing section 2, and is sequentially sent to the recording-only data bus 84 to be used for recording.

As described above, in this embodiment, the arithmetic processing of the image data is performed in parallel with the progress of recording, so the image data inside the image memory section 4 may be subjected to other processing while leaving it as it was. can.

FIG. 25 is a block diagram showing the overall structure of still another embodiment of the thermal transfer recording apparatus according to the present invention, in which 85 is an image input device, 86 is a data direction signal line, and the parts corresponding to FIG. are given the same symbol.

This embodiment differs from the embodiment shown in FIG.
In FIG. 5, the device connected to the digital processing section 2 is an image input device 85, which is connected to the digital processing section 2.
The point is that it is configured to operate by sending out operation commands from.

In FIG. 25, a command signal sent from the arithmetic controller I/roller 12 to the internal data lot L of the digital processing section 2 is sent to the digital data line 46 via the data switch 50 and data latch 49, and is sent to the image input device 85. sent to. At this time, human output direction information of the data is supplied from the arithmetic controller l-roller l2 to the image input device 85 via the data direction signal line 84. When the image input device 85 starts operating in accordance with the command from the arithmetic controller 12, the signal sent to the data direction signal line 86 is switched to the input direction, and the image data sent from the image input device 85 via the digital data line 46 is is received and written into the image memory section 4.

In this way, the image data sent from the image input device 85 can be recorded by the thermal transfer recording section 5.

The embodiments of the present invention have been described above, but in these embodiments, instead of the structure in which each part is connected by a common bus as described above, a structure in which the parts are connected by using a dedicated line may also be used. The good news is obvious.

Also, a calculation controller. It is clear that the means for specifying the content of image data modification processing can be either manually using a switch on an external device or by sending data through a digital signal line.

Further, in each of the above embodiments, the image memory section has been described as being compatible with the image size to be recorded, but it is preferable that the image memory section is larger than the image size (having a large storage capacity).

〔Effect of the invention〕

As explained above, according to the present invention, processing operations such as gradation correction and color correction of image data can be performed only within the thermal transfer recording device without using an external computer or other device. It is possible to shorten the time and make the entire system more compact.

In addition, it is possible to selectively apply image gradation correction to analog signals such as video signals that are input into the thermal transfer recording device without passing through a digital signal system such as a computer, compared to conventional technology. As a result, it is possible to record color images with intermediate tones with significantly superior image quality.

Furthermore, it is possible to predict environmental temperature changes caused by the environmental conditions inside the thermal transfer recording device and the shading information of the image itself, and to correct planar image data two-dimensionally based on the prediction results. Stable halftone recording can be performed regardless of the density information of the image.

Furthermore, compensation values are stored in advance for the non-uniform recording characteristics of the fixed pattern of the recording part of the thermal transfer recording device, and the image data to be recorded is corrected in accordance with this compensation value. It can also deal with the inconvenience of non-uniform recording.

If the image input device connected to the heat transfer recording device is configured to send command information from the thermal transfer recording device side, it can be directly connected without intervening a control means such as a computer. As a new form of use, a device with a wide range of applications can be realized.

In addition, it is possible to simultaneously read image data for three colors per pixel and extract the turbidity of the ink color used for recording based on the image data for three colors. Since it is possible to perform recording in four colors including black based on the signal, it is possible to realize an apparatus that reproduces colors faithfully.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the overall structure of an embodiment of a thermal transfer recording device according to the present invention, FIG. 2 is a perspective view showing a specific example of the thermal transfer recording section in FIG. 1, and FIG. 3 is a diagram similar to that shown in FIG. 4 is a perspective view showing a part of the inside of FIG. 3, FIG. 5 is a block diagram showing details of the digital processing section in FIG. 1, and FIG. 6 is a perspective view of the thermal transfer recording device shown in FIG. FIG. 7 is a block diagram showing the details of the image memory unit in FIG. 1, FIG. 7 is a block diagram showing the overall structure of another embodiment of the thermal transfer recording apparatus according to the present invention, and FIG. A block diagram showing details, and FIG. 9 is an explanatory diagram of expected temperature change characteristics inside the device during recording based on image data contents in the embodiment shown in FIGS. 1 and 7, and correction characteristics based on these expected characteristics. , FIG. 10 is an explanatory diagram of correction characteristics of gradation correction,
Fig. I1 is an explanatory diagram showing the data flow of the gradation correction shown in Fig. 10, Fig. I2 is an explanatory diagram of the correction of uneven recording density possessed by the thermal transfer recording device itself, and Fig. 13 is an explanatory diagram showing the data flow of the gradation correction shown in Fig. 10. 14 is an explanatory diagram of the expansion process of the pixel aspect ratio. FIG. 15 is an explanatory diagram of the pixel aspect ratio reduction process. 15
Figure 17 is an explanatory diagram of the image before the processing shown in the figure. Figure 17 is an explanatory diagram of the process of combining the image stored in the image memory section with a new image sent from the outside. Figure 18 is a supplement to Figure 17. An explanatory diagram, FIG. 19 is a block diagram showing a digital processing section of still another embodiment of the thermal transfer recording device according to the present invention, and FIG. 20 shows the overall structure of still another embodiment of the thermal transfer recording device according to the present invention. 21 is a block diagram showing the details of the digital processing section in FIG. 20, FIG. 22 is an explanatory diagram showing the structure of the ink paper used in the embodiment shown in FIG. 20, and FIGS. FIG. 25 is a block diagram showing the overall structure of still another embodiment of the thermal transfer recording apparatus according to the present invention. 1-----1 thermal transfer recording device, 2--------digital processing section, 3--------analog interface section, 4-----image memory section, 5-------- Thermal transfer recording unit, 8 ---- data path, 9 ------- address bus, 1 0 - - 1 - 1 control bus, 1 2 - 111 - arithmetic controller, 14 - . 1-1-1 bidirectional data path switch, 16-.1~---address switch. 3rd wA 4B 〇 1 Figure 12 19 thermal heads set vertically◆◆ 62 63B Figure 14 (C) On On +3 (7I1+/ 4 on+l+Qω2 2 3QnNa2→Kuko n'sants 4th/5th wJ l6l!l (a) (b) O No. 77m Fig. 18 Fig. 22

Claims (1)

[Claims] 1. A means for inputting an image information signal indicating the shading of a series of images sent from an external device and recording shading information according to the image information signal; In a thermal transfer recording apparatus having both an input means for an image information signal and an image information storage means having a storage capacity of more than one screen worth of image information to be recorded, means for reading image information stored in the image information storage means. a storage means in which conversion information is stored; a means for converting the read image information based on the conversion information stored in the storage means; and the image information subjected to the conversion process. and a means for writing the image information into the image information storage means again, the image information conversion processing means is operated based on a command selectively sent from the external device, and the image information storage means A thermal transfer recording device characterized by converting the image information written therein and recording a grayscale image according to the converted image information. 2. In claim 1, the image information converting means has means for inputting an image information signal from an external device, and inputs the image information from the external device and stores it in the image information storage means. Featured thermal transfer recording device. 3. A thermal transfer recording apparatus according to claim 2, wherein said means for inputting image information signals from an external device also has means for outputting information signals to the external device. 4. In claim 1, means for predicting a change in internal atmospheric temperature during recording for one screen based on internal atmospheric temperature and contents of the image information signal stored in the image information storage means. and operating the image information converting means based on the prediction result of the atmospheric temperature change to perform correction processing on the image information signal, and storing the corrected image information signal in the image information storage means. . A thermal transfer recording device characterized in that an image is recorded with uniform characteristics even under temperature changes in accordance with the content of the image information signal. 5. In claim 1, the recording means itself has means for storing recording non-uniformity characteristic information, the image information converting means is operated based on the recording non-uniformity characteristic information, and the image information signal is corrected. A thermal transfer recording apparatus characterized in that the corrected image information signal is stored in the image information storage means, the non-uniform recording characteristics are compensated for, and an image is recorded with uniform characteristics. 6. In claim 1, the image information signal sent from the image information storage means is sent to the thermal transfer recording means via the image information converting means, and during the image recording operation, the image information signal is converted by the image information converting means. A thermal transfer recording device that records images based on information.