JPH03187635A - Pulse width information transmission controller - Google Patents

Pulse width information transmission controller

Info

Publication number
JPH03187635A
JPH03187635A JP1328801A JP32880189A JPH03187635A JP H03187635 A JPH03187635 A JP H03187635A JP 1328801 A JP1328801 A JP 1328801A JP 32880189 A JP32880189 A JP 32880189A JP H03187635 A JPH03187635 A JP H03187635A
Authority
JP
Japan
Prior art keywords
signal
pulse
pulse width
serial
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1328801A
Other languages
Japanese (ja)
Inventor
Susumu Saito
晋 齋藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1328801A priority Critical patent/JPH03187635A/en
Publication of JPH03187635A publication Critical patent/JPH03187635A/en
Pending legal-status Critical Current

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  • Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To uniformly control each equipment by converting an analog signal into a digital signal for control, transmitting the converted signal to each equipment and generating a pulse with the same means at each equipment. CONSTITUTION:A pulse width control DC voltage generating section 1 generates an analog signal (DC voltage) 6 proportional to a pulse width required finally, converts the signal into a serial digital signal 8 through an A/D conversion section 2 and a parallel/serial conversion section 3 and the resulting signal is sent to a data bus 9 from a serial signal transmission section 5. A reception section 11 at a reception side regenerates a serial digital signal 16, a serial/ parallel conversion section 12 regenerates a parallel digital signal 17 and inputs the result to a pulse generating section 13 to generate a pulse 18 proportional to the original control DC voltage. Thus, the pulse signal having a pulse width proportional to a transmission side DC voltage is obtained. Then lots of instruments are uniformly remote-controlled.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はパルス幅情報伝送制御装置に関し、特に発光ダ
イオード(LED)やLED表示器の輝度を数1000
倍の広範囲でしかも正確にさらに、多数の機器を均一に
遠隔制御する場合などに必要なパルス幅情報を伝送する
パルス幅情報伝送制御装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a pulse width information transmission control device, and in particular, the present invention relates to a pulse width information transmission control device, and in particular, to control the brightness of a light emitting diode (LED) or an LED display device by several thousand.
The present invention relates to a pulse width information transmission control device that transmits pulse width information necessary for uniformly remote controlling a large number of devices over a twice as wide range and more accurately.

〔従来の技術〕[Conventional technology]

従来は、このよう数1000倍にもわたる広範囲にしか
も正確に伝送し、多数の機器を均一に輝度を遠隔制御す
る技術はなかった。そのため、各機器の表示器等の輝度
を広範囲に制御する場合は、各機器個別に制御回路を持
ち、各機器個別に制御する必要があった。
Conventionally, there was no technology that could remotely control the brightness of a large number of devices uniformly by accurately transmitting light over a wide range several thousand times as large as this. Therefore, in order to control the brightness of the display of each device over a wide range, it is necessary to have a control circuit for each device and control each device individually.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

このため機器の操作が複雑化し、操作者の仕事を増やし
てしまうという欠点がある。
This has the drawback of complicating the operation of the device and increasing the workload of the operator.

〔課題を解決するための手段〕[Means to solve the problem]

本発明においては、1ケ所から輝度調整用の制御信号を
発生し、直列ディジタル信号に変換し、ARINC−4
29タイプのデータ・バス等の伝送手段を用いて多数の
機器に伝送し、各機器においては、受信した直列ディジ
タル信号を並列信号に変換し、この並列信号を同じビッ
ト数の各機器と同じ周波数のクロックを用いたディジタ
ル・カウンタのプリセット信号として入力し、ディジタ
ル・カウンタの全ビットの出力を1周期毎にANDをと
って出力することにより、発生側のパルス幅制御信号に
よって各機器とも同じ幅で、同じくり返しのパルスを得
る。
In the present invention, a control signal for brightness adjustment is generated from one location, converted to a serial digital signal,
Each device converts the received serial digital signal into a parallel signal, and converts this parallel signal to the same frequency as each device with the same number of bits. By inputting it as a preset signal of a digital counter using the clock of Then, you will get the same repeat pulse.

〔実施例〕〔Example〕

第1図は、本発明の一実施例を示すものである。 FIG. 1 shows an embodiment of the present invention.

パルス幅制御用DC電圧発生部1は、最終的に必要にな
ってくるパルス幅に比例するアナログ信号(DC電圧)
6を発生し、アナログ/ディジタル変換部2で並列ディ
ジタル信号7に変換する。さらにパラレル/シリアル変
換部で直列ディジタル信号8に変換する。これらの信号
変換にはクロック発生部4のクロック信号を用いる。変
換された信号は、シリアル信号送信部5からデータ・バ
ス9に送出する。
The pulse width control DC voltage generator 1 generates an analog signal (DC voltage) proportional to the pulse width that will ultimately be required.
6 is generated and converted into a parallel digital signal 7 by the analog/digital converter 2. Further, it is converted into a serial digital signal 8 by a parallel/serial converter. A clock signal from the clock generator 4 is used for these signal conversions. The converted signal is sent from the serial signal transmitter 5 to the data bus 9.

受信側においては、データ・バス9からの信号を受信部
11で受け、直列ディジタル信号16を再生し、さらに
シリアル/パラレルR換$12で並列ディジタル信号1
7を再生する。この信号の再生においては、送信側とほ
ぼ同じ周波数のクロック発生部14のクロックを用いる
。再生した並列ディジタル信号17をパルス発生部13
に入力し、元の制御用DC電圧に比例したパルス18を
生成する。
On the receiving side, a receiving section 11 receives the signal from the data bus 9, reproduces the serial digital signal 16, and further reproduces the parallel digital signal 1 through the serial/parallel R conversion $12.
Play 7. In reproducing this signal, a clock from the clock generator 14 having approximately the same frequency as that on the transmitting side is used. The reproduced parallel digital signal 17 is sent to the pulse generator 13
to generate a pulse 18 proportional to the original control DC voltage.

パルス発生部13は第3図及び第4図に示すように、適
当なりロックで動作するディジタル・カウンタと、ディ
ジタル・カウンタの出力と並列ディジタル信号を比較し
、その差分を出力するように構成することによ°す、送
信側のDC電圧に比例したパルス幅をもつパルス信号を
得ることができる。
As shown in FIGS. 3 and 4, the pulse generator 13 is configured to compare the output of the digital counter with a parallel digital signal and output the difference between a digital counter that operates in a suitable lock manner and a parallel digital signal. In some cases, it is possible to obtain a pulse signal with a pulse width proportional to the DC voltage on the transmitting side.

第2図は、パルス幅制御用DC電圧発生部とディジタル
・スイッチによって制御信号を発生する部分を組合せて
制御信号をつくり出す他の実施例を示したものである。
FIG. 2 shows another embodiment in which a control signal is generated by combining a DC voltage generator for pulse width control and a control signal generator using a digital switch.

第2図において、ディジタル・スイッチ10によりP/
S変換部3に供給されるデータ信号のうちMSB群を作
り出し、A/D変換部2からのデータ信号はLSB群を
作り出す。
In FIG. 2, the digital switch 10 switches P/
An MSB group is created from the data signal supplied to the S converter 3, and an LSB group is created from the data signal from the A/D converter 2.

従って、DCC電圧発生部は微調機能を分担することに
なる。また第2図において、DC電圧発生部をなくしデ
ィジタル・スイッチのみで制御信号を発生するようにし
ても、本発明の目的は達成されることは明白である。
Therefore, the DCC voltage generator will share the fine adjustment function. Furthermore, in FIG. 2, it is clear that the object of the present invention can be achieved even if the DC voltage generating section is eliminated and the control signal is generated only by a digital switch.

〔発明の効果〕〔Effect of the invention〕

以上説明したように制御用のアナログ信号をディジタル
信号に変換し、各機器に伝送し、各機器において同じ手
段でパルスを生成することにより、バラツキの少ないパ
ルスをつくることができ、各機器を均一に制御すること
ができる。
As explained above, by converting analog signals for control into digital signals, transmitting them to each device, and generating pulses in each device using the same means, it is possible to create pulses with less variation, and each device can be uniformly distributed. can be controlled.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す図で、第2図はパルス
幅信号発生部の一部をアナログ信号とディジタル信号を
併用する場合の第二の実施例を示す図である。第3図及
び第4図は第1図のパルス発生部13の構成例を示す図
である。 ■・・・・・・パルス幅制御用DC電圧発生部、2・・
・・・・アナログ/ディジタル変換部、3・・・・・・
パラレル/シリアル変換部、4・・・・・・クロック発
生部、12・・・・・・シリアル/ディジタル変換部、
13・・・・・・パルス発生部。
FIG. 1 is a diagram showing one embodiment of the present invention, and FIG. 2 is a diagram showing a second embodiment in which a part of the pulse width signal generating section uses both an analog signal and a digital signal. 3 and 4 are diagrams showing an example of the configuration of the pulse generator 13 shown in FIG. 1. ■・・・DC voltage generator for pulse width control, 2...
...Analog/digital conversion section, 3...
Parallel/serial converter, 4... Clock generator, 12... Serial/digital converter,
13...Pulse generator.

Claims (2)

【特許請求の範囲】[Claims] (1)DC電圧等のアナログ信号をディジタル信号に変
換する手段と、前記ディジタル信号の並列信号を直列信
号に変換し、データ・バスに送出手段と、データ・バス
経由で伝送された信号を受信し、直列信号を並列信号に
変換する手段と、前記並列信号の値を受けて送信側のD
C電圧等のアナログ信号に比例したパルス幅のパルスを
生成するパルス発生手段とを具備することを特徴とする
パルス幅情報伝送制御装置。
(1) means for converting an analog signal such as a DC voltage into a digital signal, means for converting the parallel signal of the digital signal into a serial signal and sending it to a data bus, and receiving the signal transmitted via the data bus. means for converting a serial signal into a parallel signal; and a means for converting a serial signal into a parallel signal;
1. A pulse width information transmission control device comprising: pulse generation means for generating a pulse with a pulse width proportional to an analog signal such as a C voltage.
(2)前記パルス発生手段が前記並列信号のビット数と
同数の出力ビット数をもつカウンタと、前記カウンタ出
力と前記並列信号との対応するビット信号同志を比較す
る比較手段とを具備することを特徴とする特許請求の範
囲第1項のパルス幅情報伝送制御装置。
(2) The pulse generation means includes a counter having the same number of output bits as the number of bits of the parallel signal, and comparison means for comparing corresponding bit signals of the counter output and the parallel signal. A pulse width information transmission control device according to claim 1.
JP1328801A 1989-12-18 1989-12-18 Pulse width information transmission controller Pending JPH03187635A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1328801A JPH03187635A (en) 1989-12-18 1989-12-18 Pulse width information transmission controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1328801A JPH03187635A (en) 1989-12-18 1989-12-18 Pulse width information transmission controller

Publications (1)

Publication Number Publication Date
JPH03187635A true JPH03187635A (en) 1991-08-15

Family

ID=18214259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1328801A Pending JPH03187635A (en) 1989-12-18 1989-12-18 Pulse width information transmission controller

Country Status (1)

Country Link
JP (1) JPH03187635A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05268172A (en) * 1992-03-19 1993-10-15 Tokyo Electron Ind Co Ltd Transmitter and receiver for proportional control signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05268172A (en) * 1992-03-19 1993-10-15 Tokyo Electron Ind Co Ltd Transmitter and receiver for proportional control signal

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