JPH03185521A - Data processor - Google Patents

Abstract

PURPOSE:To reduce the overhead of area decision in the preprocessing of clipping of image data to be executed by a processor and to improve the through- put of a system by preparing an instruction for deciding whether a certain input data is included in a prescribed range or not. CONSTITUTION:An instruction for deciding the area of a point and setting up the decided result in a status register by a 2-bit code is prepared and the instruction is executed by a microprogram sequence stored in the processor. Thereby, the area decision of a point is executed by one instruction. Consequently, overhead due to the transfer of an instruction between respective processors can be reduced, the overhead of area decision in the preprocessing of clipping of image data to be executed by the processor can be reduced and the through- put of the system can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] This invention relates to data processing technology and technology that is particularly effective when applied to image data calculations such as clipping processing by a processor. Concerning technology that is effective for use in processors.

[Prior Art] Conventionally, in a graphic display system, it is possible to enlarge a portion surrounded by a dashed line W of a figure A shown in FIG. If you want to display the image by rotating it, the processor first transforms the coordinates of the image data, then determines whether the point of interest is within the display area (window) W, and then performs two steps. A region is determined to determine whether or not a line segment connecting points passes through a window, and if it does, a clipping process is performed to cut out the portion that passes through the window before displaying it on the screen.

[Problems to be Solved by the Invention] In conventional graphic display systems, the above image data processing is performed using a floating point arithmetic coprocessor (
The FPU (hereinafter referred to as FPU) executes a program that is a combination of multiple instructions. Therefore, each command requires MP
The time required to exchange commands between the U (microprocessor) and the FPU becomes overhead, reducing data processing speed. In particular, since the amount of data handled in region determination in pre-processing for clipping is extremely large, the total overhead time becomes quite high, resulting in a problem in that the throughput of the system decreases.

Regarding the graphic processing system consisting of MPU and FPU, see Nikkei Electronics 1988.
December 12, 2015 (no, 462), pp. 207-21
It is described on page 7.

An object of the present invention is to reduce the overhead of area determination in pre-processing of image data clipping by a processor, and to improve system throughput.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for Solving the Problems] Representative inventions disclosed in this application will be summarized as follows.

An instruction for determining the area of a point and setting the result in a 2-bit code in a status register is prepared, and this instruction is implemented by a microprogram sequence within the processor.

Furthermore, the data type (number, zero, non-number, and infinity) of the operand to be subjected to the area determination is coded, a logical operation is performed on the code, and the result of the operation is reflected in the area determination result.

[Operation] According to the above means, since point area determination is executed by the l instruction, the overhead associated with the transfer of instructions between processors can be reduced.

In addition, the data type of the operand that is subject to area determination (number, zero, non-number, and infinity) is coded, a logical operation is performed on that code, and the operation result is reflected in the area determination result, so it is possible to compare the size Judgment results can be quickly obtained in cases where this is not possible.

[Embodiment] FIG. 1 shows an overall block diagram of an embodiment of an FPU to which the present invention is applied.

The FPU of this embodiment includes a bus control unit BCU, a format conversion unit FCU, a floating point calculation unit ECU, and a vibe line management unit PMU. The bus control unit BCU is a block that performs bus control by generating signals necessary for interfacing with the outside, and controls the CPU according to instructions.
It consists of a protocol control logic that executes a handshake procedure (protocol) with the format converter, and a data aligner that matches the input/output data of the format converter with the arrangement of data on the external memory.

The format conversion unit FCU is the FPU when inputting data.
data formats (3 types of integers, 3 types of floating point numbers)
(seed) to a data format used internally, and when outputting data, converts the internal data format to a specified external data format.

The floating-point arithmetic unit ECU is a unit that executes floating-point arithmetic operations, and consists of a floating-point data register, a mantissa arithmetic operation circuit, a multiplier, an exponent arithmetic operation circuit, a constant ROM used for elementary function operations, and a microprogram ROM. be done. In addition, IE is installed in the floating point calculation unit ECU.
It also includes tag logic operation circuits used to handle unique data types such as +/-infinity and +/-1 not-a-number specified in the EE standard. .

The vibeline management unit PMU monitors the operating status of the bus control unit BCU, format conversion unit FCU, and floating point calculation unit ECU and the presence or absence of access from the CPU for each machine cycle, and performs optimal scheduling. Responsible for control.

In addition, the vibe line management unit PMU includes three instruction registers IR3 to IR for managing operation history information such as instruction codes and instruction addresses in preparation for processing when an exception occurs.

The FPU of this embodiment is provided with an instruction (hereinafter referred to as FLIMIT) that judges a point area and generates a judgment code using one instruction passed from the CPU, and the instruction is sent to the microprocessor in the calculation unit ECU. It is designed to be executed by a microprogram stored in a program ROM.

However, in order to perform region determination in a three-dimensional coordinate system using this FLIMIT command, it is necessary to use this command to compare the upper limit value and the lower limit value for each of the X, Y, and Z systems.

In addition, this instruction performs data type calculations to obtain judgment results faster than usual, but the data type DTr in this case is used to perform calculations on the data type, such as executing a coordinate transformation instruction that is performed before area judgment. By analyzing the bit pattern of the data at the time, it is formed for each operand data,
For example, it may be expressed as a 2-bit code as shown in Table 1 below. Alternatively, when data is passed from the CPU, a code indicating the data type may be added by the format conversion unit FCU.

In other words, the code roOJ indicates that the operand data is a number that can be operated on, the code "Ol" indicates that the operand data is zero, and the code rlOJ indicates that the operand data is a number that can be operated on.
11'' indicates that it is not a number.

Next, an example of a microprogram for the above area determination instruction FLIMIT written in a language called PASCAL will be shown.

PROGRAM FLIMIT
.

L limit 5 sources); egin i :=1; DR(0):=O; LIMIT (U limit, 5 sources
) ;i:=2; LIMIT (Source, Ll imit
) ;i:=3; LIMIT (Ul imit, Ll imi
t) ;if DR=1 then go
to EXCResult:=[R(1),R(2)
] ;end.

Note that in the above microprogram, EXC refers to undefined operation exception handling to notify the CPU that the operation is impossible, and R(1) and R(2) are operations indicated by 2-bit codes as shown in Table 2. The contents of the first and second bits set in the status register as a result are shown. Further, LIMIT is a microinstruction indicating transition to the following subroutine.

Procedure Lim1t (i, 1nput
l, 1nput2) ;egln DT r : =DT 1. add, DT 2 ; if
DTr=OOthenbeginD R(i):
= D R(i −1)4u1. O; if 1npu
tl=(input2 then R(i) : =l
;if 1nput2=(input2 then
R(i): =0; end; else DR(i): =DR(i-1), mu
l, 1 ; end ; Next, the procedure of area determination processing according to the above microprogram will be explained.

When the execution of the FLIMIT instruction starts, first, the variable i
is set to 1 and the variable DR(0) is set to O, and then jumps to the subroutine LIMIT which compares the input data with the upper limit value.

In the subroutine LIMIT, first input data (for example,
The data type DTI of the coordinates) and the data type DT2 of the upper limit value (Xmax) are supplied to the arithmetic logic unit to perform a predetermined logical operation add.For example, for the upper bit of the 2-bit code, Possible operations include logical sum and logical product for lower bits. Table 3 shows a truth table for the above add operation regarding two data types. The result is the same as defined in Table 1 and is “00
” is a number, “Ol” is zero, rl OJ is infinity, “
11J indicates that it is a non-number.

Table 3 Data type add operation truth table When the data type becomes roOJ as a result of this add operation in the subroutine, variables DR(i-1) and rQJ
The input data is compared with the upper limit value after calculating the cumulative value. When i=1, DR(i-1) is DR(0), and since R(0) was previously set to 0 in the main routine, the DR(1) to be found is O.

As a result of comparing the two data, if the input data is larger than the upper limit value, R(1) is set to 1, and if it is smaller, R(1) is set to 1.
) is O.

On the other hand, if the data type is other than roOJ as a result of the add operation in the subroutine, the variable DR(i-1)
J-Ill Tono cumulative value, set as DR(i),
Since DR(0)=O, DR(1)=1.

After executing the subroutine in this way, the main routine
Go back to step 1, set the variable i to 2, then enter the input data (X coordinate)
A jump is made to a subroutine that compares the value and the lower limit value (Xmin). Then, this subroutine performs an add operation on the data type, and if the result is rooJ, then DR(i
-1) and "0" is calculated and set as DR(i). Here, since i=2, if DR(1)=1 in the previous subroutine execution (i=1), DR(2) is "l", and if DR(1)=O D R(2) is rQ
It becomes J.

Furthermore, if the input data is smaller than the lower limit value, R(2> is set to rlJ, and if it is larger, R(2) is set to "0".

If the result of the add operation is other than roOJ, DR(i)
: =DR(i-1), a+u1. D by l
R(2) is set to l, and the subroutine ends.

After that, return to the main routine again and first set the variable i to "
3”, then set the upper limit (X wax ) and lower limit (X
Executes a subroutine that compares min). This is to determine whether the lower limit value and upper limit value are set oppositely. If the lower limit and upper limit are set oppositely, i=l and i
When the subroutine with =2 is executed, the data type calculation result becomes roOJ, and both R(1) and R(2) become "1".
”. If either the input data, the upper limit value, or the lower limit value is infinite or a non-number, or if the upper limit value and the lower limit value are both zero, DR(3) is set to "1" at the end, as described above. After executing the subroutine, return to the main routine and press D.
It is determined whether the value of R is "l" or not, and if it is rlJ, the process moves to indefinite operation exception handling EXC, for example, R(1).

Processing is performed to set R(2) to rl and IJ.

When the value of DR is "0", the subroutine LIMIT is executed and the obtained R(1) and R(2) are rl.

1". When the value of DR is "0", R obtained by executing the subroutine LIMIT
(1), sets the values of R(2) to predetermined bits of the status register and ends.

The region determination process using the above FLIMIT command is related to one coordinate (X system); for two-dimensional coordinates, a similar command is executed for the Y coordinate, and for three-dimensional coordinates, a similar command is executed for the X coordinate. , the determination results for each coordinate system are set in the status register as a 2-bit code. The code set in the status register is read by the CPU and used for line area determination.

Figure 2 shows the results of area determination of points in a two-dimensional coordinate system (
(code) and the upper and lower limit values. If the target point is within the window, the 4-bit code will be all zeros, and if it is outside the window, one of the 4-bit codes will be ``1''.

Therefore, in the CPU, if the judgment results for two points are all zero, it is judged that the line segment connecting the two points is within the window, and if the judgment code is ANDed and the result is all zero, then part of the line segment is It is determined whether clipping is necessary by performing processing such as finding the midpoint of the line segment, assuming that there is a possibility that the line segment may pass through the window. On the other hand, when the logical product of the area determination codes regarding the two points is other than all zeros, it can be determined that the line segment does not pass through the window, and the clipping process is not performed.

As explained above, in the above embodiment, an instruction is prepared for determining the area of a point and setting the result in a 2-bit code in the status register, and this instruction is realized by a microprogram sequence within the processor. , since point region determination is executed with one instruction, it is possible to reduce the overhead associated with passing instructions between processors, reduce the overhead of region determination in preprocessing of image data clipping by the processor, and improve system throughput. can be improved.

In addition, the data type of the operand that is subject to area determination (number, zero, non-number, and infinity) is coded, a logical operation is performed on that code, and the operation result is reflected in the area determination result, so it is possible to compare the size This has the effect of increasing the throughput of the system by making it possible to quickly obtain judgment results in cases where this is not possible.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, the logical operations on the data types of two data in the subroutine in this embodiment are not limited to those shown in Table 3, but may be performed by performing a logical OR on the upper and lower parts of the 2-bit code representing the data type. You can also do this.

In the above description, the invention made by the present inventor was mainly applied to a floating-point arithmetic coprocessor, which is the background field of application, but the invention is not limited thereto, and is applicable to microprocessors and other applications. It can be used in general data processing devices.

[Effects of the Invention] The effects obtained by typical inventions disclosed in this application are briefly explained below.

That is, in a graphic display system, the overhead of area determination in pre-processing of image data clipping by a processor can be reduced, and the throughput of the system can be improved.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing an example of a floating point arithmetic coprocessor to which the present invention is applied, Fig. 2 is an explanatory diagram showing the relationship between the code indicating the area determination result and the boundary value, and Fig. 3 is the clipping process. It is an explanatory diagram showing an outline. BCU: Bus control unit, FCU: Format conversion unit, ECU: Floating point calculation unit, PMU:
...Pipeline management section, IR...Instruction register.

Claims (1)

[Scope of Claims] 1. A data processing device characterized by comprising an instruction for determining whether certain input data is included in a predetermined range. 2. The data processing device according to claim 1, wherein said instructions are executed by a microprogram sequence. 3. Distinguish the data types of the input data and the values to be compared into at least four types: numbers, zeros, infinities, and non-numbers and represent them in codes, perform logical operations on the codes, and based on the results, perform the above operations. 3. The data processing apparatus according to claim 2, wherein the data processing apparatus is adapted to change the flow of processing according to a microprogram sequence.