JPH03182095A - Flashing device - Google Patents

Abstract

PURPOSE:To prevent the inter-end voltage of a main capacitor from sinking instantly by charging the main capacitor and a capacitor for the gate drive voltage via respective paths. CONSTITUTION:In a voltage booster circuit 100, secondary winding of the output coil of a boost force oscillating transformer 12 is divided into two sections 12c, 12d, wherein the coil section 12c charges a main capacitor 24 for light emission of a flashing tube 28 while the other section 12d charges a capacitor 15 for the gate driving voltage which becomes a gate drive voltage source for a large current switching element 30 such as an insulate gate bipolar transistor(IGBT), etc., for light emission control. These capacitors 24, 15 are charged via respective paths, which prevents instant drop of the inter-end voltage of the main capacitor likely to be generated when main capacitor solely is provided.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is directed to IGBT (Insulated Gate).
Bipolar Transis-tor)
This invention relates to a gate drive circuit for an electronic flash device using a large current switching element such as the above.

[Conventional technology 1] Conventionally, in an electronic flash device using a large current switching element such as an IGBT, the gate drive voltage of the switching element is high and it is difficult to secure a voltage supply source, so the gate drive voltage is divided by resistors across the main capacitor. A method was used to obtain the .

[Problem that the invention is trying to solve] However,
This method has the disadvantage that the charge accumulated in the main capacitor is discharged via the voltage dividing resistor, and the voltage across the main capacitor immediately drops.

[Means for solving problems]

The present invention has been made in view of the above-mentioned problems, and it distributes the gate drive voltage of the switching element on the secondary side of the oscillation transformer of the booster circuit to two voltage output terminals, one for charging the main capacitor and one for the gate. It is an object of the present invention to provide a flash device which is used for supplying driving voltage and which avoids the above-mentioned disadvantages by supplying the gate driving voltage of the switching element without using the charge of the main capacitor.

[Example 1 The present invention will be explained in detail below based on illustrated embodiments.

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

In the figure, 1 is a power battery, 2 is a power switch, and 3 is a constant voltage source Vref+, Vrefz.

A constant voltage of Vcc is generated, 4 is a capacitor, 5 is a resistor, and 4.5 generates a reset pulse when the power is turned on. 36 is a known one-chip microcomputer with I10, which controls light emission and dimming. 6 is a resistor, which is connected to the S terminal of a one-chip microcomputer (hereinafter abbreviated as μ-Com). Also, capacitor 4. resistance 5
The signal line output from the pulse circuit is connected to the Re5et terminal of μ-Com.

7 is a diode, which is connected to the resistor 6. 9 is resistance, 1
0 is an npn transistor (hereinafter abbreviated as npn-Tr), and the cathode of a diode 7 is connected to the base of this npn-Tr. Further, a resistor 9 is connected between the base and emitter of the transistor 10.

8 is a diode whose cursor is npn-Tri.

11 is a pnp transistor (hereinafter abbreviated as pnp-Tr) connected to the emitter of pnp-Trll.
The collector of npn-TrlO is connected to the base of .

The emitter of pnp-Trll is connected to switch 2. 12 is a transformer, and the primary winding 12a is pnp-Trl.
l collectors are connected. The feedback winding 12b has a resistor of 40
Connect to ground (GND) through the terminal. Also, feedback winding 1
The other terminal of 2b is connected to the emitter of npn-TrlO. The secondary winding is divided into 12c and 12d, with 12c used for high voltage output and 12d used for IGBT drive voltage output. A portion surrounded by a dotted line 100 including each of the above elements constitutes a booster circuit. 13 connected to 12c is a rectifying diode, and 14 connected to 12d is a rectifying diode. A capacitor 15 is connected to the cathode of the diode 14 and GND. 16 is a resistor connected to the cathode of the diode 14. 17 is a constant voltage diode whose cathode is connected to the resistor 16.

The anode of the constant voltage diode 17 is connected to GND. A capacitor 18 is connected in parallel with the constant voltage diode 17, and the resistor 16 and capacitor 18 are connected to 1) np-Tr 1
9 emitters are connected. 20 is an npn-Tr, and the base of pnp-Tri 9 is connected to the collector. np
A resistor 34 is connected to the base of the n-Tr 20, and the npn
-The emitter of Tr20 is connected to GND and pnp-Tr
Controls i9 ON-OFF. 38 is an npn-Tr connected to the base of the switching element 30;
When the switching element 38 is on, the switching element 30 is turned off. 39 is a base resistor of the n◆pn-Tr 38, and 21.22 is a resistor, which constitutes a voltage dividing resistor for detecting the output voltage of the rectifying diode 13. 23 is a diode, and 24 is a main capacitor. 23 is a diode that prevents the leakage current of 24.

The anode of diode 23 is connected to the cathode of diode 13, and the cathode of diode 23 is connected to main capacitor 24.

25 is a resistor connected to the cathode of the diode 23.

26 is a capacitor, 27 is a trigger transformer, and the capacitor 26 is connected to the primary side.

28 is a flash discharge tube which emits light by a trigger transformer 27. 29 is a diode, 30 is a switching element (for example, IGBT
Bipolar Transis-tor)
The cathode of a diode 29, a resistor 25, and a capacitor 26 are connected to the collector of a conductivity modulated MO3FET such as .

The emitter of the switching element 30 is connected to GND. Base is npn-Tr38 collector, pnp-Tr
Connected to the i9 collector.

31.32 is a comparator. Comparator 31 is a comparator for charging voltage detection, and the divided voltage value of resistor 21.22 is inputted to the positive terminal, and the reference voltage V r corresponding to the charging voltage is input.
e f + is connected to the negative terminal from the constant voltage circuit 3. If the input is below the charging voltage, a low level (hereinafter abbreviated as LL) is output, and if it is above the charging voltage, a high level (hereinafter abbreviated as H'L) is output.

32 is a comparator for detecting the regulator voltage, which is used to control the voltage across the main capacitor 24 at a constant level by the booster circuit 100, and the divided voltage value of the resistor 21.22 is connected to the negative terminal and corresponds to the regulator voltage. A reference voltage V r e f 2 is connected from the constant voltage circuit 3 to the positive terminal. If the input is below the regulator voltage, HL is output, and if it is above the regulator voltage, LL is output.

33 is a known latch circuit, in which the S terminal is a set terminal, the R terminal is a reset terminal, and the Q terminal is an output terminal. The S terminal of the latch circuit 33 is connected to the output of the comparator 31, and when the charging completion level is reached, the output of the Q terminal is set to HL. The R terminal of the latch circuit 33 is connected to a reset pulse circuit including a capacitor 4 and a resistor 5.

35 is an X contact of a camera (not shown). X is μmCo
The S0 terminal of μmCom 36 connected to the X terminal of m36 is connected to the output of the comparator 32, the S1 terminal is connected to the output Q terminal of the latch circuit, and the S terminal is connected to the npn-Tr 20 through the resistor 34. Further, the S terminal is connected to the anode of a diode 7 through a resistor 6.

Reference numeral 37 denotes a light control circuit which outputs a signal when the amount of light becomes appropriate so that a subject (not shown) is properly exposed when the light is emitted, and is connected to the S4 terminal of μmCom 36. μmCom
The S terminal 36 is a terminal for inputting/outputting information from a camera or a lens (not shown).

S6 is a terminal that outputs a reset signal, and ss6, which is connected to the reset terminal of the latch circuit 33, is connected to n via a resistor 39.
Switching element 3 connected to the base of pn-Tr 38
This is a signal terminal for completely turning off the gate of 0.

Next, the operation will be explained.

FIG. 2 shows a flowchart regarding oscillation and charging, and FIG. 3 shows a flowchart of light emission operation. First, the oscillation and charging operations will be explained.

When the power switch 2 is turned on, the constant voltage source 3 is turned on by the power supply 1.
operates and constant voltage Vcc, Vref+V r e f 2
occurs. This turns on the power to μmCom 36 and the latch circuit.

Further, when VCC is turned on, a reset pulse is generated by the capacitor 4 and the resistor 5, and the μmCom 36 and the latch circuit are reset and initialized.

First, since the oscillation operation is not performed at first, the resistors 21 and 22 for detecting the voltage of the main capacitor 24 and the divided voltage value have not reached the charging completion level, so the comparator 3
The output of 1 becomes LL, and the output Q of the latch circuit 33 remains LL.

Further, the output of the comparator 32 becomes HL. Therefore μmC
In step 1 of om36, it is detected that the S terminal is LL, and in step 2, it is determined that the So terminal is HL, and the μ-Com36 outputs S.

Let the terminal be HL. As for the S, terminal signal, a current flows through the npn-Trio base via the resistor 6 and the diode 7, and turns on, which turns on the pnp-Trll, causing current to flow through the primary winding 12a of the oscillation transformer 12, and the secondary side Excite voltage to . At this time, a voltage is also excited in the feedback winding 12b, and n
pn-Tri.

raises the emitter voltage. For this reason, npn-Tr
io is turned off and pnp-Trll is turned off.

By repeating the above operation, oscillation occurs and high voltage is generated on the secondary side.

Note that the secondary side output is applied to coils 12c and 12d, 12c is a secondary winding for high voltage and for charging the main capacitor 24, and 12d is a switching element (IGBT etc.)
This is the secondary winding for the drive voltage.

The high voltage output from the secondary winding 12c of the oscillation transformer is rectified by the diode 13 and charged to the main capacitor 24 via the diode 23 for preventing leakage current of the main capacitor 24. The capacitor 26 is also charged via the capacitor 26. The voltage across this main capacitor 24 is set by the resistor 2
1.22, when the voltage reaches a fully charged level (hereinafter referred to as fully charged level) that allows light emission, that is, when it becomes larger than the reference voltage V r e f r corresponding to the fully charged level, the output of the comparator 31 becomes HL. Therefore, the output Q terminal of the latch circuit 33 becomes HL and is latched. Then, the S input of μmCom 36 becomes HL, which is detected in step 1, and the process proceeds to step 4, where the light emission permission state, that is, the X-on permission state, allows the light emission operation to be interrupted.

The oscillation operation is repeated until the voltage of the main capacitor 24 is fully charged, that is, reaches the regulator voltage, and the reference voltage V r corresponding to the regulator voltage of the comparator 32 is
When e f z or more, the output of the comparator 32 becomes LL, the S0 human power of μmCom 36 becomes LL,
Proceed to step 5 and set the S3 output to LL, and the booster circuit 10
The oscillation operation of 0 stops. When the oscillation stops, the resistor 21.
Since the divided voltage of 22 decreases, the above-described oscillation operation is repeated again.

During the above oscillation operation, the secondary winding 12 of the oscillation transformer 12
The output from d is rectified through a diode 14, charged into a capacitor 15, and then connected to a resistor 16 and a constant voltage diode 17.
A necessary gate voltage for the switching element 30 is set by. Capacitor 18 is a capacitor for voltage stabilization, and n
The gate voltage is controlled by pn-Tr 20% pnp-Tr 38.

Next, the light emitting operation will be explained.

When it is in the fully charged state, X-on is permitted in step 4 in Fig. 2, and in this state, μmCom36 closes the X contact 35.
In response to turning on, the flow shown in FIG. 3 is executed. First, in step 1, the S4 terminal is set to HL and the operation of the dimming circuit 37 is started. Further, the S terminal of μmCom 36 becomes HL, and the latch 33 is reset. The S2 terminal of μmCom 36 becomes HL, and a current flows through the resistor 34 to the base of the npn-Tr 20, turning it on. This allows pnp-Tr
Since the base current of transistor 19 is drawn, pnp-Tr 19 is turned on and a voltage is generated at the gate of switching element 30 . (At this time, the S6 terminal is LL.) This turns on the switching element 30, the charge of the trigger capacitor 26 flows to the transformer 27, a pulse is generated, a large pulse voltage is generated on the secondary side of the trigger transformer 27, and a flash is generated. The discharge tube 28 emits light.

When the subject reaches an appropriate amount of light from the dimming circuit, a light emission stop signal is generated and the S4 terminal of μmCom 36 is set to LL. If this is detected in step 12, step 1
In step 3, set the S6 terminal of μmCom36 to HL and connect the resistor 39.
The npn-Tr 38 is turned on via. This cuts off the gate voltage of the switching element 30 and turns it off. Alsoμ
The S2 terminal of mCom 36 is set to LL, and the npn-Tr 20 is turned off through the resistor 34, and the pnp-Tr 19 is turned off. In the above operation, light emission is stopped by turning off the switching element 30. Further, the S terminal of the μ-Com 36 becomes LL when the light emission stops, causing the latch circuit 33 to release the reset.

FIG. 4 is a circuit diagram showing another embodiment of the present invention, in which the same components as in the embodiment of FIG. 1 are given the same symbols.

In FIG. 4, resistors 41 and 42 are voltage dividing resistors for detecting the voltage of the capacitor 15. 43 is a capacitor, 44
is a diode with a resistor 41 connected to its anode and a capacitor 15 connected to its cathode.

45 is a comparator for detecting the voltage of the capacitor 15, and the reference voltage outputted from the Vrefs terminal of the constant voltage circuit 3 is connected to the negative terminal of the comparator 41, and when the voltage exceeds the reference voltage, HL is output.

46 is a latch circuit which, like the comparator 31, latches the signal and outputs Q when the output of the comparator 45 becomes HL. Q is connected to the S7 terminal of μmCom 36, and the reset terminal is connected to the S terminal of μmCom 36, the reset circuit capacitor 4, and the resistor 5.

The resistors 41 and 42, the capacitor 43, and the diode 44 form a voltage detection circuit 101 for the capacitor 15. The So terminal of μmCom 36 is connected to a circuit within the camera lens (not shown), and camera information is input thereto.

47 is a display circuit that displays information such as charging completion status, and 48 is a battery check circuit that motors the power supply voltage. The display circuit 47 is connected to the So terminal of μmCom36, and the battery check circuit 48 is connected to the μmCom36.
Connected to the S9 terminal of the

Next, the operation will be explained.

FIG. 5 shows a flowchart regarding oscillation and charging.

When the power switch 2 is turned on, the constant voltage source 3 is operated by the power source 1, and the constant voltage Vcc, VrefV r e f z
, V r e f s occurs. This turns on the power to each circuit. Also, when Vce rises, a reset pulse is generated by capacitor 4 and resistor 5 μ-Com3
6 and the latch circuit 32.46'c is set and initialized.

First of all, since the oscillation operation is not performed, the voltage division value of the resistor 2122 for detecting the voltage of the main capacitor 24 has not reached the charging completion level, so the output of the comparator 31 becomes LL, and the output of the latch circuit 33 becomes Q. remains at LL.

Similarly, the output of the comparator 45 becomes LL, and the output Q of the latch circuit 46 remains LL. Comparator 32
The output of μmCom36 becomes HL until it reaches the voltage of V r e f z, so in step 3 via step 1.2 and step 3' described later, the output S3 terminal of μmCom36 becomes HL.
becomes. The S3 terminal signal causes current to flow to the base of npn-Trlo via resistor 6 and diode 7.
o is turned on, thereby turning on pnp-Trll, current flows through the primary winding 12a of the oscillation transformer 12, and a voltage is excited on the secondary side.

At this time, a voltage is also excited in the feedback winding 12b, and the npn-T
Raise the emitter voltage of rio.

Therefore, npn-Trio is turned off and pnp-Trll is turned off.

This is repeated to cause oscillation and generate high voltage on the secondary side. In addition, the secondary side is divided into 12c and 126,
12c is a secondary winding for high voltage and for charging the main capacitor 24, and 12d is a secondary winding for driving voltage of a switching element (IGBT etc.).

The high voltage output from the secondary winding 12c of the oscillation transformer is rectified by the diode 13, and the main capacitor 24 is charged. Further, the capacitor 26 is also charged via the resistor 25. The voltage across this main capacitor 24 is set by the resistor 21.2.
2 detects the voltage, and when it reaches a full level that allows light emission, that is, when it becomes larger than the reference voltage Vref corresponding to the full level, the output of the comparator 31 becomes HL, and the output Q terminal of the latch circuit 33 becomes HL, and the latch It takes. Now, proceed from step 1 to step 4. In step 4, when the divided voltage value by the resistor 41.42 is less than V r e f 3 voltage corresponding to the full charge level of the capacitor 15, in step 56 the S2 terminal is set to HL, which is the LL%S6 terminal, and light emission is prohibited. . If the voltage is equal to or higher than the V r e f s voltage and the battery is fully charged, the process proceeds to step 7, where light emission is permitted after X is turned on, and the light emission operation can be interrupted. At this time, the display circuit 47 displays a complete indication from the S8 terminal of the μmCom 36. The voltage of the main capacitor 24 is fully charged, that is, the reference voltage V corresponding to the regulator voltage
When r e f 2 or more, the output of the comparator 32 becomes LL, and in step 8, the S3 terminal of μmCom 36 becomes LL, and the oscillation operation of the booster circuit 100 is stopped.

As the oscillation stops, the divided voltage of the resistors 21 and 22 decreases, so the oscillation operation is repeated.

It should be noted that when the oscillation operation is repeated, the power supply voltage drops because the current from the power supply is suddenly drawn. A battery check circuit 48 is provided to prevent malfunction of the constant voltage power supply due to power drop, and when the voltage of the power supply l becomes below a certain voltage, the circuit 48 outputs HL, and the HL is sent to the S9 terminal of μmCom36.
Send output signal. This HL is detected in step 3', and in step 3', output from the S terminal is prohibited.

As a result, when the booster circuit 100 stops oscillating and the power supply voltage is restored, the output of the battery check circuit 48 becomes LL, and the inhibition of the S terminal output of the μmCom 36 is stopped in steps 3' and 3. Charging is performed by repeating oscillation in this way.

Next is the light emitting operation, which is the same as the embodiment shown in FIG. 1, so its explanation will be omitted.

FIG. 6 is a circuit diagram showing another embodiment of the present invention, in which the same components as in the embodiment of FIG. 4 are given the same symbols.

In FIG. 6, 201 is a pnp-Tr whose emitter is connected to the capacitor 15. 202 is an npn-Tr, and the collector of the npn-Tr 202 is connected to the base of the pnp-Tr 201, and the emitter of the npn-Tr 202 is connected to GND. 203 is a resistor npn-
It is the base resistance of Tr202 and S+ of μmCom36.

connected to the terminal. The Sho terminal is an output terminal that becomes HL when the voltage of the capacitor 15 is detected.

204 and 205 are resistors that measure the voltage of the capacitor 15 when the pnp-Tr 201 is on, and the voltage dividing point thereof is connected to the positive terminal of the comparator 45.

The output of the comparator 45 is connected to the Sl+ terminal of μmCom 36, and if the capacitor 15 is fully charged, it receives the HL signal.

The oscillation flow of the embodiment in FIG. 6 is almost the same as the flow in FIG. 5, and step 4 in FIG. 5 is set to SII=HL.
Furthermore, before executing step 4, terminal S,. HL for a certain period of time from
is controlled using a flow with an additional output step.

The light emission operation flow is almost the same as the flow shown in FIG. 3, but before executing step 11 in FIG. From HL
is output to detect the charge level of the capacitor 15, and output the terminal Sll as the result of the charge level detection.
When is LL, set terminal S3 to HL, wait until terminal S becomes HL, and when terminal S becomes HL, Step 1
It is controlled to advance to 1.

[Effects] As described above, in the flash device according to the present invention, the gate drive voltage of the large current switching element is obtained through a separate route from the main capacitor charging system, so unlike the conventional device, the main capacitor charging system is not required. This can prevent inconveniences such as voltage drop.

In the embodiment, IGB is used as the large current switching element.
Although T is shown, it goes without saying that other elements may be used as long as they are conductive while a driving voltage is applied to the control pole.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing one embodiment of the flash device according to the present invention, FIGS. 2 and 3 are explanatory diagrams showing the control flow of the embodiment of FIG. FIG. 5 is an explanatory diagram showing the control flow of the embodiment shown in FIG. 4, and FIG. 6 is a circuit diagram showing another embodiment of the present invention. 12...Oscillation transformer 15...Gate drive voltage capacitor 24...Main capacitor 30...Switching element 36...Microcomputer-

Claims (2)

[Claims] (1) In an internal light device that has a flash discharge tube that generates internal light using the charge from the main capacitor, and controls the light emission using a large current switching element that is switched on and off by turning on and off the gate voltage, the output of the transformer that constitutes the booster circuit A flash device characterized in that an output end of a coil is divided, a main capacitor is charged with a voltage from a first output end, and a gate voltage of the switching element is obtained with a voltage from a second output end. (2) A gate voltage supply capacitor charged with the voltage from the second output terminal is provided, and the gate voltage of the switching element is supplied with the charging voltage of the capacitor. Flash device.