JPH03177940A - Analyzing device for program contents - Google Patents

Abstract

PURPOSE:To prevent such an inconvenient case where an analysis route that could not exist as an actual execution route is analyzed by selecting one of plural execution routes of a program and tracing back each execution route. CONSTITUTION:A branch condition analysis part 13, a store contents analysis part 14, and a complete branch condition analysis part 15 perform each prescribed analysis processing. Then the data obtained from each analysis processing are stored in a branch condition file storage part 16 including a route data storage means and a position data storage means, an execution contents file storage part 17, and a complete branch condition file storage part 18 respectively. In a trace-back state, the route data and the branch data on each instruction are read out of a route data storage means and a branch data storage means. Then one of plural execution routes of a program is sequentially selected and each execution route is traced back in response to the same route data and based on the branch route prescribed by the branch data. Thus it is possible to prevent such an inconvenient case where an analysis route that could not exist as an actual execution route is analyzed.

Description

[Detailed Description of the Invention] Overview The work of comparing the execution contents of a program written in assembler language with the basic specifications of the program has conventionally been performed by manually determining the output list of the program in assembler language. It was being held. This requires a huge amount of effort and is prone to errors. In the present invention, the basic input/output state of such a program depends on load and store instructions, and the flow of operation is based on branch instructions. This focuses on the fact that it is determined by the branch state. This analysis device stores data that identifies an analysis path related to the branch state for each instruction of the program to be analyzed, and data regarding the placement positions of branch source and branch destination instructions when processing branches. I made it. Based on such data, the program to be analyzed is read backwards from the branch instruction or store instruction along an appropriate analysis path, and the execution contents and branch conditions are obtained in the form of logical expressions for each analysis path.

INDUSTRIAL APPLICATION FIELD The present invention relates to an apparatus for analyzing the contents of a program used to operate a microprocessor or the like.

2. Description of the Related Art Assembler language is used to write programs as a language closest to the machine language that is actually read by microprocessors. Unlike high-level languages, this assembler language does not have a one-to-one correspondence with each machine language instruction. In language, it is difficult to understand <<, and when comparing it with the contents written in the specifications, it is necessary to manually perform each command. In addition, technology has been adopted to check the operating status of programs by performing simulations and emulations, but these require numerical values and data to be set in response to the various input commands required within Progera. .

Therefore, it is possible to understand the execution contents of the program by reading each command of the program, recognizing the structure of the overall program processing and flow, and describing the execution contents of the program roughly or as the operation of input/output devices. Techniques that attempt to obtain output in an easy format are envisioned. In this case, the final output to the input/output device based on the program is a store instruction in which the microprocessor writes some data to a predetermined address in memory.6 Therefore, the contents of the operand variables appearing in the store instruction are ultimately For example, if the program is read backwards until the load instruction is determined, the contents of the variables are determined as if data were input by the load instruction. In this way, the execution contents of the program can be roughly described using the operand variables used in the load instruction.

Problems to be Solved by the Invention In such a conventional example, a case where the program to be analyzed has the structure shown in FIG. 19, for example, will be described. This program consists of instructions in steps a1 to alo, steps a2. Call instructions rcALL A and rCALL that call a subroutine program to a4
B is placed. Here, when the program is reversely ascended from step a5, the reverse ascending path is a5→a8→a7→a6→... and a 5-+ a 84 a 7-1 a 10-+ a
9-* --- Two types are assumed, but considering the actual program execution order, the latter is a path that cannot actually be executed.8 In other words, when analyzing the program contents, the program is If only the technology to read sequentially based on the contents is used, paths that are impossible from the actual program execution path will be analyzed, which increases the analysis time and makes it difficult to match the actual program execution contents. This is extremely problematic as it leads to different analysis results.

The purpose of the present invention is to solve the above-mentioned technical problems, to read instructions backwards from a program, and to analyze the contents by selecting an analysis path that corresponds to the actual execution path, and avoiding possible execution paths. It is an object of the present invention to provide a program content analysis device that eliminates the problem of selecting an analysis path.

Means for Solving the Problems The present invention provides an apparatus that reads each instruction of a program that is to be read from a plurality of instructions backwards in the opposite order of execution, and analyzes the contents. The present invention is characterized in that any one of a plurality of execution paths of a program set based on the arrangement of branch instructions is sequentially selected, and each instruction is read backward along each execution path. This is a program content analysis device.

Further, the present invention provides a program content analysis device, wherein the branch instruction includes an instruction to change the contents stored in the stack.

Furthermore, the present invention provides an apparatus for reading each instruction of a program consisting of a plurality of instructions backwards in the order of execution and analyzing the contents, in which a plurality of instructions of a program corresponding to a branch instruction are read for each instruction. A branch that includes path data that identifies an execution path and, for each instruction that is either a branch destination instruction or a branch instruction specified by a branch instruction, position data of either the corresponding branch instruction or the corresponding branch destination instruction. A branch data creation means for creating data, a route data storage means for storing route data, a position data storage means for storing position data, and a reverse reading reading means for reading each instruction by reversing the program, When reversing, the route data and branch data of each instruction are read from the route data storage means and the branch data storage means, and the program is reversely reverted according to the branch path defined by the branch data, corresponding to the continuous same route data. This is a program content analysis device characterized in that it includes such reverse upstream reading means.

According to the present invention, when each instruction of a program consisting of a plurality of instructions is read backwards in the opposite order of execution, one of the plurality of execution paths of the program that is set corresponding to a branch instruction in the program is read. One was selected sequentially and reversed along each execution path. Therefore, when each instruction of a program is read backwards from the order of execution and its contents are analyzed, it is possible to prevent the problem of performing analysis on an analysis path that is impossible as an actual execution path. This prevents redundant processing,
Processing speed is improved.

It is assumed that the branch instruction includes an instruction that changes the contents stored in the stack when executing the program. In other words, this is not limited to branch instructions that change the program execution order from the location of the branch instruction, but also instructions that change the stack store contents and do not change the program execution order at the location of the instruction itself. This includes:

In other words, by changing the contents stored in the stack,
This is the case, for example, when the branch destination is changed by a return instruction in a subroutine program. Even in such a case, the above effect can be achieved, and usability is greatly improved.

The above operation is based on path data that identifies multiple execution paths of the program corresponding to the branch instruction for each program instruction, and for each instruction that is either the branch destination instruction specified by the branch instruction or the branch instruction, the corresponding branch Position data of either the instruction or the corresponding branch destination instruction is created by the branch data creation means, and these data are stored in the route data storage means and the position data storage means. When the reverse up reading means reads each instruction by reversing the program, the route data and position data of each command are sequentially read out from the route data storage means and the position data storage means, and the route data and position data of each command are sequentially read out from the route data storage means and the position data storage means so as to correspond to successive identical route data. , the program is run backwards according to the branch path defined by the branch data.

By such an operation, the effects peculiar to the present invention can be realized.

Embodiment FIG. 1 shows a program content analysis device (
1 is a block diagram showing an example of the configuration of an analysis device (hereinafter abbreviated as an analysis device) 1. FIG. An external storage device 2 is connected to the analysis device 1 and stores a program written in a high-level language or assembler language to be analyzed.

The analysis device 1 includes an assembler 3 that converts a program from an external storage device 2 into machine language, and an assemble list from the assembler 3 is stored in an assemble list file storage section 4. Hereinafter, the term "storage unit" refers to a predetermined area of an internal storage device, such as a RAM (random access memory) or a fixed disk device, provided in the analysis device 1.

The assemble program to be analyzed from the assemble list file storage means 4 is an analysis preparation processor Fl 5
The data of the program to be analyzed is classified by content prior to the program analysis described later. A plurality of storage units are connected to the analysis preparation processing means 5. The list file storage unit 6 stores an instruction sequence consisting of twenty-one monograms of machine language and assembler language of the program to be analyzed. The RAM file storage unit 7 stores various variables used in the program to be analyzed. The map data storage unit 8 stores fixed data in a map format used in the program to be analyzed. In addition, a storage section 9 is connected, and stores, for example, vector addresses of interrupt vectors used in the program to be analyzed, labels related to the twenty-one monitor programs stored in the list file storage section 6, and the like. The analysis device 1 is also provided with an instruction data file storage section 10 in which instructions used in the program to be analyzed are stored in advance.

The program in binary format from the list file storage unit 6 is given to the flow structure analysis unit Y1 as a branch data creation unit, and the process flow structure in the program to be analyzed, that is, the presence or absence of branches, and branch instructions are assumed. We are trying to analyze changes in the position of branch destination instructions and the degree of nesting of stacks when branch instructions are executed. Here, we will create a flow control file that will serve as the basic data for all subsequent analysis processing, and
to be memorized. Based on each data from the list file storage section 6, instruction file storage section 20, and flow control file storage section 12, the branch condition analysis section 13, store content analysis section 14, and complete branch condition analysis section 15 perform respective analyzes described later. Each data obtained through the processing is stored in a branch condition file storage section 16 including a route data storage means and a position data storage means, an execution content file storage section 17, and a complete branch condition file storage section 18.

The flowchart creation unit 19 creates and outputs a flowchart of the program to be analyzed from the flow control file, branch condition file, and execution content file. Further, the execution content analysis result output unit 20 outputs, for example, the execution content of the analyzed program in print from the execution content file and the complete branch condition file.

FIG. 2 is a flowchart 1 for explaining the operation of the analysis preparation processing means 5. In step al, the analysis device 1 writes the external record f! A source program is read from the device 2 and assembled by the assembler 3. For the assemble program stored in assemble list file 4,
The analysis preparation processing means 5 assigns a series of numbers (hereinafter referred to as line numbers) to each instruction in step a2. At this time, each instruction is classified according to its type, such as store instruction, input/output instruction, branch instruction, or arithmetic instruction, as will be described later. This is done by referring to the instructions stored in the instruction data file storage section 10. In step a3, the aforementioned various data files are created based on the classification of the instructions.

Next, in the analysis device 1, the flow structure analysis means 11 performs a flow refinement analysis process on the program file consisting of machine language and twenty-monics stored in the list file storage section 6. This analysis process analyzes the flow structure of the program being analyzed (presence or absence of branches, identification of branch destinations, degree of nesting of stacks, etc.), and the various files mentioned above are used as the basic data for all subsequent analysis programs. create. In particular, in addition to extracting the line number of the branch destination instruction based on the existence of a branch instruction, it is also possible to
Create data representing concepts and "attribute" concepts.

(1) Reverse upward concept When attempting to analyze the execution contents of a program by reading instructions from the program according to its execution order, changes in condition codes such as various flags, correlations between multiple instructions, etc. , it is necessary to store all the data determined in relation to the command. Even if some of this data is unnecessary depending on the type of instruction, it is not possible to determine which data will be needed in subsequent analysis processing, so all data must be collected. There is a need.

The "reverse upstream" concept according to the present invention is a measure to solve this problem.

The present invention attempts to write a program written in machine language or an assembler program using a logical expression in an easy-to-understand format by synthesizing branch conditions and store contents of branch instructions and store instructions. For this reason, only the necessary information is collected by starting from the branch instruction or store instruction and working backward through the program to the point where the contents of the branch condition or store instruction are determined.

Here, as a program example, explanation will be given based on the program shown in Table 1 below.

(Left below) In the program example above, the execution order is line numbers 1-2 → 3 → 4.
→5→6 or line number 1→2-3→4-5-7 1
The branch instruction is rBccJ, and its condition is (
A-#8) is determined by whether it is 0 or more or negative. For this purpose, the value of accumulator A needs to be determined. To do this, it is necessary to determine the values of both accumulators A and H in row number 3, and the values are determined only after row numbers 2 and 1 are read.

The flow structure analysis means 11 collects information necessary for the reverse upstream processing, that is, data for determining whether a certain instruction and its preceding line are consecutive instructions according to the order of execution of the program, and data for determining whether these instructions are invalid. In the case of continuation, attribute data, which will be described later, is created, such as data regarding which line number the instruction is contiguous to.

(2) Attribute concept The program includes a main routine and a subroutine whose processing branches off from a predetermined point in the main routine. The same subroutine may be called from multiple locations, and the branch destination position of a return instruction RET that returns processing to the main routine changes depending on the calling instruction of the main routine. Therefore, it is considered that a plurality of execution paths are set even for one subroutine, and an attribute concept is set as information for classifying processing paths. The following will explain the program example shown in Table 2.

(Left space below) Table A flowchart of the above program example is shown in FIG.

The execution order of this program example is line number 1-2 → 3 → 9 →
10→ 1 l →4→5→6→8→9→ 10→1
1 → 7 →... On the other hand, when going backwards through the program from line number 7, the first route is line number 7 → 11 →
10 → 9 → 8 → 6 → 5 → 4 → 1 l → 10-9
-3-2-1-...but also line number 7→1
This means that there are reverse upward routes such as 1→10→9→3→2→.... Such a latter reverse upward route is an impossible route based on the execution order, and the selection of such an undesirable route is prevented using the attribute concept.

In the program example in Table 2, the branch destination column, branch source column,
The contents of the flow flag field and the attribute field are determined as follows.

(a) Processing branches from attribute line numbers 1 to 7c due to the CALL instruction at line number 3.6, and does not include a subroutine program, so lines 0 and 9 to 11 are all given the same attribute symbol M. This is a subroutine program whose processing is transferred by the CALL instruction number 3, and is given the attribute symbol A. Line numbers 8 to 11 are subroutine programs whose processing is transferred by the CALL command at line number 6.
An attribute symbol B different from the attribute symbol A is given.

(b) Branch destination column The branch instructions in the above program are located at line numbers 3, 6, and 7°11, and the destinations to which these processes are transferred are located at line numbers 9.8°1 and 9.8°1, respectively, depending on the content of each instruction. In the branch instruction RET, this is line number 4 or line number 7 immediately after the corresponding CALL instruction. In the branch destination column, data is set in which the line number of the branch destination is paired with the attribute of the instruction of the line number.

(C) Branch source column A branch source instruction from which processing is transferred to the branch destination instruction is associated with the branch destination instruction to which processing is transferred by each branch instruction. Therefore, in the branch source column, when the branch source instruction is associated with each instruction, data in which the line number of the branch source instruction and the attribute symbol to which the branch instruction belongs is set is set.

(d) Flow flag column A flow flag "1" indicates that the instruction in question is a continuous instruction from the instruction in the previous line. The flow flag "○" indicates that the instruction is a branch destination instruction from which processing branches from another instruction other than the instruction in the previous line. That is, line numbers 1 to 3 are a series of instructions, and the instruction at line number 4 is an instruction in which the subroutine program A is executed by the CALL instruction at line number 3, and the processing is branched by the RET instruction at line number 11.

For this reason, a flow flag "O" is attached. Similarly, the flow flag rlJ is set by 1 inch at line number 5.6, and the flow flag "0" is set at line number 7.

Line number 8 is an instruction whose processing is branched by the CALL instruction of line number 6, and the ffl flag is set to 0.
Line number 9 is an instruction whose processing is branched by the CALL instruction of line number 3, and is an instruction with a flow flag of "0".
Since the L instruction is executed, line number 9 becomes an instruction following line number 8, and a flow flag "1" is given as shown in Table 2.

For line number 10.11, a flow flag "]" is given.

In the example program shown in Table 2 above, we have explained instructions such as the CALL instruction where the processing branches from the instruction, and where the processing branches to that instruction. )
The instruction at the address output by is read and executed, and upon execution of that instruction, the address of the next instruction to be executed is stored in the program counter.

On the other hand, if a subroutine program is included in the program, processing branches, and at this time a stack is used. As is well known, stacking is first in, last out.

This is a FILO type memory, and when a subroutine is called, the next address of the main routine to which processing should return from the subroutine is stored. After the processing of the subroutine is completed, the data stored in the stack is transferred to the program counter by a return instruction RET, and the program is executed from the address. Therefore, if an instruction that changes the storage contents of the stack is included, the return destination from the subroutine program can be changed.

An example of such a program is shown in Table 3 below.

Table 3 In the program example in Table 3, line numbers 4 to 8 of the program example in Table 2 have been changed. The method of determining data in the branch destination column, branch source column, and flow flag column in the program example in Table 3 is the same as in the case of the program example in Table 2. The method for determining attributes will be explained below.

Line numbers 1 to 3 are a series of instructions and provide attribute data M. Since the process branches to line number 9 due to the CALL instruction at line number 3, the process returns to line number 4 due to the RET instruction at line number 11, which gives another attribute symbol A to line numbers 9 to 11. An attribute symbol M is given to this command.

The PSH instruction in line number 5 rewrites the latest address data on the stack to the contents of the X register.

At this point, the attribute data is changed to B, and the same attribute data B is given to the following rows up to line number 11. In this way, attributes regarding the program including instructions that modify the data stored in the stack described above are determined.

The attribute data of the flow control data regarding the program examples in Tables 2 and 3 above are as follows for each program execution path regarding branch instructions including instructions that change the contents of the stack:
As mentioned above, different symbols are given. In such a method, when the number of attributes in the program to be analyzed increases, if the program is to be analyzed backwards as mentioned above, attribute data in all attribute columns must be searched for each instruction to ensure the same attribute data. Since the processing is performed in a backward manner according to the attributes of , faster processing can be realized if the number of attribute data can be reduced.

The program contents in Table 4 below are the same as those in Table 3, but flow control data different from those in Tables 2 and 3 are shown in branch columns 1, 2 and attribute columns 1, 2, .・
...is set to close.

The method of determining these will be explained below.

(Left below) (e) Attribute! i (i = 1.2) = line number data in the attribute section Not set for each branch instruction,
The line number of the branch destination instruction is written. The attribute data to indicates which attribute part the process branches to by the branch instruction in question, and in the line-up flag column, flag = "O" indicates that the corresponding instruction is the branch destination instruction, and the instruction in the immediately previous line is Indicates that the processing is a non-consecutive instruction, flag = r j
ノ (j=1゜2,...) indicates the number of the attribute part 0 Line number 1 may be a branch destination instruction whose branch instruction is line number 11, so the flag = "0" is set. . Further, in the sequential descending flag column, a flag of "0" indicates that the corresponding instruction is an instruction whose processing is not consecutive to the immediately following instruction, and is a branch instruction.

In line number 2, the number of attribute part 1 that is set first is flag =
Set as "1". Line number 3 is a branch instruction,
Branch destination line number data N (1=r9J is set. to=rIJ is set for attribute data to. After this, the process branches to line number 9, and therefore the reverse uplink flag is set to "0". Reverse uplink flag -
The zero line number "11" where "rl" is set is a branch source instruction, and line number data N0-r4J are set. The instruction at line number 4 is currently in the range of attribute 1I11, and therefore attribute data to-rlJ is set.

After this, the process moves to line number 4. Therefore, the reverse uplink flag and the forward downlink flag become r
” is set.

After this, the process reaches line number 11. The branch destination has been changed to line number 1 by the RSH instruction at line number 5, so attribute section 2 is added and reverse upstream flag = "2" is set. Further, row number data N0=rlJ and attribute data to=rl are set.

(f) Branch source column i (i = 1.2...> The data in this branch source column is set for the branch destination instruction, and the line number data No. of the branch destination and the instruction immediately before the branch instruction are The attribute part number fr to which the branch destination instruction belongs and the attribute part number t to which the branch destination instruction belongs.
o and are set respectively.

Hereinafter, it will be explained that reverse upstream analysis is possible using the program example in Table 4 using the data in the branch source column and the data in the attribute section. When the reverse upstream flag = "l" is reversed, the reverse upstream flag becomes - "O" at line number 9, so refer to the branch source column and understand that it is branched from the attribute part 1 of line number 3. . Further, all the information is determined at line number l by going backwards. Therefore, the route related to reverse uplink flag = "1" is line number 10 → 9-3 → 2 → l, and the processing content is [P
ORT1+o]+1 [PORT1+O]...
・It is understood that (1>).

Next, when the reverse uplink flag = "2" is reversed, attribute 12 is first referenced, but at line number 9, the reverse uplink flag - rl
, so the attribute section 1 is referred to for line number 8. From this point on, the information is read backwards in the same manner as described above, and all information is determined at line number 6. According to this, the processing content is [PORT2+0]+1+1-[PORT2+
It is understood that Oko = - (2).

FIG. 4 is a flowchart illustrating the operation of the flow structure analysis means 11. The outline of the operation of the flow structure analysis means 11 has been explained with reference to Tables 2 to 4 above, and the operation will be explained in detail below.3 In step c1 of FIG. and initialize various data to predetermined values. In step C2, it is determined whether the process has reached the highest pay line. If it has not been reached, the process moves to step c3, and it is determined whether the array CZ[in] representing the number of attribute parts set for the line number In of the instruction currently being analyzed is O. If the zero number array CZ is O, it means that this is the first instruction to be analyzed.

If the judgment in step c3 is negative, the process proceeds to step C4.
, and increase the number of attribute parts by one.

In step c5, the attribute data explained with reference to Table 4 is set. In step C6, it is determined whether the instruction at line number 1n is a branch precedence. If the branch is precedence, a branch source column such as branch source column 1 for the instruction in row number 4 of the fourth table is set in step C7, and the process moves to step c8. step c
If the determination in step 6 is negative, the process moves to step c9, and the reverse uplink flag and forward downlink flag are set.

The reverse uplink flag and forward downlink flag will be explained below. FIG. 5 is a diagram illustrating the structure of the flow control file storage section 12. As shown in FIG. The flow control file storage section 12 is composed of a branch source file section 22 and an attribute file section 22. FIG. 6 is a diagram explaining the structure of the branch source file section 21. The branch source file section 21 is provided for each line number,
A branch source number storage unit 23 that stores the number of branch source instructions whose branch destination is the line number, and a branch light inter-light storage unit 24 that corresponds to between the branch lights described with reference to Table 4 are set to, for example, 80 areas. be done. The branch light storage unit 24 is a line number storage unit 25.
, a branch source attribute storage section 26, and a branch destination attribute storage section 27.

7th [21] is a diagram illustrating the structure of the attribute file section 22. The attribute file section 22 is provided for each line number, and the attribute number storage section 28 stores the number of attributes set for the line number.
'', in the case of undefined, there are two undefined flag storage units that store an undefined flag represented by 0°, an attribute value storage unit 30 that stores an attribute value corresponding to the attribute data to between the attributes in Table 4, and an 1. In the illustrated branch condition file storage section 16, the branch condition storage section 31 stores the address storing the branch condition of the instruction with the corresponding line number, and stores the line number data No. and the attribute data to among the attributes in Table 4. A branch preceding number storage unit 32, a branch source attribute storage unit 33, a reverse uplink flag storage unit 34 that stores reverse uplink flags corresponding to the flags between the attributes in Table 4, and a forward downlink flag that stores forward downlink flags. It is configured to include a storage section 35.

The forward descending flag is set as shown in the forward descending flag column of attribute 1 in Table 4, for example. In other words, if the command with the current line number is consecutive to the command with the immediately following line number,
If it is a discontinuous instruction, it is given "0". Line number 2 in Table 4 is an instruction that is continuous with line number 3, and the data "1" is given. However, line number 3 is not continuous with the instruction at line number 4, and therefore data rO'' is given.

Fourth illustrated step c7. At c9, the reverse uplink attribute, forward downlink attribute, and branch light interval having the above-mentioned contents are set.

First, in step c8, it is determined whether or not the instruction is a branch instruction.If it is a 0 branch instruction, the process moves to step clo;
It is determined whether the branch instruction is an instruction to terminate interrupt processing, such as the YRET instruction in row number 1 of Table 4. If this judgment is negative, the process moves to step all, and the branch precedence number is determined.

This is determined by referring to the list file storage section 6 in FIG. In step c12, branch number data bi representing the number of branches is incremented by +1, and in step c13, the branch number data bi and the line number are arrayed m, m(bi)=1n -<3).
Match with .

At step c14, changes in the stack are checked as described below. At step c15, attribute data is calculated, and at step c16, the next row number is set in the variable Nn, and the process returns to step c2. If the determination at step c8 is negative, the process moves to step c14.

If the judgment in step c3 is affirmative, it means that the command is not the first command line to be analyzed, and step c17
It is determined whether or not there are attributes having the same attribute. If this judgment is negative, the process moves to step C4, and the number of attributes is increased. If the judgment in step c17 is affirmative, the process moves to step c18, and it is determined whether or not the branch instruction is a branch precedence.If the branch instruction is 0 branch precedence, step c19
Then, the distance between the branched lights shown in Table 4 is set, and the process moves to step C20. If the judgment in step c18 is negative, step c2
1, the reverse uplink flag and the forward downlink flag described in step C9 are set. Here step c19
．． After c21, since the judgment in step c17 is affirmative, it means that the same attribute already exists, and the analysis has been completed for this attribute, and the analysis process ends without performing analysis again. Then, the process moves to step c20.

In step c20, it is determined whether or not the branch number data bi is (.If affirmative, the process ends.If negative, the analysis process ends, and step C20 returns to the step (). The line number in of the branch instruction stored in step 13 is read out in the data 1m(bi), and in step c23, the branch number data bi is decremented by -l, and the process (returns to step c2. That is, step c2
2, the analysis process is performed again using the row numbers 1n that are successively generated.

FIG. 8 is a flowchart illustrating the operation of the branch condition analysis means 13. The branch condition analysis process will be explained based on the program contents shown in Table 4 above. In step d1 of FIG. 8, line number s1n is set to O, and step d
In step 2, the line number si'n is incremented by +l. In step d3, it is determined whether or not the line number In exceeds the last line number of the program, ie, line number 11 in the program example shown in Table 4. If it exceeds the limit, the process ends, and if it does not exceed the limit, the process moves to step d4. In step d4, it is determined whether the instruction at line number In is a branch instruction or not.

In the above program example, line number 1 is not a branch instruction, and the process returns to step b2 and proceeds to the instruction at the next line number. It is determined that line number 3 is a branch instruction, and step d5
Proceed to.

In step d5, the variable k representing the inter-attribute number is set to O, and in step d6, the variable k is incremented by +1. In step d7, regarding the array C2 (Nn) representing the number of attributes related to the instruction at the line number in, k≦CZ C1n) −(4
). If this judgment is negative, it means that the number of attributes for each instruction during the flow 11 structure analysis process shown in Figure 4 has been exceeded, that is, branch condition analysis has been completed for all attributes in the branch instruction. Therefore, the process moves to step d2 and proceeds to the instruction of the next line number.

If the determination in step d7 is affirmative, the process moves to step d8, and a reverse upstream process, which will be described later, is started along the inter-attribute number k in the instruction of the line number In to find a reverse upstream path. As described above, a participation flag, which will be described later, is set for the instruction necessary to determine the branch condition of the branch instruction. In step d9, as will be described later, the execution content of each instruction read backward is set as a branch condition. step dl
At O, the branch condition obtained in this manner is stored in the branch condition file storage section 16 shown in the first diagram.

FIG. 9 is a flowchart illustrating details of the reverse upstream process in step d8 of FIG. At step e1 in FIG. 9, a control variable sw, which will be described later, is initialized to zero. In step e2, it is determined whether or not the control variable SW is O. If it is affirmative, the process moves to step e3, where the reverse uplink flag shown between the attributes in Table 4 is checked, and the reverse uplink flag is set to 0. When the control [number sw=2 is set, and when the reverse uplink flag is within 0, sw=i is set. After this, the process returns to step e2.

FIG. 10 is a flowchart illustrating details of the reverse upstream determination process in step e3. Figure 10 Step f
1 reads the attribute n number indicated by the attribute data to between attributes 1 in row number 3 of the fourth table. In the above example, to =
r I J, and 1 between attributes is read. step f
In step 2, the value of the reverse uplink flag of attribute 1 is set to the value of the attribute data to. At step f3, attribute data t
Determine whether o is O. If it is 0, it means that continuity with respect to the execution order with the previous instruction has been lost.
In step f4, the control variable sw is set to 2, and the process ends.

If the determination at step f3 is negative, it means that the processing is continuous with the previous command, and the control variable SW=1 is set at step f5. In step f6, the variable /n representing the line number is decremented by -1 and the process is terminated. In line number 3 of the program and example in Table 4, the attribute data to=rl, and in this case, the control variable SW −1
becomes.

Referring again to FIG. 9, if the determination at step e2 is negative, the process moves to step e4, and it is determined whether the control variable sw=1 or not. If affirmative, move to step e5,
When all the information necessary to determine the branch condition of the above branch instruction is obtained, clear the corresponding reverse up flag,
Set the flag corresponding to the newly required information. When all the flags are cleared, the control variable sw is set to 4; otherwise, the control variable 5W is set to O. After this, the process returns to step e2.

FIG. 11 is a flowchart illustrating details of the reverse upstream information setting process in step e5.

1112] In step g1, the program to be analyzed is
A reverse up row counter rc, which is incremented by +1 each time a row is reversed, is incremented by +1.

In step g2, the reverse up counter Crl is used as a variable, and the line number In, attribute data to, branch field number nd, branch condition of a branch instruction or store instruction, or line number rnQ of an instruction necessary to determine the store condition are set. First, the backward row number In is stored in the temporarily stored work memory m.

At step g3, the attribute data to of the instruction that has been uploaded is also stored in the work memory m. In step g4, the branch source file section 21 shown in FIG.
In the branch light interval 21, the number of branch source instructions branching to the same attribute as the attribute data to of the instruction is counted and stored. Further, a branch light number nt is stored in the work memory m for each branch source instruction stored in the work memory m.

In step g5, it is determined whether the various data obtained in steps g2 to g4 are necessary. The CALL instruction at line number 3 in Table 4 is an unconditional branch instruction, so the various data listed above at line number 2 are unnecessary, e, and necessary.
The judgment is negative. On the other hand, if line number 3 of the fourth table is a conditional branch instruction like the BBC instruction of line number 5 of the first table, and line number 2 is involved in the branch condition, the process moves to step g7, and such A number given to each command is stored in the work memory. In step g8, the information flag other than the work memory is cleared, and the process moves to step g9.

In step g9, it is determined whether or not new necessary information exists, and if so, a new information flag is set in step glo, and the process moves to step gll. If the determination in step g5 is negative, data "0" is set in the work memory m (rcrno>, and the process moves to step gll. The same applies if the determination in step g9 is negative.

In step gll, it is determined whether a necessary information flag indicating whether new information is required to determine the branch condition or the contents of the store instruction is "0". That is, the necessary information flag is rl.

, the branch instruction or step I from which the reverse upward analysis process started
- The execution content of the instruction A has been determined, and the process moves to step g12, where the control variable SW- is set to "4".
This is to write the data stored in the work memory m into the branch condition file storage section 16 of FIG. 1, as will be described later. If the determination at step gll is negative, the process moves to step g13, where the control variable 5W is set to rOJ. This is because, as will be described later, when the process returns to step 62/\ in FIG. 9, it moves to step e3 to continue the reverse upstream process.

In this way, step e5 in FIG. 1 is executed, and the process returns to step e2. If the determination at step e4 is negative, the process moves to step e6, where it is determined whether the control variable SW=2. In this case, as explained in step e3, the reverse uplink flag is set to "○", indicating that the line number is an instruction whose processing order is not consecutive with the immediately preceding instruction. In such a case, it is necessary to branch the reverse upstream analysis process, so the process moves to step e7. In step e7, as will be described later, the line number of the branch destination of the reverse upward analysis process is determined, and the control variable SW is set to "1" and the process returns to step e2.

FIG. 12 is a flowchart showing details of the reverse upstream branch processing in step e of FIG. 1. Figure 11 Step h1
Then, in step g4 of FIG. 11, the work memory m[rc] stores the branch light number.

nd (cn)], and read the branch source column number from the branch light interval 1 as shown in Table 4, and read the corresponding branch source row number data No. and the attribute data of the branch source, that is, the branch source attribute column number fr. , set the branching source line number data NO in the line number In, and set the attribute data t in step h2.
Set branch source attribute data to o.

In step h3, the branch count data m[rc] and cn set in step g4 in FIG. 11 are decremented by ~1. After this, in step h4, the control variable 5W-r I
J, and the process ends.

In this way, the process of step e in FIG. 1 is completed and the process returns to step e2. If the determination in step e6 is negative, the process moves to step e8, and it is determined whether the control variable S W = "3". If this judgment is affirmative, the process moves to step e9, where the starting line number of the analysis route for which reverse upstream analysis is pending is determined, and the process is performed at step e, setting the control variable 5W=r2.
Return to 2.

FIG. 13 is a flowchart showing details of the unanalyzed data processing at step e9 in FIG. Figure 13 Stellar pull 1
Then, it is determined whether the reverse up route counter re is "O" or not. In other words, it is determined whether there are any unanalyzed reverse upward analysis routes remaining. If such an unanalyzed reverse upward route does not exist, the process moves to step p2, and the control variable SW
−'5J and ends the process. If the judgment in step p1 is negative, the process moves to step p3, where the backward up route counter rc is decremented by ~1, and in step p4, the branch number work data m(rc
), it is determined whether cn is O or not. If it is O, the process returns to step pi, and similar processes are performed for other unanalyzed routes.

If the determination in step p4 is negative, the process moves to step p5, sets the control variable 5W=r2J, and ends the process.

Referring again to FIG. 9, the unanalyzed route analysis process of step e9 is thus completed and the process returns to Stella 7e2. If the judgment in step e8 is negative, step el
Moving to step o, it is determined whether or not variable SW=4. If affirmative, it means that the reverse upstream analysis process has been completed for all assumed reverse upstream analysis routes, and the analysis route obtained in steps e and 11, that is, each instruction constituting the reverse upstream analysis route The line number data of is written to the branch condition file 16 in FIG. If unanalyzed routes remain, control variable 5W=r3. is set.

FIG. 14 is a flowchart illustrating the process of step ell in FIG. 9 in detail. At step q1 in FIG. 11, it is determined whether the reverse upward route counter rc is O or not. O
If so, it means that the analysis of the previous and reverse uphill routes has been completed, and the above-mentioned route data storage process is performed and the process ends. If the determination in step ql is negative, the process moves to step q3, sets the control variable 5W=r3'J, and ends the process.

Referring again to FIG. 9, in this way step ell
The data writing process ends and the process returns to step e2. If the judgment in step e10 is negative, it means that the analysis has been completed for all analysis paths as explained in FIG. The process for determining the value ends.

At step d9 in FIG. 1, processing is performed to synthesize branch conditions for each reverse upstream analysis route obtained at step d8. The branch instructions in Tables 2 and 3 above are unconditional branch instructions, and will be explained with reference to the program example in Table 1. This progera 1. , the branch instruction in the example is a BCC instruction with line number 5, and if you follow the process of finding the backward path described above, line number 5
Line number 5-4-' as a reverse upward analysis route starting from
3-2-' 1 is obtained.

That is, the branch condition of the branch instruction at line number 5 is obtained at line number 4, A-#8≧0...<5>, and variable A is undefined. Regarding variable A in line number 3, A←(A-B)...(6
) is performed, and the undefined variables become A and B. A=#3 with the commands in line numbers 2 to 1...<7) B=
#5 ・(8) is obtained, and variables A and B are determined. Therefore, when these are combined, the branching condition is 3*5-8 ≧8 ・
...(9> is obtained.

In step dlo of FIG. 8, the branch condition thus obtained in step d9 is stored in the branch condition file storage section 16 of FIG. In this way, the program to be analyzed is redirected to a branch instruction, and the process of determining the branch condition is completed.

Further, in the program example shown in Table 4, the process for determining the execution details can be obtained by starting the reverse upward analysis path obtained in step d8 in FIG. 8 from, for example, the ST instruction at line number 10. The obtained first analysis path is line number lO→3-2→l as described above, and the execution contents are synthesized using the same technique as the method of synthesizing the branch bundle f↑ along this path. Then, [PORT1+0] +1- [PORT1+O]
-(IO>[PORT1] indicates data stored at address PORT.

is obtained. In other words, it shows the process of storing again the contents of the address PORTI plus the preset data O plus data 1 at the same address, that is, the process of incrementing the data at the address PORTI by +1.

The other analysis path is line number 10-9-8 → 6-5 → 4. If the execution contents are synthesized along this path, [P
ORT2+O] + 1 + 1 →
[POr(T2.+0'1...(11)), and it can be seen that the process increments the data at address PORT2 by 2. Such execution content data is stored in the ttg execution content file storage unit 17. is memorized.

If this embodiment is followed as described above, the above Tables 2 to 4
Since each data between the branched lights and the data composing the attribute column shown in the table and Figures 5 to 7 are set prior to reverse upstream analysis processing, the program can be executed during reverse upstream analysis. It is possible to prevent unnecessary processing from being performed due to selection of an undesired reverse upward analysis path that contradicts the order.

Furthermore, in this embodiment, like the subroutine program A in line numbers 9 to 1.1 of the program example shown in Table 2, it is called by the CALL instruction in line number 3, and it is called by the CALL instruction in line number 6. In an instruction sequence that is executed again when the called subroutine program B is called, attribute data for identifying an analysis path is set for each of a plurality of branch instructions.

Therefore, when performing reverse upstream analysis processing from such a subroutine program, it is possible to set an analysis path according to the call location such as a CALL command, and it is possible to prevent a situation in which an incorrect analysis path is set. .

The descending order flag in the attribute column of Table 4 will be explained below.

FIG. 15 is a flowchart showing a program example explaining the reason for using this descending order flag, and FIG.
6 is a diagram illustrating the stored contents of No. 6. FIG. When the subroutine program is called during the execution of the routine program, the return address is stored in the stack 36 as shown in 16121 (1), the stack pointer is incremented by +1, and the processing is performed, for example, in the subroutine shown in Fig. 15. Move on to the program.

In the subroutine program of FIG. 15, when the bush command PSH for writing new address data into the stack 36 is executed in step r1, the address data is written into the stack 36 as shown in FIG. 16 (2). ,
The stack pointer is incremented by +1. From this point on, the process proceeds to step r2. r3. r4. r5, the stack 36 reads the most recently written address data from the stack 36 and decrements the stack pointer by one (1).
As shown in 3), the address data is erased, leaving only the return address.

In a subroutine program as shown in Figure 15,
The stack operation instruction PSH and the stack operation instruction PUL
A case is determined in which it is to be checked whether or not L and L are paired one by one within a single subroutine program.

At this time, in the reverse upstream process, there are the following three types of routes.

Line numbers R7, R6...<12) Line numbers R7, R6, R2, R1',... (13
) Line numbers R7, R5, R4, R3, R2, R1...(
14) Therefore, when performing the above inspection, the first
This means that the paths of the two formulas will also be inspected, resulting in unnecessary inspections that are completely unrelated to the stack manipulation instruction. Therefore, when performing the above-mentioned inspection, a method of reading instructions in the order of program execution and performing the inspection is advantageous in that it eliminates unnecessary processing.

For this reason, in this embodiment, a flag for lower rank by 3 is set in the attribute column of Table 4. As described above, this descending order flag is a flag for identifying whether or not a certain instruction is a consecutive instruction with respect to the instruction of the next line number in terms of execution order. By using this descending order flag in the same manner as the reverse ascending flag explained in the above embodiment, it is possible to read and analyze the program to be analyzed along the descending route. This eliminates unnecessary processing, making it possible to increase processing speed and efficiency.

In the program example shown in Table 4 above, if a plurality of CALL instructions are placed in subroutine program A, the branch entry and attribute columns in the table will be set for the number of CALL instructions.

If such a subroutine program does not change the contents of the stack, the execution content will be the same even if it is called by a different CALL instruction, and in such a case, the branch entry and attribute column will be The amount of memory allocated can be reduced.

An example of the operation of this embodiment will be explained along with the example program shown in Table 5 below.

(The following is a blank space) The data for the branched entrance hall and the attribute paulownia in Table 5 above are set based on the data setting method explained with reference to Table 4 above. As described above, in order to reduce the memory capacity allocated to the branch entries and attribute columns, branch entries and attribute columns as shown in Table 6 below are created based on the program example in Table 5.

Table 6 The underlined data has been changed between Tables 5 and 6 above. That is, CAL L of line number 3
The determination of the branch light intervals and attribute parts regarding the instruction, the instruction string of line numbers 8 to 10 branched from this, and the line number 4 further branched by the return instruction RET are set in the same manner as in the fifth case. When I continue reading line number 6,
Branches to line number 8.

In the example in Table 4, a new branch source n2 and attribute section 2 are set, but in this embodiment, since the same subroutine program is analyzed, such an increase in the branch source (source) and attribute section is performed. First, in line number 8 of branch source n1, line number data N0=rO is set, and attribute data of line number 4 is set as f r=rO. Furthermore, the attribute 1jIIt or O of line number 8.

and set. Such data "O" is used to indicate that the analysis of the subroutine program at line numbers 8 to 10 based on the CALL instruction at line number 6 has been completed.

At this time, the attribute part is also line number l → 2 → 3-8 → 9.
-1. At the stage when the analysis from O → 4 → 5 is completed, data such as attribute Ia1 in Table 5 is set, but attribute part 2 is not added by the above-mentioned processing from line number 6 onwards, and the Data such as attribute n1 in Table 6 is set.

In the reverse upstream process, when the row number data NO of branch light interval 1 of row number 8 is referred to, it is "0", so the branch source row number becomes unknown. Therefore, in the process of creating the branch light interval and attribute part described above, the line number next to the line number of the branch source instruction that branches to line number 8, that is, line number 5.7 in the example in Table 5, is set first. Stored in in-last-out (FILO) type memory. Therefore, when the row number data rQJ is referenced between branched lights during reverse upstream analysis, the F
Data is read from the ILO type memory and used as a branch precedence number in reverse upstream processing.

By doing so, in the flow control file storage section 12, it is possible to reduce the memory capacity allocated between the branched lights and the attribute section.

It is known that the execution contents of the program example in Table 4 above are greatly influenced by the storage contents of the stack, which change due to branch instructions such as line numbers 3 and 5.11, and instructions that create the contents of the stack. There is. If the contents of such a stack are compiled in advance as attribute data,
This is useful for program analysis. In particular, when an instruction that changes the contents of the stack is included, such as the PSH instruction in line number 5 of Table 4, or the PULL instruction that pairs with it, the change in the program execution state becomes clear. , it becomes easier to specify the program analysis path.

The following description assumes that in the same program example as in Table 4 above, addresses as shown in Table 7 below are set for each instruction of the progera 11.

(Left below) In this example, the data in Table 4 is used for the branch source and attribute columns, but if there is an instruction that changes the contents of the stack in addition to this, the stack contents changed by that instruction. A stack data VAL column whose contents are data is provided. According to this, the process branches to line number 9 at line number 3, and at this time, data #FOO7 is stored in the stack. Therefore, for VALlli in line numbers 9-11,
Data VAL=r07FO'' obtained by converting the upper byte and lower byte of the address #FOO7 are respectively set.

Processing returns from line number 1■ to line number 4, and then at line number 5, the memory contents of the stack are changed to the address #F' of line number 1.
Changed to OOO. Therefore, line number 4 after this
In attribute column 1 of ~8, stack data VAL-r
"oOFO" is set. At line number 8, a new attribute column 2 is set, and the stack data VAL=roO
FOJ is set.

As described above, according to this embodiment, the stack data is set in the attribute column, so that, for example, when performing reverse upward processing from the subroutine instruction RET, which returns to the main routine, the stack data is set in the attribute column. The return destination is
This can be determined by referring to the stack data VAL, eliminating the need to go backwards through each instruction and sequentially analyze and detect them. This speeds up the processing. Further, by using the stack data VAL, it becomes much easier to identify attributes such as the type of attribute and the processing path set for each instruction.

In step d9 of Fig. 8, the first
From the flowchart creation means 19 and execution content analysis result output means 20 shown in the figure, the obtained results can be output as a combination of logical expressions in the form of a flowchart or PAD diagram, or the execution contents can be printed out. In this case, the longer the program to be analyzed, the larger the amount of output.

Therefore, a technique is needed to organize the outputs described by these logical formulas into a simple form using pooling algebra.

The 14th [21] is a flowchart explaining such an embodiment. For example, when the output from the flowchart creation means 19 or the execution content analysis result output means 20 is given as a logical expression in which logical symbols are combined, such as the following expression, ... (15), to simplify this, The following processing is performed. The basic policy of this simplification processing is the following equations 16 and 17.

A+A=U...(16)
A + A-g = A + g
...(17) U; entire set A, subset A of U, complement g of A; unary logical product operation +, logical sum operation No. 15121 explains the contents of the above equations 16 and 17. It is a pen diagram. Equation 16 above means that in the entire set U, the union of the subset A and its complement A is always the entire set. Also, the above formula 17 is the subset A
If and unary g are disjoint, then the complement A and unary g
The complementary set of and set A means that it is the union of set A and unary g.

Based on the basic method of the above equations 16 and 17, the 17th equation describes the procedure for simplifying the above equation 15.
This will be explained with reference to the flowchart shown in the figure. In step 7sl of FIG. 17, each term is decomposed. As a result, the above first equation is changed to the following equation 18.

F = C-A + C・A-B + C-A + C-
A-13+A-B...(18> Next, in step S2, it is determined whether or not there is a common term. First, it is determined that there is a common term C for the first term and the second term of Equation 18. This is determined, and the result is combined in step s3) to obtain the following Equation 18.

C・(A+A-B)...(1
9) Next, in step s4, the 16th equation and the 17th equation are
It is determined whether there is a composite pattern based on the expression. Within 0 of the 19th equation, synthesis based on the 17th equation is possible, and the judgment is affirmative, moving to step S5 and proceeding to the following 20th equation.
It is synthesized as shown in Eq.

If it is determined in step s4 that there is no composite pattern, the process moves to step s6, and it is judged whether there is another same-term that can be bracketed by (>).If not, the process moves to step s3.Equation 20 below. In the example, there are no more combination patterns within 0, and the process returns to step s1, where 0 is decomposed and the following equation 21 is obtained.

0°(A+B)...(
20〉c-Al + CB
(21) Next, regarding the first term of Equation 21 and the third term of Equation 18, step s2. The process in step s3 is applied, and the following equation 22 is obtained.

CA10C-A-A・(C+C)...(22
) next step s4. At s5, the basic principle of Equation 16 above is applied, and Equation 23 below is obtained.

A・(C+C)=A
(23) Next, similar processing is performed on the second term of Equation 21 and the fourth term of Equation 18, and the result of Equation 24 below is obtained.

C-B + CA-B = B・(C+C-A) = B
c10BA·(24) Next, similar processing is performed between the second term of the first side of Equation 21 and the fifth term of Equation 18, and the following Equation 25 is obtained.

B-A +A-B = A・(B+B)=A・
-(25> Therefore, the following Equation 26 is obtained from Equation 23, the first term on the first side of Equation 21, and Equation 25.

A+B・C10A=B・C+U=U...(26
) In this way, based on the basic policy shown in Equations 16 and 17 above, the logical expression shown in Equation 15 above can be simplified to the entire set U based on the processing procedure shown in FIG. confirmed. In this way, when performing the process of synthesizing branch conditions in step d9 of FIG. 8, the logical expression is simplified and expressed by logical operations using pool algebra, as described above.

This makes it easier to understand the execution contents when creating and outputting a flowchart with a single flowchart creation means, or when printing out the execution contents as a logical formula using the execution contents analysis result output means 20. It can be expressed in a format, and is extremely efficient when using the program content analysis device of the present invention for program debugging, etc.

Effects of the Invention As described above, according to the present invention, any one of a plurality of execution paths of the pro gamer 11 set corresponding to a branch instruction in a program is sequentially selected and each execution path is followed. It made me lash out. Therefore, when each instruction of a program is read backwards from the execution order and its contents are analyzed, it is possible to prevent the problem of performing analysis on an analysis path that is impossible as an actual execution path. This prevents redundant processing from occurring and improves processing speed.

Further, even if the branch destination of a return instruction of a subroutine program is changed by an instruction that changes the contents stored in the stack, the above effect can be achieved, and usability is greatly improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of the analysis device 1, and FIG. 2 is a flowchart explaining the operation of the analysis preparation processing means 5.
3 is a flowchart showing the flow of the operation of the example program to be analyzed, FIG. 4 is a flowchart explaining the operation of the flow structure analysis means 11, 5I2I is a diagram showing the configuration of the flow control file storage unit 12, and FIG. 7 shows the configuration of the branch source file storage unit 21, and FIG. 7 shows the configuration of the attribute file storage unit 2.
8 is a flowchart explaining the operation of the branch condition analysis means 13, FIG. 9 is a flowchart explaining the reverse uplink flag of this embodiment, and FIG. 10 is a flowchart explaining the reverse upstream flag in the reverse upstream processing. Flowchart 1 to be explained,
Fig. 1 is a flowchart explaining data setting processing in reverse upstream processing, Fig. 12 is a flowchart explaining reverse upstream branching process in reverse upstream processing, and Figure 13I21 is a flowchart explaining the operation of unanalyzed route processing in reverse upstream processing. FIG. 14 is a flowchart explaining the data writing process, FIG. 15 is a flowchart 1 explaining the operation flow of the example program to be analyzed, FIG. 16 is a diagram explaining the state of the stack, and FIG. 19 is a flowchart illustrating a simplification process using a pool algebra of a logical formula, FIG. 18 is a pen diagram illustrating this embodiment, and 1911 is a flowchart illustrating the flow of an example program. l...Analysis device, 3...Assembler, 4...Assemble list file storage unit, 5...Analysis preparation processing means, 6...List file storage unit, 10...Instruction data file storage unit, 11...Flow structure analysis means, 12
...Flow control file storage unit, 13...Branch condition analysis means, 16...Branch condition file storage unit, 21...Branch source file part, 22...Attribute file part, 23...
・Attribute number storage unit, 24...Branch source unit storage unit, 25・
・Line number storage unit, 26...Branch source attribute storage unit, 27・
- Branch destination attribute storage unit, 28... Attribute number storage unit, 29
...Undefined flag storage section, attribute value storage section

Claims (3)

[Claims] (1) In a device that reads each instruction of a program consisting of multiple instructions backwards in the opposite order of execution and analyzes its contents, when reading backwards, the settings are set based on the placement of branch instructions in the program. A program content analysis device characterized in that any one of a plurality of execution paths of a program is sequentially selected and each instruction is read backward along each execution path. (2) The program content analysis device according to claim 1, wherein the branch instruction includes an instruction to change the contents stored in the stack. (3) A device that reads each instruction of a program consisting of multiple instructions backwards in the opposite order of execution and analyzes the contents, identifying, for each instruction, multiple execution paths of the program corresponding to the branch instruction. For each instruction that is either a branch destination instruction or a branch instruction specified by a branch instruction, branch data is created that includes path data for the corresponding branch instruction or position data of the corresponding branch destination instruction. A branch data creation means, a route data storage means for storing route data, a position data storage means for storing position data, and a reverse reading reading means for reading each instruction by reversing the program. reading the route data and branch data from the route data storage means and the branch data storage means, and reading the program backwards according to the branch route corresponding to the continuous same route data and defined by the branch data; A program content analysis device comprising such reverse upstream reading means.