JPH031674A - Picture recorder - Google Patents

Abstract

PURPOSE:To record a picture signal stably at a high speed by driving relatively a recording medium and a recording means, stopping the recording till the recording is enabled and continuing the drive till the recording is finished when the operation is released during the recording. CONSTITUTION:When a 1st stage of a release button 34 is depressed, a transistor(TR) 1 is conductive, a motor Mo is started to drive a disk. The count of a counter CNT1 is restricted because an output Q of a FF2 is at an H level when the motor Mo reaches a steady-state speed. Since a head 15' is placed at the initial position of the disk, an output of an inverter IV1 goes to an H and two inputs of an AND gate AG1 goes to H at this point of time. When the button 34 is depressed till the 2nd stage, an inverter IV2 goes to H, a FF1 is set, a gate AG2 goes to H and an output Q of a FF3 goes to H. Thus, the gate AG1 goes to H, the FF2 is inverted to L, the count of the counter CNT1 is started and even when a button 34 is released, the conduction of the TR1 is kept and the circuit system continues the operation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image recording device, and particularly to an image recording device that records an image signal for each recording track by using a recording body that can set a plurality of recording tracks in a state separated from each other. The present invention relates to an image recording device capable of recording images.

[Conventional technology]

For example, an image that uses a recording medium such as a magnetic disk or a magnetic drum that can set a plurality of magnetic tracks separately from each other, so that a still image signal can be magnetically recorded for each set track. Recording devices have already been proposed.

The biggest advantage of this type of image recording device is that, unlike photographic cameras that use silver halide film as a recording medium, even if you have only recorded up to the middle track, you can take it out of the recording device and record it. By putting it on an appropriate playback device, you can watch only the recorded portion at will, and after watching it, you can record other images on the remaining tracks by returning it to the recording device, or The point is that it becomes possible to use the present invention by erasing some recorded tracks using an eraser in a playback device and recording other images on the erased tracks.

[Problem to be solved by the invention]

By the way, when considering such usage, it is very important to be able to accurately distinguish between recorded tracks and unrecorded tracks. That is,
If this distinction cannot be made and another image is recorded on the already recorded track, this type of device requires that the two image signals be accurately aligned, that is, synchronized. It is extremely difficult to achieve this, and this synchronization tends to deviate depending on the situation. Therefore, when this track is played back, the reproduced image depends on the mixture of the two image signals, so it is difficult to tell what was recorded ( The result is a strange image that ends up being played back.

Therefore, for example, in this case, if the discrimination between recorded tracks and unrecorded tracks is performed accurately, and the track you are about to record is already recorded, a warning to that effect may be displayed. Alternatively, double recording may be automatically prohibited on this previously recorded track, or even further, in the case of a previously recorded track, a state shift of the recording head, that is, a mechanical shift of the head itself, or If the electrical shift by switching the head channel is automatically performed to ensure that unrecorded tracks are always recorded, it would be very reasonable for this type of device. It must be something.

[Means to solve the problem]

The present invention has been made in view of the above-mentioned circumstances, and is particularly suitable for an image recording device of this type that has a simple configuration that provides the above-mentioned rational functions, and that also achieves the maximum benefit with high precision. The purpose of this is to make it possible to record the image signal, and its characteristic feature is that when recording the image signal, it is necessary to check whether or not the track on which the image signal is to be recorded has already been recorded. The present invention consists in automatically detecting whether or not there is already a recording at the position to be recorded using a recording head without using a dedicated detection head when automatically detecting the recording.

According to this, as will be clear from the following embodiments, this type of device has the above-mentioned rational functions, namely, warning against and prohibition of double recording, and furthermore, the ability to record unrecorded tracks. Functions such as automatic state shifting of the recording means will be poorly achieved.

〔Example〕

Embodiments of the present invention will be described below with reference to the accompanying drawings. The embodiment shown here is a case in which the present invention is applied to a handy camera. First, referring to FIGS. 1 to 3, the camera is indicated by CA in the figures. TL is a photographic lens, ■ is a focusing ring, and 2 is a zooming operation rod. Reference numeral 3 denotes a half mirror for extracting finder light, which is placed behind the photographic lens L in the camera body. Reference numeral 4 denotes a half mirror for taking out the photometric light, which is placed in the reflected optical path from the mirror 3, and a photometric element 5 is arranged to receive the reflected light from the mirror 4.

Reference numeral 6 denotes a total reflection mirror, and behind the mirror 6 a finder optical system of a known configuration is arranged. 7 is a finder eye cup. Reference numeral 8 denotes a photographic diaphragm, which is placed behind the mirror 3, and here has a configuration that allows the diaphragm to be cut. 9 is a CCD as a solid-state image sensor
As the image sensor, a well-known frame transfer type two-dimensional imaging CCD is used here. As will be described later, a lenticular lens and a color stripe filter are arranged in front of the imaging section of the CCD 9 as is well known. Reference numeral 10 denotes a cartridge loading chamber of the camera CA, in which a magnetic recording disk 1 is housed, as shown in the figure.
A magnetic recording cartridge 12 that rotatably houses a magnetic recording cartridge 1 is loaded. As shown in FIG. 2, the cartridge 12 rotatably supports the disk 11 via a shaft 12a.
A part of the housing has a central opening 1 for receiving a disk drive spindle 14 on the camera CA side.
2a, and a slot 12c for receiving a magnetic head 15, which is also provided on the camera CA side. As shown in FIG. 1, the disk 11 has a center hole 11a, and is rotatably supported by the shaft 12a in the center hole 11a.
The cartridge 1 has an arcuate slot 11b concentric with the cartridge 1.
The plate spring 13 provided in the center opening 12b is biased toward the center opening 12b. Incidentally, here, the loading chamber 10
As shown in FIG. 2, the depth of the cartridge 12 is recessed, and when loading the cartridge 12, the cartridge loading chamber cover 16 is opened and the cartridge 12 is inserted diagonally as shown by the line in FIG. and, at this time, its center opening 1
The spindle 14 is inserted into the slot 12b, and the magnetic head 15 is inserted into the slot 12c in the normal position by being tilted in the direction of the arrow in the figure. is the magnetic recording section 1 of the disk 11
1c.

This recording section 11c can have a plurality of recording tracks, for example 40, separated from each other, and each track records a magnetic signal for one frame of a still image, as described later. Further, the disk 11 itself has flexibility, and the head pressure of the head 15 can be obtained depending on its elasticity. Incidentally, when the loading chamber cover 16 is closed, the cartridge 12 is positioned by leaf springs 17 and 18 (shown in the second figure) attached thereto. The disk drive spindle 14 is a disk 11
The flywheel 19 has a drive pin 14a which can be engaged with the arcuate slot llb of the flywheel 19, and the flywheel shaft 19a has a drive pin 14a that can be engaged with the arcuate slot llb of the camera frame. The shaft is supported by the member 20 in a manner that prevents rotational play and thrust play from occurring. It should be noted that special attention must be paid to the problem of rattling of the shaft 19a since it has a very large effect on recording performance.

Mo is a motor for rotationally driving the flywheel 19, and the output pulley 22 and the flywheel 19
A rubber belt 23 is stretched between the two. Reference numeral 25 denotes a head holding member that holds the head 15 at a bent arm portion 25a at the tip thereof, and a support that is attached to a part of the camera frame along the slot 12c of the cartridge 12. It is supported slidably along the rod 24 by a rod 24, is biased in the direction of the arrow in FIG. Recording section 11C of disk 11
It has ratchet teeth 25b formed to define the spacing between the magnetic tracks. Note that when the head holding member 25 is displaced by the spring 20 to the final end position in the direction of the arrow in FIG. Each element is designed to In this case, the number of ratchet teeth 25b is 40, for example, in accordance with the set number of tracks on the disk 11. Therefore, the total number of set positions for the head 15 is 41. A ratchet feed pawl 27 engages with the ratchet teeth 25b to shift the holding member 25 by one tooth, and is biased by a spring 28 in the direction of engagement with the ratchet teeth 25b. It is link-coupled to the movable armature Am of the plunger PA'. The plunger P! is designed to cause the armature Am to project against the spring 29 by a stroke that allows the holding member 25 to be accurately shifted by one tooth when energized. Numeral 30 is a locking claw for holding the holding member 25 in its forwarded position, and is rotatably supported by a shaft 31 installed in a part of the camera frame. In addition, it is biased by a spring 32 in the direction of engagement with the ratchet teeth 25b.When the loading chamber cover 16 is opened, the holding member 25 is held in place by the head 15 so that it comes into contact with the outermost track on the disk 11. A reset member for automatically returning to the initial position, the head of which has a hook portion cut into a tapered or arcuate shape, and the hook portion can engage with the tail end 30b of the locking pawl 30. Therefore, when the lid 16 is closed, the locking pawl 30 is rotated by the reset member 33 against the spring 32, and At this time, the feed claw 27 also has a head portion 3 at the tip of the locking claw 30.
The protrusion 27a at the tip is pushed by the armature 0a and rotated against the spring 28 using the link connection point with the armature Am as a fulcrum, and the engagement with the ratchet teeth 25b is released. The holding member 25 is automatically returned to the above-mentioned initial position. Note that this reset member 33 has some flexibility, and when the lid 16 is opened beyond the angle formed, the engagement with the locking pawl 30 is released, and when the lid 16 is closed, its head By abutting against and overcoming the tail end 30b of the locking pawl 30, the hook portion is set at a position where it can engage with the tail end 30b. Therefore, it would be better to make the edge portion of the tail end 30b of the locking pawl 30 rounded as shown in FIG.

In Figure 1.3, 34 is the release button,
Here, it is a so-called two-stage release type. Reference numeral 35 denotes a grip portion, in which a power source battery E is accommodated.

Further, in FIG. 1, EU is an electric circuit unit, the details of which will be described later. Also, in Fig. 3, 36 is a dial for mode selection, with indicators rsJ, rC, J.
.

Switching is possible for "C2" and rMVj. Here, these indicators mean that rSJ means one image shot, rc, J means continuous image shot at a speed of, for example, 7.5 images per second, and "C2" means, for example, 3.7 images per second.
Continuous image shots at a speed of about 5 images, and rM
VJ each represents a video shot at a rate of 30 images per second, the typical video recording speed.

(Note that "shot" means "photographing").

37 is a slide for selecting the shift of the head 15 with respect to the recording track between automatic and manual during one image shot, and can be switched between indexes rAJ and rMJ; ” indicates manual shift. 38 is manual shift mode rMJ
When the button is selected, the plunger Pf can be actuated by a button for shifting the head 15, which will be described later. In addition, head 15
Modes rclJ and rC2 are used to manually shift
This is clearly unreasonable in the case of J and rMVJ, and therefore, here, for example, as shown in FIG.
J, [C2J and MVJ prohibit switching from rAJ to rMJ of slide 37 and allow this switching only in mode "S", and furthermore, when slide 37 is r
If the mode is switched to rC, J, [C, j or rMVJ while in the MJ position, the slide 37 is moved to rAJ.
A cam 39 is provided in interlocking relation with the dial 36 to automatically reset the cam 39 to the position, and this cam 39 is attached to the follower portion 40a of the pin-slot engagement plate 40 on which the slide 37 is provided. I make sure to leave it there. Note that 41 is a click stop spring. Furthermore, the mode symbols shown in parentheses for the cam 39 indicate the cam area corresponding to each mode.

Returning to FIG. 3 again, 42 is a jack for external output of a video signal (NTSC signal), to which a general VTR device can be connected, and this can especially be set to rMVJ mode.
Used when set to . That is, the number of image frames that can be recorded on the disk 11 is only 40 at most according to the above example, so even if you try to record a moving image on this disk 11 at video recording speed, it will only take about 1 second. Even if you increase the number of tracks on a disc, there is a limit to how many tracks there are, so it is unreasonable to use a disc to shoot a video, but here, for the mode "MV", this jack 42 If this is provided, it will be possible to record long moving pictures in combination with a VTR device, further expanding the camera's functionality. 43 is a remote control jack, to which a remote controller is connected.

The above is the configuration of the main parts of this camera CA,
Next, details of the circuit configuration in the electric circuit unit EU will be explained.

First, FIG. 5 shows the configuration of an imaging-video signal (NTSC signal) generation-magnetic recording system, where 44 is a KH
An oscillation circuit that generates relatively low-frequency clock pulses of the z order, and 45 various synchronous control signals required to synchronously control the circuit system shown here based on the clock pulses from the oscillation circuit 44. A synchronous control circuit that generates
46 is an oscillation circuit that generates a relatively high frequency clock pulse on the order of MHz; 47 is a clock pulse from the oscillation circuit 46 and a CCD synchronous drive control signal from the synchronization control circuit 45 (for example, when a vertical synchronization signal is This is a sync driver that outputs various signals necessary to synchronously drive the CCD 9 based on the following. still,
Here, as schematically shown in FIG. 6, the CCD 9 includes an imaging section (photosensitive section) 9a consisting of a large number of photosensor elements arranged in a matrix, and the imaging section 9a.
A storage unit 9b that takes in charges corresponding to each pixel accumulated in and stores them in correspondence with the address of each element.
It consists of an analog shift register 9c for time-series transfer of the electric charges stored in As shown in FIG.
A stripe filter 48 and a lenticular lens 49 are arranged. Among the signals given to the CCD 9 from the sink driver 47, there is a signal for controlling the accumulation of charges in the imaging section 9a, and a signal for controlling the accumulation of charges in the imaging section 9a at a predetermined timing, e.g. A clock pulse is used to transfer the charge to the storage section 9b in an extremely short period of time every 1/60 seconds, and the charge taken into the storage section 9b is passed through the shift register 9C at a timing of, for example, 1/60 seconds (this is It includes clock pulses, etc. for outputting in chronological order (i.e., reading out stored charges) during the period (corresponding to the time of 1v-1 partical scan on a television). The timing of the equal signal and the pulse is defined based on a control signal from the synchronization control circuit 45. Incidentally, although not shown in FIG. 6, it goes without saying that the charge transferred by the shift register 9C is ultimately converted into a voltage, current, or the like and output. In addition, since this type of frame transfer type CCD is already well known, further detailed explanation will be omitted.

Now, returning to FIG. 3 and continuing the explanation, reference numeral 50 and 51 are sample and hold circuits for removing noise components in the pressure of the CCD 9, and these are connected to the control signal (sampling signal) from the synchronous control circuit 45. ). 5
2 is a video signal (NTSC signal) generation circuit that samples and
A luminance signal circuit 53 that outputs a luminance signal Y′ based on the output from the hold circuit 50, and a sample and hold circuit 51.
A color signal output circuit 54 outputs color signals R-Y and B-Y based on the output from the circuits 53 and 54, and an NTSC signal is output based on the signals Y, R-Y, and B-Y from these circuits 53 and 54. As is well known, the color signal output circuit 54 and the encoder 55 are provided with a synchronization control signal from the synchronization control circuit 45. It should be noted that since this type of video signal generation circuit is already well known, only the display based on functional blocks will be given here. 56 is a magnetic recording circuit for video signals, which here includes a low pass filter 57, a pre-emphasis circuit 58, an FM modulation circuit 59, and a high-pass filter 57;
Filter 60, band pass filter 61, frequency conversion circuit 62, low pass filter 63, mixing circuit 64
A well-known configuration of a so-called color subcarrier low-pass conversion multiplex recording system comprising a recording amplifier 65 and a recording amplifier 65 is adopted. Although the operational functions of circuits adopting this method are already well known, to briefly mention them here, first, when an NTSC signal, that is, a composite color video signal is input from the video signal generation circuit 52, this video The signals are passed through a low pass filter 57 and a band pass filter 61 to produce a luminance signal Y and a 3.58 MHz color subcarrier signal f, respectively. Separate. The separated luminance signal Y is subjected to pre-emphasis by a pre-emphasis circuit 58, and then sent to an FM modulation circuit 59.
After being subjected to FM modulation by a high-pass filter 60, it is applied to a mixing circuit 64 as an FM luminance signal with a part of the lower band removed, while the color subcarrier signal f is sent to a frequency conversion circuit 62 as an FM luminance signal. A signal f of a predetermined frequency from the synchronous control circuit 45
, and then the low-pass filter 63 outputs the difference signal, that is, the low-pass converted color subcarrier signal f, -
f, -fe are extracted and applied to the mixing circuit 64, and the mixing circuit 64 generates a color signal riding on this low frequency converted color subcarrier f, and an FM luminance signal excluding a part of the lower band. Obtain a mixed signal (that is, a VTR signal),
This is recorded on the track of the disk 11 by the head 15 through the amplifier 55.

Next, a first specific example of the sequence control system according to the present invention will be described with reference to FIG. 10, although the figure numbers are different. In the example shown in FIG. 10, one magnetic head is used for both unrecorded and recorded track detection and recording, and its operation mode is switched as appropriate using the output of the counter CNT1. It is possible to automatically detect whether or not there is already recording at a position to be recorded without using a detection head. In the figure, reference numeral 15 denotes a magnetic head for detection and recording, which includes the analog switch ASW and the unrecorded and recorded track detection circuits (i.e., amplifier AP,
It is connected to an analog switch ASW' provided at the input stage of the signal integrator circuit HIC and comparator COM), and the analog switch ASW' receives the signal to be applied to the analog fist switch ASW. An inverted output is provided by an inverter IV. Therefore, according to this circuit configuration, when the output of the counter CNT is low, the analog switch ASW' is turned on and the head 15' is used for detecting recorded tracks. At this time, when an unrecorded track is detected and the output of the counter CNT becomes high, the analog switch ASW is turned on and the head 15' is used for recording on the unrecorded track.

Further, SW is a switch that is linked to the dial 36, and is configured to be in a closed state in any mode other than the rMVJ mode. Tr is a switching transistor, and 5WR1 is a first-stage camera release switch that is turned on at the first stage of the release button 34, and the transistor Tr.

connected to the base of. PMC is a photometric circuit that determines an appropriate aperture value based on the output of the photometric element 5 and the charge accumulation time of the imaging section 9a in the CCD 9. still,
In this embodiment, this accumulation time is
5 to the sink driver 47. For example, according to the above example, the time is fixed at 0, about 1760 seconds, and therefore in this case. , the photometric circuit PMC is given fixed information regarding this time. By the way, this time corresponds to the exposure time of the film in a camera that uses general silver halide film, so the PMC of this photometering circuit can be used as is in the photometering circuit configuration of the well-known film camera. be. Reference numeral 66 denotes an aperture interlocking means such as a meter or a motor that adjusts the aperture 8 to a proper aperture value in response to the output of the photometric circuit PMC, and its output shaft is connected to the aperture 8. Furthermore, as mentioned above,
The aperture 8 in this case has a so-called aperture cut configuration (the purpose of this is to prevent so-called "burn-in" of the CCD 9). When a meter is used as the interlocking means 66, a spring may be applied to the movable coil so that the diaphragm 8 is held in a fully closed state when the coil is not energized. In addition, when using a motor, a power storage means such as a capacitor is connected to it, and when the output from the photometric circuit PMC is cut off, the power stored in this power storage means is applied. Aperture 8
It would be good if it could be forcibly driven so as to squeeze it all the way down.

Reference numeral 67 denotes a scale member for displaying the aperture position, which is driven together with the aperture 8 by the aperture interlocking means 66, and is, for example, a scale member with an aperture value scale written on a transparent film, and is placed at a position that is visible in the camera viewfinder. Fixed index 6
The diaphragm 8 displays the adjusted aperture value depending on the coincidence of the scale with the scale 8.La is a lamp for illuminating the scale member 67 from behind, and is connected to the output stage of the transistor Tr+. When the transistor Tr+ becomes conductive, it is supplied with power and lights up. Therefore, along with the illumination of the scale member 67, the release button 3
It also functions to display that 4 has been pressed down to the first stage.

MCC is a motor control circuit for controlling the constant speed rotation of the motor M0, SW2 is a switch that is turned on only in modes rC, J and "C2" in conjunction with the dial 36, and O12 is a conduction circuit for the transistor Trl. This is a one-shot pulse circuit that outputs a pulse that goes high for a moment when powered by the OR gate. - Set human power S of flip-flop FF through gate OG2, and or gate oG
, reset the flip-flop FF3 through R
granted to.

S W R2 is a release switch that is turned on at the second stage of the release button 34, and its 0N-OFF signal is sent to the set manual S of the flip-flop FF via the differential circuit DFC and Inno Kuichiyo IV2. granted. Also, flip-flop FF.

is set only when the switch 5WR2 is turned on, and its C output becomes low, and this C output is applied to the base of the transistor Tr+.
When the release button 34 is pressed down to the second stage, the transistor Tr+ is held, and even if the release button 34 is immediately released, the transistor Tr+ remains unchanged.
does not become non-conducting, and as described later, switch 5WR2
is off, and when the detection head 15A detects a recorded track, this holding is released and it becomes non-conductive.

DLC is the time required for the motor M0 to start up (50
100 m5ec), the output of which is applied to an AND gate AG.

CNT inputs the vertical synchronizing signal (FIG. 8(a)) from the water flow period control circuit 45 in FIG. Figure 8 (
The signals shown in b), (c) and (d) are output.

AG is the AND of the above human output and B output.
At the gate, its output will be as shown in Figure 8(e),
Further, AG is an AND gate which ANDs the outputs of A, B and C, and its output is as shown in FIG. 8(f). Now, if the input period shown in Fig. 8(a) is 1/30 sec, then the human output period is 1
/15sec, the cycle of B output is 1/7°5sec, the cycle of C output is 1/3.75sec, and the high level time of AND gate AGs, AGa output and human output is 1/30sec. Therefore, each output can be used as a recording control signal in modes rsJ, rcl'', [C2J, respectively, and these outputs A and AND gate AG5. The output of AG is set to modes rsJ and [C
, J, rC2J. Incidentally, the output of the counter CNT selected by this switch SW3 is output from the output stage of the imaging-video signal generation-magnetic recording system circuit 69 having the configuration shown in FIG.
5) and the recording control analog switch ASW provided between the head 15 and the recording head 15, thereby controlling the recording. Also, the clear terminal CL of the counter CNT
is provided with the Q output of the flip-flop FF2, and counting is possible only when this Q output is low.

La2 is turned on by the transistor T r 2 which receives the Q output of the flip-flop FF2 at its pace, and lights up when the Q output is low, that is, when the counter CNT is counting, indicating that recording is being performed. This is a lamp that indicates that there is a vehicle.

AP is an amplifier that amplifies the output of the head 15. HIC is a signal integration circuit that integrates the signal output from the amplifier AP. COM is a comparator. The output of the comparator COM is high or low if it is a recorded track. If it is a recording track, it will be low, and this will be the AND gate AG.
1, given to OR Gate OG, OG2 and OG s.

Further, the output signal of the comparator COM is applied to the AND gate AG and AC3. C.N.
T2 is a counter which receives a clock pulse from the fifth oscillation circuit 14 and divides the frequency thereof, and by applying two appropriate outputs thereof to an AND gate AG4, the plunger Pf is driven. I am trying to obtain a pulse with a duty that is sufficient for this purpose. The output of the AND gate AG4 is applied to an AND gate AG3, and the output of the AND gate AG3 is applied to the base of the transistor T r s.

L a 3 is a lamp that momentarily lights up to display this line when the track is already recorded in the mode rs-MJ, that is, the 1-image shot-manual head shift mode; Switch SWM linked to
, the above transistor Trs in mode rMJ
connected to the collector side of the Note that the switch SWM1 connects the plunger Pf to the collector of the transistor Tr3 in mode rAJ. SWP is the putunyu button 38 that is turned on.
The switch SWM is interlocked with the slide 37, and in mode rMJ, the switch SWP is connected to the plunger PI! This is a switch that connects the

The external output jack 42 for the NTSC signal is connected to the circuit 69, specifically, to the output stage of the video signal generation circuit 52 shown in FIG. Further, the remote jack 43 is connected in parallel with the switches SWR and 5WR2 via diodes D, D, as shown in the figure.

SWE is a normally closed end switch that is opened when all tracks on the disk 11 have been recorded, and is connected in series with the transistor Tr+. still,
It would be reasonable to use the configuration shown in FIG. 7, for example, as a configuration for activating this end switch SWE. That is, in the illustrated configuration, the tail end is pivotally attached to a part of the camera frame by a shaft 70, and a slot 72a in the middle thereof is used.
A track count member 72 is provided which swings in accordance with the feeding of the head holding member 25 by engaging a pin 71 set up in the head holding member 25, and is attached to the tip of the count member 72. The number of recorded tracks can be displayed on the track number scale plate 75 disposed in the window 74 by the pointer 73, and the holding member 25
is shifted to the left in the figure by the total number of ratchet teeth 25b, that is, when the disc 11 is off the innermost track of the recording section 11c and is further shifted inward by one tooth. At this point, the end switch SW is activated by the switch release projection 76 at the tip of the count member 72.
This allows E to be opened. Note that power supply to the circuit system shown in FIG. 5 is controlled by the transistor Tr1 similarly to the photometric circuit PMC.

Now, next, the operation of the camera having the above electrical system configuration will be explained. As mentioned above, this camera has the following modes: rS-AJ (1 image shot - automatic head shift), "SM" (1 image shot - manual head shift), rC,J (7.5 images/sec. There are five modes: rc, J (continuous shot at 3,75 images/sec), and rMVJ (video shot depending on VTR speed using a VTR device). To do this, first set mode r
The case of S-AJ will be explained with reference to the timing chart of FIG.

First, the camera CA is loaded with a cartridge 12 in which all tracks of the disk 11 are unrecorded (at this time, the head 15 is set at its initial position as described above, so end switch SWE is also on), and dial 36 is set to "
In the "S" mode position, the switch SW is in the on state, the switch SW2 is in the open state, and the switch SW3 is connected to the A output terminal of the counter CNT. Furthermore, when the slide 37 is set to the rAJ mode position in this state, the switch SWML is connected to the plunger Pi side, and the switch SWM is opened, so that the camera CA is placed in the rS-AJ mode.

In this state, while looking through the viewfinder, point the camera CA at the desired object and press the release button 34 to the first step.The transistor T' becomes conductive to turn on the release switch SWR. Therefore, the photometric circuit P
The MC operates and the aperture 8 is adjusted from the fully aperture state to the appropriate aperture value, and the lamp La+ is turned on to illuminate the scale plate 67. starts, and the disk 11 begins to be driven to rotate. This situation is shown in Figure 9 (
Shown in a), (b), (d) to (f). Furthermore, when the transistor Tr+ becomes conductive, a pulse is output from the one-shot pulse circuit oSP as shown in FIG. The flops FF and FF2 are reset and set, respectively, and their Q and Q outputs become high as shown in FIGS. 9(h) and (i). On the other hand, when the transistor Tr becomes conductive, the circuit system shown in FIG. is supplied with power to start driving the CCD 9, and imaging, video signal generation, and VTR signal output start.At this time, the synchronization control circuit 45 generates a vertical synchronization pulse as shown in FIG. 9(k). is assigned to the counter CNT, but since the Q output of the flip-flop FF2 is low, the counter CNT is in a clear state, that is, in a state where it cannot count, and cannot count the pulses. Therefore, the input/output is low as shown in FIG. 9 (1'), and the analog switch ASW remains off. Also, at this time, a clock pulse is applied from the oscillation circuit 44 to the counter CNT2. Further, when the time required for the motor M0 to rise to a steady speed after the transistor Tr is turned on has elapsed, the output of the delay circuit DLC becomes high, as shown in FIG. 9(j), and therefore, At this point, and gate A
G's single-handed strength becomes high.

Also, at this time, since the disc 11 is completely unrecorded, no signal appears in the output of the detection head 15.
Therefore, the output of the comparator COM is low as shown in FIG. 9(n).

Therefore, the plunger Pf is not energized, and the head 15 is held at the initial position, that is, at the position where it is in contact with the outermost track in the recording section 11c of the disk 11. Also, at this point, the output of the AND game 1-AG becomes high depending on the output from the inverter IV.

Now, in this state, when the release button 34 is pressed down to its second step (as shown in FIG. 9(a)), as shown in FIG. 9(C).
As shown in the figure, the release switch 5WR2 is turned on and the output of the inverter TV2 is inverted from low to high via the differentiating circuit DFC.Therefore, the flip-flop FF is set, and at this time the output of the AND gate AG becomes high, so set the flip-flop FF, human power S
The output of the AND gate AG2 is applied to set the flip-flop FF, and its Q output becomes high as shown in FIG. 9(m).As a result, the AND gate AG becomes Since all of the three outputs become high, their outputs become high at this point, and therefore the Q output of flip-flop FF2 is inverted to low as shown in FIG. 9(i), so the counter CNT, is cleared and starts counting input pulses.

Incidentally, when the output of inverter V2 is reversed from low to high, the flip-flop FF is set and its Q output becomes low as shown in FIG. Even if the release button 34 is released at this point, the power supply to the circuit system is not cut off and the following operation continues.

Now, when the counter CNT starts counting its input pulses and its output becomes high as shown in Figure 9 (1), this turns on the analog switch ASW, and as shown in Figure 5, the water amplification The output of the circuit 65 is the recording head 15-
Therefore, the signal for one frame of the target image is magnetically recorded on the outermost track of the disk 11. Here, the A output at this time is the 8th output in this embodiment.
As explained with reference to the figure, the frequency of the vertical synchronization signal (FIG. 8(a)) from the synchronization control circuit 45 is divided by two, and the high level time is one period of this vertical synchronization signal, that is, ,
On the other hand, as is well known in the circuit system shown in FIG. In this case, signals of two fields and one frame are magnetically recorded. Also, therefore, the motor control circuit M.

It is designed to control the speed at a constant speed of 180 rpm.

In this way, when 1/30 second elapses after the A output of the counter CNT becomes high, the A output becomes low again and the analog switch ASW is turned off. This means that the recording of the signal for each frame ends in two-field format. At this point, the output of the comparator COM becomes high as shown in FIG. 9(n), and as a result, the output of the inverter IV becomes low, so that the output of the AND gate AC becomes low.

Also, the flip-flop FF is set by the output of the comparator COM at this time, and its Q output becomes /% as shown in FIG. Since it is cleared and restricted to a non-counting state, its A output remains low after the end of recording, as shown in FIG. 9 (1), and the analog switch ASW also remains off. Comparator CO
When the output of M becomes high, the output pulse from the AND gate AG4 is applied to the base of the transistor T r 3 through the AND gate AG 3, so that the transistor T r 3 becomes conductive and the plunger Pi becomes conductive. Therefore, the head holding member 2 is moved by the second illustrated feeding claw 27.
5 is advanced by one tooth of its ratchet tooth 25b, the head 15' is now shifted to the second track of the disk 11, and now the disk 1
1 is completely unrecorded, the output of the head 15' has no signal component (therefore, the comparator COM
The output becomes inverted to low at this point, as shown in FIG. 9(n). Incidentally, when the output of the comparator COM becomes high, the flip-flop FF is set. Also, when the output of the comparator COM becomes high, the flip-flop FF becomes active.

The transistor Tr is reset and its Q output becomes high as shown in FIG. 9(h), so that the holding state of the transistor Tr is released. Therefore, at this point, the release button M is released and the release switch SWR is released.
, 5WR2 are off, the transistor Tr becomes non-conductive and power supply to the entire circuit system is cut off.

Also, regarding the timing of releasing the press of the release button 34, for example, as shown by A in FIG. If it is later, the conduction of the transistor Tr+ is maintained by the movement of the flip-flop FF as described above, so the camera automatically performs the above operation and shifts the head 15' to the second track. On the other hand, as shown in B in FIG. 9(a), if the first stage is pressed but the second stage is not pressed and is released, this transistor stops. Tr
Since the + conduction is not maintained, the camera cannot release the
When the button 34 is released, it immediately stops.

Although the explanation may be confusing, flip-flop FF
While the Q output of No. 2 is low, that is, during recording, the transistor T r a conducts, so that the lamp L
a2 lights up, and the message that recording is in progress is displayed. It may be convenient to arrange the lamp L a 2 so that its lighting can be seen in the viewfinder.

In this mode rS-AJ, the camera stops or stands by with the head 15' automatically shifted to the next track after recording one frame. Thereafter, each time the second circuit of the release button 34 is pressed, the above operation is repeated, and the image signal for one frame is sequentially recorded on each track of the disk 11 (as in Become.

The number of recorded tracks at this time is sequentially indicated on the track number scale plate 75 by a pointer 73 attached to the tip of the seventh counting member 72 shown in the figure. Also, disk 1
When recording to the innermost track No. 1 is completed and the head 15' is automatically shifted, the end switch SWE is opened by the protrusion 76 at the tip of the count member 72.
The power supply to all circuits will be cut off momentarily.

Now, the above is a case where no recording has been made on the disc 11 at all, but if, for example, a recorded cartridge is loaded into a track in the middle, the situation will be as follows. That is, first, assuming that the first track of the disk 11 has already been recorded, the switch SWR is turned on and the motor M is turned on. As soon as the comparator COM starts, the output of the comparator COM becomes high, so recording is suddenly prohibited and the plunger PI! is energized to shift the head 15' to the next track. Also, since the output of inverter IV becomes low at this time, flip-flop F
Even if F is set, that is, even if switch SWR is closed, its output remains low, and therefore flip-flop FF is not set. On the other hand, if the new track is unrecorded when the head 15- is shifted, the recording prohibition is canceled because the output of the comparator COM becomes low, and this also causes AND gate A Since the output of 2 becomes high and the flip-flop FF is set, the output of 1 becomes high as described above.
The signal for one frame is recorded on this new track, but if this new track has already been recorded, the output of the comparator COM remains high, so the head 15' remains prohibited from recording. , and then shifted to the next track.

Therefore, when using a cartridge in which some of the tracks have already been recorded, recording is prohibited for the already recorded tracks, and the head 15- is automatically shifted without double recording. , and recording starts on the unrecorded track only when the unrecorded track is detected.

Now, the above was the case when the mode was rS-AJ, but next, in the case of mode rS-Ml, that is, ■Image shot - manual head shift, the switch SWM is set by switching the slide 37 to the rMJ position. is the plunger Pi
! Since the lamp La3 is switched from the side and the bushing switch SWP is connected to the plunger Pn via the switch SWM, even if it is detected that the track that the head 15- is facing has already been recorded. , the head 15' is not automatically shifted to the next track, but instead the lamp Las is turned on momentarily to display a notice that the track opposite the head 15- has already been recorded. In this case, it is possible to shift the head 15' to the next track by pressing the bushing button 38 and turning on the switch SWP.

Therefore, in this mode rS-MJ, if the track opposite the head 15- has not been recorded from the beginning, even if recording is performed in the same manner as described above by the camera release, this recorded Even if the output of the comparator COM becomes high at the end of , the lamp L a 3 lights up momentarily and the head 15' is not shifted to the next track. In this case, the head 15' is shifted by the button switch. This is done by introducing SWP.

On the other hand, if the track opposite the head 15' has already been recorded from the beginning, the lamp La lights up momentarily, so if the switch SWP is turned on at this point, the head 15' is shifted to the next track, and this track If it is not recorded,
It will be recorded on this unrecorded track. Of course, if this track has already been recorded, the lamp La3 will light up again for a moment to warn you, so the warning will be repeated by the lighting of the lamp Las until the head 15 reaches the unrecorded track, and the button 38 will be turned on. Head 15 depending on the press repeatedly.
It is only when the signal ' reaches the unrecorded track that recording is started on the unrecorded track.

Next, in the case of mode "C3" or "C2", that is, continuous image shots, the dial 36 is set to mode rC, J.
Or switch SW by switching to the “C2” position.
1 to SW, all switch to mode rC, J or "C2" terminal.

Therefore, the differentiating circuit DFC is short-circuited by the switch SW2, and the flip-flop FF remains set while the switch SWR is on.
Therefore, while the release button 34 is pressed to advance to the second stage, as long as the track opposite to the head 15' is an unrecorded track, recording is not inhibited and recording continues and continuous image shots are produced. It will be done. Of course, in this case, as can be understood from the operation in the mode 5-AJ described above, if there is a recorded track on the way, the output of the comparator COM becomes high when this recorded track is detected. As a result, the flip-flop FF2 is set and the counter CNT2 is cleared (that is, recording is prohibited), and the plunger P1 is energized and the head 15 is
'' is automatically shifted to the next track, and if this track is unrecorded, recording will be performed on that track.This operation causes the release button 34 to be pressed to its second position. It lasts as long as the circuit is pressed.

Note that the conduction of the transistor Tr is maintained in the same manner as in the above case. Further, in the case of mode "C1", the output of AND gate AG is selected by the switch SW, and in the case of modes rC and J, the output of AND gate AG6 is selected by the switch SW. As explained with reference to Figure 10, in the case of modes rC and J, there is a continuous flow rate of 7.5 images/second, and in the case of mode "C2", it is 3.7 images/sec.
This is a continuous shot of 5 images/second.

By the way, with this camera, if you connect a general VTR device to the external output jack 42 and set the dial 36 to mode rMVJ, the normal VTR speed, that is, 2 fields -
Video shots at a speed of 30 frames/second are possible. That is, when the dial 36 is set to mode rMVJ, either switch sw or -sw is set to that mode r.
The switch is switched to the MVJ terminal, and therefore 1. In this case, simply press the release button 34 to the first stage and turn on the switch SWR, and the circuit 69 will operate and an NTSC signal will be output from the jack 42. As a result, magnetic recording is performed within the VTR device as is well known.

Now, in the embodiment shown above, the head is connected to the disk 11.
Finally, the magnetic head was made into a multi-channel head corresponding to the number of tracks on the disk 11, and this was fixed to set the channels. An embodiment will be described with reference to FIG. 11 in which it is possible to determine whether a recorded track has been recorded or to record to an unrecorded track at the end of each track by sequentially switching the tracks. Incidentally, FIG. 11 only shows the configuration of the main parts for obtaining the above functions, and other necessary parts will be explained with reference to the configuration of FIG. 10.

In the figure, CNT is a counter with a built-in decoder for channel shift, and its clear terminal CL is configured to receive the output of the one-shot pulse circuit O8P. IV is an inverter for obtaining an inverted signal of the output of the one-shot pulse circuit O8P, OC is a one-shot circuit triggered by the rising edge of the output of the inverter IV5, and OG is the one-shot circuit. An OR gate configured to receive both the output of OC and the Q output of AND gate AG, and the output of OR gate oG4 is attached to the clock input terminal CK of counter CNT3 as a count up clock. It is done as it is given.

15, ~15. are fixedly provided so as to correspond to each track of the disk 11, and a recording head for detecting and recording recorded tracks.These have a so-called multi-channel l\rad configuration, and the ASW-, ~ASW
- indicates each head 15□ to 15. Both are connected to the input stage of the recorded track detection circuit, that is, the amplifier AP. ASW
1 to ASWo are heads 151 to 15.1, respectively. ．． These analog switches are connected to the output stage of the imaging/video signal generation/magnetic recording system circuit 69. AND, ~AND, respectively, are the A output of the counter CNT selected by the switch SW3 or the output of the AND gate AG, and the counter CN
This is an AND gate that performs AND with each output 1 to n of T3, and each output is connected to an analog gate ASW, ~
ASW. In addition, analog switch ASW
-, ~ASW-, the output 1- of the counter CNT, respectively.
n is given.

According to the above configuration, first, at the first stage of release, when a one-shot pulse is output from the one-shot pulse circuit O8P as shown in FIG. 9(g), the counter CNT, A power amplifier clear is applied to the output signal 1, and its outputs 1 to n all become low. Next, when the one-shot circuit OC is triggered by the rising edge of the output of the inverter IV5 at this time and outputs a one-shot pulse, the counter CNT counts up by one and first outputs it. 1 becomes high. Therefore,
Now, when the mode is set to "C1" or "C2" and the output of the counter CNT1 is low, only the analog switch ASW- is turned on and the detection head 15. The output of is given to amplifier AP. And head 15.・The first where 152 is in contact
If the track is not recorded, the counter C is set as described above.
Since the output of NT becomes high, AND gates A and N
The output of D becomes high, and therefore the recording head 15
．． Accordingly, recording is performed on the first track. After this recording is completed, the detection head 15. When it is detected that has already been recorded, the Q output of the AND gate AG becomes high in the same way as described above, so the counter CNT counts up by one and output 2 goes high this time. Therefore, now the analog switch ASW
-, is turned on, the second
It is detected whether the track is unrecorded or not, and if it is unrecorded, recording of the second track is performed by the recording head 152 when the output of the counter CNT becomes high in the same way as described above. become. Also, if it has already been recorded, the Q output of the AND gate A G s becomes high, so the counter CNT counts up by one and its output 3 becomes high, so that the third track is The above-mentioned detection is performed on the
In this case, as in the above-mentioned embodiment, as long as the release button 34 is held down, recording to the unrecorded track will be repeated.

In addition, when the mode is rSJ, after the recording to the unrecorded track is completed, the Q output of the AND gate AC becomes high, and the counter CNT is counted up by one, and the flip The camera stops operating depending on the tilt of the flop FF, and when the release button 34 is released and then pressed again, the detection head 15
The detection heads 151 to 15 . When channel switching is performed and an unrecorded track is detected, recording is performed using the recording head corresponding to this track.

Note that the counter CNT selected by the switch SW3
The inverted signal from the inverter IV of the A output or the output of AG or AC of , is ANDed with each output 1 to n of the counter CNT.
〜AND″, is input to the AND gate AND −,
~AND-, each output is connected to an analog switch ASW.
', ~ASVtM,.

According to the configuration shown in FIG. 11, no mechanical configuration for head shifting as shown in FIG. 2 is required. Moreover, when adopting this configuration, rAJ −rM
Structure for J switching, i.e. slide 37 and button 38 and switches SWM, SW2 and S
It would be inconvenient to have a WP. Incidentally, in this case, if the lamp L a 3 is connected to the collector of the transistor Trs, the count up of the counter CNT, that is, the channel switching of the heads 151 to 151 will be controlled. will be displayed.

In order to display the number of recorded tracks when the configuration shown in FIG. 11 is adopted, for example, as shown in each figure, a display unit (DU) consisting of a decoder driver and a seven-segment LED for display is provided. Then, the outputs 1 to n of the counter CNT3 are sent to the decoder in the display unit DU.
It would be better to display it digitally by adding
It would be better to display the number of dots using an ED dot array display. Particularly in this case, it is convenient to do this within the display camera/finder.

Further, as a configuration for controlling the end switch SWE, for example, the counter CNT.

As shown in the figure, the base of a transistor TR, which has an electromagnet Mg connected to its collector side, is connected to the n+1 output terminal of the transistor TR, and when this n+1 output becomes high, the electromagnet Mg is energized, and this Depending on the end switch S
It would be a good idea to leave WE open.

Incidentally, in the embodiment, the imaging-video signal generation-magnetic recording system circuit employed in the apparatus of the present invention has a configuration in which a CCD image sensor is used as the imaging element. It goes without saying that there is no problem in using conventional image tubes such as videocon. As for the recording medium, although a magnetic disk is shown in the embodiment, other magnetic drums or the like can be easily used by making slight modifications to the mechanism of the camera CA.

In the embodiment described above, the amplifier AP, the signal integration circuit HIC, and the comparator C are used as detection means for detecting the presence or absence of recording at the recording/reproducing position from the reproduction output of the recording/reproducing head.
The circuit shown in FIG. 5 was used as a recording circuit for supplying an image signal to the recording/reproducing head for image recording, and the switch ASW was used as a means for connecting the recording/reproducing head to the recording circuit.

Further, during image recording, the connecting means is controlled by the output of the detecting means, and when the presence of recording is detected, the flip control means prohibits image recording by the recording/reproducing head regardless of the recording mode.・Flop F
F2, counter CNT1, gate AGI, AG5. AG
6. The inverter was set to IV4.

[Effects of the Invention] As explained above, according to the present invention, when the presence of recording is detected by the detection means that detects the presence or absence of recording from the playback output of the recording/playback head during image recording, image recording is performed. Since double recording is prohibited, double recording can be reliably prohibited if the part of the recording medium that is intended to be recorded is already recorded.

[Brief explanation of the drawing]

FIG. 1 is a transparent perspective view of the main parts of a camera incorporating an embodiment of the device of the present invention, FIG. 2 is a sectional view taken along the line ■-■ in FIG.
Fig. 4 is a plan view of the main parts showing the related structure of the mode select dial and mode select slide shown in Fig. 3; Fig. 5 is a plan view of the main part of the device of the present invention FIG. 6 is a block circuit diagram showing the basic configuration of an example of an applicable imaging-video signal generation-magnetic recording system circuit; FIG. The figure is a transparent perspective view of the main part showing the configuration for displaying the number of recorded tracks, suitable for the circuit shown in No. 10, and FIG. 8 is the counter for outputting the recording control signal in the circuit shown in No. 10. FIG. 9 is a timing chart showing the relationship between the output signal and the input signal, FIG. 9 is a timing chart showing the output relationship of the main circuit section of the circuit shown in FIG. First configuration of the electric circuit system in the device of the present invention
FIG. 11 is a circuit diagram showing a modified example of the circuit shown in FIG. 10, particularly the configuration of the main part related to the change. 11... Recording body (magnetic disk), 11c... Recording unit in which the recording track is revised, 15-
15", ~15'...Detection and recording means (detection/recording head), Pi...Means for mechanically shifting the head 15', CNT,...Means for switching channels of the multi-channel head, AG ,,FF,,AG,,FF,... Components of double recording prohibition means.

Claims (1)

[Scope of Claims] Recording means for recording image signals for each screen on a recording body, a driving means for relatively rotating the recording body and the recording means during recording, an operation section, and operation of the operation section. a first control means for controlling the recording means to perform recording after operating the driving means in accordance with the above; a generating means for generating a recordable signal after the interlocking means is in a rotational state in which recording is possible; Until the enabling signal is generated, the recording means is prevented from recording regardless of the operation, and when the operation is canceled during the recording operation of the recording means, the image signal for one screen being recorded is blocked. An image recording apparatus comprising: a second control means that continues to rotate the driving means until recording is completed, and then stops the rotational driving.