JPH0316739U - - Google Patents
Info
- Publication number
- JPH0316739U JPH0316739U JP7551789U JP7551789U JPH0316739U JP H0316739 U JPH0316739 U JP H0316739U JP 7551789 U JP7551789 U JP 7551789U JP 7551789 U JP7551789 U JP 7551789U JP H0316739 U JPH0316739 U JP H0316739U
- Authority
- JP
- Japan
- Prior art keywords
- clock pulse
- output
- pll circuit
- output frequency
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7551789U JPH0316739U (sl) | 1989-06-29 | 1989-06-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7551789U JPH0316739U (sl) | 1989-06-29 | 1989-06-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0316739U true JPH0316739U (sl) | 1991-02-19 |
Family
ID=31616161
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7551789U Pending JPH0316739U (sl) | 1989-06-29 | 1989-06-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0316739U (sl) |
-
1989
- 1989-06-29 JP JP7551789U patent/JPH0316739U/ja active Pending
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