JPH03158255A - Thermal head device - Google Patents

Thermal head device

Info

Publication number
JPH03158255A
JPH03158255A JP29703189A JP29703189A JPH03158255A JP H03158255 A JPH03158255 A JP H03158255A JP 29703189 A JP29703189 A JP 29703189A JP 29703189 A JP29703189 A JP 29703189A JP H03158255 A JPH03158255 A JP H03158255A
Authority
JP
Japan
Prior art keywords
chip
fpc
pattern
conductive part
insulating part
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29703189A
Other languages
Japanese (ja)
Inventor
Hitoshi Furuhata
整 古幡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP29703189A priority Critical patent/JPH03158255A/en
Publication of JPH03158255A publication Critical patent/JPH03158255A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits

Abstract

PURPOSE:To obtain a thermal head with higher density by a method wherein on an FPC, intervals for an insulating parts are set wider than those for a conductive part by a designated dimensional difference, whereas on a chip, intervals for a pattern width of the conductive part are set wider than those for the insulating part with a same dimensional difference for the pattern on the FPC. CONSTITUTION:On a chip 1, a common electrode 3 which is connected to all of respective heating elements and individual electrodes 4 which are individually connected to respective heating elements jointly exist. Also on an FPC side, the same common electrode and individual electrodes exist. On this chip 1, (p) shows a pattern pitch for a conductive part 1b and insulating part 1a, (b) shows a pattern width for the conductive part 1b, and (a) shows a pattern width for the insulating part 1a. In addition, on the FPC 2, (p) is a pattern pitch for a conductive part 2b and insulating part 2a just as on the chip 1, (a) is a pattern width for the conductive part 2b and (b) is a pattern width for the insulating part 2a. In this case, (a) and (b) have a relationship as a>b. By this method, it becomes possible to discriminate a good or bad condition of the actual fitting by existence of protrusion of the conductive part of the chip from the insulating part of the FPC on an interval which has a width of (b).

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、サーマルプリンタの、特にシリアル型のサー
マルプリンタに於いて、サーマルヘッド上置上の、チッ
プとFPCの接続部に於ける、導通部と絶縁部とのパタ
ーンのピッチ寸法に関する。
Detailed Description of the Invention [Industrial Application Field] The present invention relates to a thermal printer, particularly a serial type thermal printer, in which electrical conduction is achieved at the connection between a chip and an FPC above a thermal head. This relates to the pitch dimension of the pattern between the section and the insulating section.

〔従来の技術〕[Conventional technology]

従来から、サーマルプリンタに於いては、第4図に示す
ように、チップとFPCとを半田等を用いて接続を行な
っていた。
Conventionally, in thermal printers, chips and FPCs have been connected using solder or the like, as shown in FIG.

しかしながら、これらは第4図に示すように、サーマル
ヘッド上の発熱体素子が7〜9¥ツト、或は高々24ド
ツトと少ない発熱体数であった為、チップ側の導通部と
絶縁部のとのパターンピッチ及びFPC上の導通部と絶
縁部とのパターンピッチはと全く同一であり、チップと
FPCとのパターンの寸法関係については殆ど考慮され
ていなかった。
However, as shown in Fig. 4, the number of heating elements on the thermal head was small, 7 to 9 yen, or 24 dots at most, so the number of heating elements on the chip side was small, and the number of heating elements was small. The pattern pitch between the conductive part and the insulating part on the FPC is exactly the same as that of the FPC, and little consideration has been given to the dimensional relationship between the chip and the FPC pattern.

或は、第5図に示すように、近年のサーマルヘッドに対
する、多ドツト化及び高密度化の要求に対してはチップ
、上にICを配したチップONタイプ等の技術が用いら
れる事が多く、FPCとチップの接続技術には殆ど注目
されていなかった。
Alternatively, as shown in Figure 5, in response to the recent demands for a higher number of dots and higher density for thermal heads, technologies such as a chip-ON type, in which an IC is placed on top of the chip, are often used. , little attention was paid to the connection technology between FPC and chips.

従って、FPCとチップとは、かなりラフな方法で実装
が行なわれていた。
Therefore, the FPC and the chip have been mounted using a fairly rough method.

〔発明が解決しようとする課題及び目的〕然るに、サー
マルヘッドが24ドツト以上、48.56.64ドツト
、と多ドツト化が進む中で、第5図に示すような、チッ
プONタイプでは、特にワープロ用プリンタ等の、コス
ト優先型プリンタ市場に用いられることの多い、シリア
ル型サーマルプリンタの場合、チップ上にICを配する
ことは、コストに最も影響を与えるチップサイズの拡大
につながり、シリアル型サーマルプリンタには適さない
ものであった。
[Problems and Objectives to be Solved by the Invention] However, as the number of dots in the thermal head is increasing from 24 dots or more to 48,56,64 dots, the chip ON type as shown in FIG. In the case of serial type thermal printers, which are often used in the cost-oriented printer market such as word processor printers, placing an IC on the chip leads to an increase in the chip size, which has the biggest impact on cost, It was not suitable for thermal printers.

又、多ドツト化、高密度化に対応する為には、第4図に
示すような24ドツトタイプのシリアル型サーマルヘッ
ドを例に取ると、24ドツトから48ドツトの多ドツト
化するために、それまでのFPC及びチッ、プの導通部
と絶縁部とのパターンピッチを保持するならば、チップ
サイズ及びFPCのサイズを従来の2倍にする必要があ
り、高密度でありかつ多ドツトの安価なサーマルシリア
ルプリンタを供給するためには、是非ともチップとFP
C上の電極のパターンピッチ寸法について、高密度化を
追求する必要があった。
Moreover, in order to cope with the increase in the number of dots and the increase in density, taking the 24-dot type serial type thermal head as shown in Fig. 4 as an example, in order to increase the number of dots from 24 dots to 48 dots, it is necessary to increase the number of dots. In order to maintain the pattern pitch between the conductive part and the insulating part of FPC and chip up to In order to supply thermal serial printers, we must provide chips and FPs.
Regarding the pattern pitch dimension of the electrodes on C, it was necessary to pursue higher density.

又、従来のサーマルヘッド装置に於けるチップとFPC
間での、実装時の個別電極に於ける導通部と絶縁部との
パターンピッチ関係は、第3図(C)に示す様にパター
ンピッチ間隔をpとすると、導通部と絶縁部のパターン
幅はp/2とするのが一般的であり、24ドツト以下の
へラドチップに於いては殆ど用いられてきた、導通部と
絶縁部とのパターンピッチの寸法関係であった。
Also, the chip and FPC in the conventional thermal head device
The relationship between the pattern pitch between the conductive part and the insulating part of the individual electrode during mounting is as shown in Figure 3 (C), where p is the pattern pitch interval, and the pattern width of the conductive part and the insulating part. is generally set to p/2, which is the dimensional relationship of the pattern pitch between the conductive part and the insulating part, which has been used in most Herad chips of 24 dots or less.

しかしながら、この寸法関係を用いて48ドツト以上の
高密度実装を行うならば、この第3図(C)に示す様な
、導通部と絶縁部とのパターンピッチがp/2と同一の
値であり、パターンピッチpの半分である場合、理論的
には完全に双方のピッチを合わせた。実装が可能である
However, if high-density mounting of 48 dots or more is performed using this dimensional relationship, the pattern pitch between the conductive part and the insulating part will be the same value as p/2, as shown in Figure 3 (C). If the pattern pitch is half the pattern pitch p, theoretically both pitches are perfectly aligned. Implementation is possible.

しかしながら、現実の実装時には殆どの場合、パターン
ピッチずれが生じ、高密度実装であればあるほど、特徴
的な不良状態発見法が無いため、目視等による、簡単な
不良箇所の発見が非常に難しいという欠点があった。
However, during actual mounting, pattern pitch deviations occur in most cases, and the higher the density of mounting, the more difficult it is to discover simple defective locations by visual inspection, etc., as there is no characteristic method for detecting defective states. There was a drawback.

本発明は、サーマルシリアルプリンタが市場より求めら
れている、高密度、多ドツト化による高印字品質を実現
すると同時に、低コスト化も実現したいという市場の要
求に答えられる、ナーマルヘッド装置を提供することに
ある。
An object of the present invention is to provide a thermal head device that can meet the market demand for thermal serial printers that achieve high printing quality due to high density and multi-dot printing, and at the same time reduce costs. It is in.

〔課Uを解決するための手段〕[Means for solving Section U]

本発明は、複数の発熱体素子をチップの端面近傍に沿っ
て配置し、サーマル紙、又はインクリボンを介して、印
字用紙に印字を行なうサーマルプリンタ装置に於て、前
記チップと該チップ上の任意の発熱体素子に電力を供給
し、印字を可能とする、プリンタ制、a基板との導通を
仲介するFPCとの接続部にある、FPC上及びチップ
上に形成されている導通部と絶縁部とから成る電極パタ
ーンに於て、FPC上では、絶縁部が一定の寸法差で導
通部より間隔が広く設定されており、チップ上に於いて
は、逆に導通部のパターン幅が絶縁部よりFPC上のパ
ターンと同様の寸法差で間隔が広く設定されていること
を、特徴とするサーマルヘッド装置である。
The present invention provides a thermal printer device in which a plurality of heating elements are arranged near the end face of a chip and prints on printing paper via thermal paper or an ink ribbon. Insulates the conductive parts formed on the FPC and chip at the connection part with the FPC, which mediates conduction with the printer system and the a-board, which supplies power to any heating element and enables printing. In an electrode pattern consisting of two parts, on an FPC, the insulating part is set wider than the conductive part by a certain dimensional difference; on the other hand, on a chip, the pattern width of the conductive part is wider than the insulating part. This thermal head device is characterized in that the spacing is set wider with a dimensional difference similar to that of the pattern on the FPC.

〔実施例〕〔Example〕

以下に本発明による実施例を、詳述する。 Examples according to the present invention will be described in detail below.

第1図は48ドツト、 ドツトピッチ300DP工のサ
ーマルヘッドをFPCに接続した、サーマルヘッド装置
の実装の実施例であり、1はサーマルヘッドチップ、2
はFPCである。
Figure 1 shows an example of mounting a thermal head device in which a 48-dot thermal head with a dot pitch of 300 DP is connected to an FPC.
is FPC.

ここで、FPC2は、ヘッド制御基板(図示せず)とチ
ップとを接続しチップ上の任意の発熱素子(図示せず)
に電力を供給し印字を可能にしている。
Here, the FPC 2 connects the head control board (not shown) and the chip, and connects any heating element (not shown) on the chip.
It supplies electricity to enable printing.

第2図は、不1図のへラドチップ1及びFPCの拡大図
であり、チップ1には、個々の発熱体素子全てに導通し
ている、共通電極部3と、個々の発熱体素子と個別に導
通している個別電極部4が存在し、FPC側にも同様の
共通電極部及び個別電極が存在している。
FIG. 2 is an enlarged view of the Herad chip 1 and FPC shown in FIG. There is an individual electrode section 4 that is electrically connected to the FPC side, and a similar common electrode section and individual electrodes are also present on the FPC side.

本発明は、第1図の実装部中、第2図の個別電極部中の
FPC及びチップの絶縁部と導通部との間のパターンピ
ッチに関係し詳細を第3図(a)1:示す。
The present invention relates to the pattern pitch between the insulating part and the conductive part of the FPC and chip in the mounting part of FIG. 1 and the individual electrode part of FIG. 2, and the details are shown in FIG. 3(a) 1: .

第3図(a)に於て1aは絶縁部、1bは導通部を、同
様に2aは絶縁部、2bは導通部を表はす。
In FIG. 3(a), 1a represents an insulating portion, 1b represents a conductive portion, and similarly, 2a represents an insulating portion and 2b represents a conductive portion.

このチップ1に於て、pは導通部と絶縁部のパターンピ
ッチ、bは導通部のパターン幅、aは絶縁部のパターン
幅を示す。
In this chip 1, p represents the pattern pitch between the conductive part and the insulating part, b represents the pattern width of the conductive part, and a represents the pattern width of the insulating part.

さらにFPC上に於いて、pはチップ上と同様に導通部
と絶縁部のパターンピッチであり、aは導通部のパター
ン幅、bは絶縁部のパターン幅である。
Furthermore, on the FPC, p is the pattern pitch between the conductive part and the insulating part, as on the chip, a is the pattern width of the conductive part, and b is the pattern width of the insulating part.

このときal、bはa>bなる関係を、持っている。At this time, al and b have the relationship a>b.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、第3図(a)に示すような個別電極部
のチップ上の導通部の幅がす、これと1対1に対応する
FPC上の導通部の幅がaであり、FPC上の導通部の
幅が広い。
According to the present invention, the width of the conductive part on the chip of the individual electrode part as shown in FIG. The width of the conductive part on the FPC is wide.

従って、実装を行なう際には、FPCが上側、チップが
下側となるため、FPCの絶縁部より幅すなる隙間上で
の、チップの導通部のはみ出しの有無によって、実装の
善し悪しを判断することが可能となる。
Therefore, when mounting, the FPC is on the top side and the chip is on the bottom side, so the quality of the mounting is determined by whether or not the conductive part of the chip protrudes over the gap that is wider than the insulation part of the FPC. becomes possible.

つまり、本実施例の場合、パターンピッチがa+b=p
と設定されているため、チップ上の各パターンにおいて
、絶縁部のパターン幅が狭い分だけFPCとチップの実
装位置がずれても、FPC上からは、パターンの位置す
れと確認されない。
In other words, in the case of this embodiment, the pattern pitch is a+b=p
Therefore, in each pattern on the chip, even if the mounting position of the FPC and the chip deviates by the narrowness of the pattern width of the insulating part, it will not be confirmed from the FPC that the pattern position is misaligned.

従って、FPC上から、チップの導通部が見通せなけれ
ば、良好な実装と確認が出来るものである。
Therefore, if the conductive part of the chip cannot be seen from above the FPC, it is possible to confirm that the chip is mounted properly.

ところが、第3図(b)に示すように、第3図(a)と
異なり、FPCとチップとの導通部の大小関係が逆転し
た場合には、実装時にはFPC側から、チップを見るこ
ととなるため、常にFPCの側にチップの導通部の端面
が見え、FPC上に見えなくなった場合が異常である。
However, as shown in Figure 3(b), unlike in Figure 3(a), if the magnitude relationship of the conductive parts between the FPC and the chip is reversed, it is difficult to view the chip from the FPC side during mounting. Therefore, the end face of the conductive part of the chip is always visible on the FPC side, and it is abnormal if it is no longer visible on the FPC.

この識別方法は、第3図(a)の、異常時には何かが見
えるというものと逆であり実装不良発見が非常に難しく
なる。
This identification method is the opposite of the method shown in FIG. 3(a) in which something is visible in the event of an abnormality, and it becomes extremely difficult to detect mounting defects.

この様に、第3図(a)に示す様なチップとFPCの導
通部と絶縁部とのパターンピッチの寸法関係が実現され
れば、サーマルシリアルヘッドの高密度で安価な供給が
可能となる。
In this way, if the dimensional relationship of the pattern pitch between the conductive part and the insulating part of the chip and FPC as shown in Figure 3(a) is realized, it will be possible to supply thermal serial heads at high density and at low cost. .

本発明によれば、従来至難であった、パターンピッチ1
70ミクロン、パターン振り分け80ミクロン及び90
ミクロン程度の設定でサーマルヘッドとFPCの実装が
可能である。
According to the present invention, pattern pitch 1, which was extremely difficult in the past,
70 micron, pattern distribution 80 micron and 90
It is possible to mount a thermal head and FPC with settings on the order of microns.

又、今後の技術展開では、本発明の方式によればパター
ンピッチ100ミクロン、パターン振り分け55ミクロ
、ン、45ミクロン程度の実装を実現することが可能で
ある
In addition, in future technological development, according to the method of the present invention, it will be possible to realize mounting with a pattern pitch of 100 microns and a pattern distribution of about 55 microns or 45 microns.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を用いてサーマルヘッドとFPCとを実
装した外形図である。 第2図は第1図に示したサーマルヘッドチップとFPC
の拡大図である。 第3図はチップとFPCとの個別電極部に於ける、絶縁
部と導通部とのパターンピッチの寸法関係を表わした図
であり、 第3図(a)は本発明の実施例であり、第3図(b)は
本発明の実施例とは異なるパターンビッチ関係を持った
場合のパターンピッチ関係を示し、第3図(C)は従来
と同様の絶縁部と導通部とが同一のパターン幅を持った
場合のパターンピッチ関係を示す。 第4図は24ドツトタイプのへラドチップを実装した外
形図である。 第5図はチップONタイプのへラドチップを実装した場
合の外形図である。  a b  a  b サーマルヘッドチップ 絶縁部 導通部 PC 絶縁部 導通部 共通電極部 個別電極部 ドライバーIC 以上 第 図 (a) 第3図 5、・ド゛ラヂ/に−IC 第5図
FIG. 1 is an outline diagram of a thermal head and an FPC mounted using the present invention. Figure 2 shows the thermal head chip and FPC shown in Figure 1.
It is an enlarged view of. FIG. 3 is a diagram showing the pattern pitch dimension relationship between the insulating part and the conductive part in the individual electrode parts of the chip and the FPC, and FIG. 3(a) shows an embodiment of the present invention. FIG. 3(b) shows the pattern pitch relationship when the pattern pitch relationship is different from that in the embodiment of the present invention, and FIG. 3(C) shows the pattern pitch relationship when the insulating part and the conductive part are the same as in the conventional example. This shows the pattern pitch relationship when there is a width. FIG. 4 is an outline drawing of a 24-dot type Herad chip mounted thereon. FIG. 5 is an outline drawing when a chip-ON type Herad chip is mounted. a b a b Thermal head chip insulation part conduction part PC insulation part conduction part common electrode part individual electrode part driver IC Figure 3 (a)

Claims (1)

【特許請求の範囲】 1)複数の発熱体素子をサーマルヘッドチップ(以下チ
ップと記す)の端面近傍に沿って配置し、サーマル紙、
又はインクリボンを介して、印字用紙に印字を行なうサ
ーマルプリンタ装置に於て、前記チップと該チップ上の
任意の発熱体素子に電力を供給し、印字を可能とする、
プリンタ制御基板との導通を仲介するフレキシブルプリ
ント基板(以下FPCと記す)との接続部にある、FP
C上及びチップ上に形成されている、導通部と絶縁部と
から成る電極パターンに於て、FPC上では、絶縁部が
一定の寸法差で導通部より間隔が広く設定されており、
チップ上に於いては、逆に導通部のパターン幅が絶縁部
よりFPC上のパターンと同様の寸法差で間隔が広く設
定されていることを、特徴とするサーマルヘッド装置。 2)FPC及びチップの電極パターンに於いて、導通部
と絶縁部のとのパターンピッチが同一である事を特徴と
する、請求項1記載のサーマルヘッド装置。
[Claims] 1) A plurality of heating element elements are arranged near the end surface of a thermal head chip (hereinafter referred to as a chip), and thermal paper,
Alternatively, in a thermal printer device that prints on printing paper via an ink ribbon, power is supplied to the chip and any heating element on the chip to enable printing.
FP located at the connection part with the flexible printed circuit board (hereinafter referred to as FPC) that mediates the conduction with the printer control board.
In the electrode pattern formed on the C and the chip, which consists of a conductive part and an insulating part, on the FPC, the insulating part is set to have a wider interval than the conductive part with a certain dimensional difference,
On the other hand, the thermal head device is characterized in that, on the chip, the pattern width of the conductive part is set wider than the insulating part with a dimensional difference similar to that of the pattern on the FPC. 2) The thermal head device according to claim 1, wherein in the electrode patterns of the FPC and the chip, the pattern pitch of the conductive part and the insulating part is the same.
JP29703189A 1989-11-15 1989-11-15 Thermal head device Pending JPH03158255A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29703189A JPH03158255A (en) 1989-11-15 1989-11-15 Thermal head device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29703189A JPH03158255A (en) 1989-11-15 1989-11-15 Thermal head device

Publications (1)

Publication Number Publication Date
JPH03158255A true JPH03158255A (en) 1991-07-08

Family

ID=17841330

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29703189A Pending JPH03158255A (en) 1989-11-15 1989-11-15 Thermal head device

Country Status (1)

Country Link
JP (1) JPH03158255A (en)

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