JPH03155523A - Common driver circuit - Google Patents

Common driver circuit

Info

Publication number
JPH03155523A
JPH03155523A JP2215496A JP21549690A JPH03155523A JP H03155523 A JPH03155523 A JP H03155523A JP 2215496 A JP2215496 A JP 2215496A JP 21549690 A JP21549690 A JP 21549690A JP H03155523 A JPH03155523 A JP H03155523A
Authority
JP
Japan
Prior art keywords
output
bias
common
circuit
buffer amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2215496A
Other languages
Japanese (ja)
Other versions
JP2587526B2 (en
Inventor
Takeshi Shibata
健 柴田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to AU61324/90A priority Critical patent/AU623802B2/en
Priority to KR1019900013281A priority patent/KR930011105B1/en
Priority to MYPI90001494A priority patent/MY109311A/en
Priority to EP90309583A priority patent/EP0428250B1/en
Priority to ES90309583T priority patent/ES2078316T3/en
Priority to CN90107443A priority patent/CN1021605C/en
Publication of JPH03155523A publication Critical patent/JPH03155523A/en
Priority to US07/851,257 priority patent/US5283477A/en
Application granted granted Critical
Publication of JP2587526B2 publication Critical patent/JP2587526B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • G09G3/3655Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Power Engineering (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Liquid Crystal (AREA)

Abstract

PURPOSE:To supply common output to which a stable bias is supplied by holding a preset common bias by using the detection output of DC level of an output circuit. CONSTITUTION:A control part 12 connected to a buffer amplifier 11 supplies a preset value set at an amplitude variable volume 13 to the buffer amplifier 11, and also, compares the bias set at a bias variable volume 14 wit a DC level fed back from an output circuit side with a comparator, and varies the bias with comparison output, and supplies it to the buffer amplifier 11. The output of an operational amplifier 15 connected to the buffer amplifier 11 is connected to transistors Q1, Q2 for buffer so as to sufficiently drive a load with heavy capacitance, and is voltage-fed back from its output point a to a (-) input terminal. Meanwhile, the output of a low-pass filter 16 consisting of a resistor R1 and a capacitor C1 is supplied to the control part 12 via a feedback circuit 17. Thereby, the fluctuation of a DC component applying an adverse effect to signal processing is suppressed, which improves reliability.

Description

【発明の詳細な説明】 良業上葛剋里立野 本発明は液晶パネルのコモン電極等の如き容量性の重い
負荷を駆動するコモンドライバー回路に関するものであ
る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a common driver circuit for driving a heavy capacitive load such as a common electrode of a liquid crystal panel.

従来の技庸 従来の新種液晶表示装置に組み込んだコモンドライバー
回路は第6図に示すようにコモン振幅信号(フレームパ
ルスXFP)が入力されるバッファ増幅器(1)に可変
抵抗器(2)によるバイアスを付与し、このバイアスを
調整することによってコモン振幅信号の振幅を調整して
いた。そして、バッファ増幅器(1)の出力は直流カッ
ト用コンデンサ(C、)で直流成分が除かれ、新たに可
変抵抗器(3)によってコモンバイアスが与えられるよ
うになっていた。而して、液晶パネルのコモン電極には
前記コモン振幅信号(FP)と可変抵抗器(3)による
コモンバイアスが与えられる。
Conventional technique As shown in Figure 6, the common driver circuit incorporated in a conventional new type of liquid crystal display device biases the buffer amplifier (1) to which the common amplitude signal (frame pulse XFP) is input using a variable resistor (2). The amplitude of the common amplitude signal was adjusted by applying this bias and adjusting this bias. Then, the DC component of the output of the buffer amplifier (1) is removed by a DC cut capacitor (C), and a common bias is newly applied by a variable resistor (3). A common bias is applied to the common electrode of the liquid crystal panel by the common amplitude signal (FP) and the variable resistor (3).

発明が解決しようとする課題 ところで、上述のように従来例ではコモンバイアスが加
えられた振幅信号を得るためにバッファ増幅器(りから
の出力のうち直流成分をコンデンサ(Cυでカットしな
ければならなかった。このため、コモンをフィールドご
とに切り換えるにはコンデンサ(C1)として大容量の
コンデンサが必要であった。また、可変抵抗器(3)に
印加される電源電圧Vcc、−Veeにコモンバイアス
が依存するため、これらの電源電圧が変動すると、コモ
ンバイアスも変動し、液晶パネルに悪影響を与えること
になる。
Problems to be Solved by the Invention By the way, as mentioned above, in the conventional example, in order to obtain an amplitude signal to which a common bias is applied, the DC component of the output from the buffer amplifier must be cut with a capacitor (Cυ). Therefore, a large capacitor (C1) was required to switch the common for each field.In addition, a common bias was applied to the power supply voltages Vcc and -Vee applied to the variable resistor (3). Therefore, if these power supply voltages fluctuate, the common bias will also fluctuate, which will have an adverse effect on the liquid crystal panel.

第2図に示すように、従来コモン出力はフレームパルス
を増幅したのち(C1)で直流分をカットし再び抵抗分
割でバイアスを加えるというやりかたが採用されていた
がコモン出力の振幅は最大8vppまで振られる事があ
り、また、加えられるバイアスによっては、3のバイア
ス調整(VR)に接続されているーVeeがパネルのソ
ース電源電圧と同じ電圧では調整出来ない場合があり、
このため−Veeはさらに低い電圧(−21V)から取
る必要があった。この電圧はパネルのソース電源電圧の
変動とは無関係に変動するため、電源が安定していない
場合パネルに直流が加わってしまうことがある。このバ
イアスを決める電圧をパネルのソース電源電圧と同じ電
源ラインから取ることができれば、ソース電源電圧がた
とえ変動をうけたとしても、3で設定するバイアスも変
動に応じて同方向に変動するためパネルには直流がかか
りにくい欠点があった。また、パネルのスペックにおい
て、ソースドライバーに加わるビデオ信号の中心電圧の
変動とコモンの中心電圧の変動の両方を、信号内容、電
源の変動などの条件においても、押さえる必要があった
。ビデオ信号のほうは、すでに、フィードバックがかけ
られ、安定しているが、コモンのほうは、上記のような
理由により必ずしもスペックが守られているとは限らな
かった。
As shown in Figure 2, the conventional common output method was to amplify the frame pulse, cut the DC component with (C1), and then apply bias again by resistor division, but the amplitude of the common output is limited to a maximum of 8 vpp. Also, depending on the bias applied, it may not be possible to adjust the voltage that is connected to the bias adjustment (VR) in step 3 with the same voltage as the panel's source power supply voltage.
For this reason, it was necessary to take -Vee from an even lower voltage (-21V). This voltage fluctuates independently of fluctuations in the panel's source power supply voltage, so if the power supply is not stable, direct current may be applied to the panel. If the voltage that determines this bias can be taken from the same power supply line as the panel's source power supply voltage, even if the source power supply voltage fluctuates, the bias set in step 3 will also fluctuate in the same direction according to the fluctuation, so the panel had the disadvantage that it was difficult to apply direct current. In addition, in terms of panel specifications, it was necessary to suppress both fluctuations in the center voltage of the video signal applied to the source driver and fluctuations in the center voltage of the common, even under conditions such as signal content and power supply fluctuations. The video signal has already undergone feedback and is stable, but the common specifications have not always been adhered to for the reasons mentioned above.

本発明はこのような点に鑑みなされたものであって、コ
モンバイアスの変動がなく、且つ大容量の直流カット用
コンデンサを不要として。安定したバイアスが与えられ
たコモン出力を供給できるコモンドライバー回路を提供
することを目的とする。
The present invention has been devised in view of these points, and eliminates the need for a large-capacity DC cut capacitor without causing fluctuations in the common bias. The object of the present invention is to provide a common driver circuit that can supply a common output with a stable bias.

課題を解決するための手段 上記の目的を達成するため本発明では、液晶パネル駆動
用のコモンドライバー回路において、容量性負荷を十分
にドライブできるバッファ増幅器又はボルテージフォロ
ワより成る出力回路と、前記出力回路にコモン信号とコ
モンバイアスを供給する手段と、前記コモンバイアスを
設定するバイアス設定手段と、前記出力回路の直流レベ
ルを検出し該検出出力を使って前記バイアス設定手段に
よって設定されたコモンバイアスが常に保持されるよう
になす制御手段と、から成る構成としている。
Means for Solving the Problems In order to achieve the above object, the present invention provides a common driver circuit for driving a liquid crystal panel, which includes an output circuit consisting of a buffer amplifier or a voltage follower capable of sufficiently driving a capacitive load, and the output circuit. means for supplying a common signal and a common bias to a common bias; bias setting means for setting the common bias; detecting a DC level of the output circuit and using the detection output to always maintain the common bias set by the bias setting means; and control means for maintaining the position.

作−四一 このような構成によると、バイアス設定手段からのコモ
ンバイアスが出力回路に与えられ、しかもそのコモンバ
イアスは変動すると、制御手段によってその変動が補償
されるので常に一定に保持されることになる。
According to such a configuration, the common bias from the bias setting means is applied to the output circuit, and if the common bias fluctuates, the fluctuation is compensated for by the control means so that it is always kept constant. become.

叉鬼皿 第1図は、コモンドライバー回路を組み込んだ液晶表示
装置の全体の構成を示すブロック図で、第2図は本発明
の一実施例として示すコモンドライバー回路のブロック
図、第3図は第2図の各ブロックの具体的な回路構成を
示す回路図、第4図は第1図及び第3図の各部における
信号の信号波形図である。
FIG. 1 is a block diagram showing the overall configuration of a liquid crystal display device incorporating a common driver circuit, FIG. 2 is a block diagram of a common driver circuit shown as an embodiment of the present invention, and FIG. FIG. 2 is a circuit diagram showing a specific circuit configuration of each block, and FIG. 4 is a signal waveform diagram of signals in each part of FIGS. 1 and 3.

第1図の液晶表示装置において、TFTアレイ(シン・
フィルム・トランジスタ・アレイ)よりなるLCDパネ
ル40は、ゲートドライバー40a1ソースドライバー
40b1及びコモンドライバー39を備え、かつ液晶パ
ネルコントローラ38よりゲートドライバー40aヘゲ
−トドライバー駆動信号を、ソースドライバー40bへ
ソースドライバー駆動信号を、コモンドライバー39へ
コモン信号作成用信号を夫々入力させる。
In the liquid crystal display device shown in Fig. 1, a TFT array (thin
The LCD panel 40 includes a gate driver 40a, a source driver 40b1, and a common driver 39, and a gate driver drive signal is sent from the liquid crystal panel controller 38 to the gate driver 40a, and the source driver 40b is sent to the source driver 40b. The drive signal and the common signal generation signal are respectively input to the common driver 39.

ビデオ信号は、同期分離回路31及びY/C分離回路3
3に入力される。同期分離回路31で同期分離された同
期信号は、第4図@に示す如くlOMHz以上のサイン
波形で液晶パネルコントローラ38及びクランプパルス
・ジェネレータ32に人力される。Y/C分離回路33
ではビデオ信号を輝度信号とクロス信号に分離し、ビデ
オクロス信号処理回路34に入力される。ビデオクロス
信号処理回路34からR,G、Bの原色信号が出力され
てブライトネス、コントラスト、ガンマ補正回路35に
入力される。クランプパルス・ジエネレ−タ32のクラ
ンプパルスがビデオクロス信号処理回路34とブライト
ネス、コントラスト、ガンマ補正35に入力される。ブ
ライトネス、コントラスト、ガンマ補正回路35の原色
信号R,G、Bは、インバータ回路36で信号処理され
てドライバー回路37からビデオ信号出力としてソース
ドライバー回路40bへ入力される。液晶パネルコント
ローラ38は同期分離回路3tから同期信号を入力する
と共にクロックパルスckを入力して、パネルのコント
ロール信号としてゲートドライバ駆動信号及びソースド
ライバー駆動信号を出力すると同時に、信号に同期した
フレームパルス(FP)または、反転パルスとして第4
図■に示す如き15MHzの0乃至5■の水平周期信号
としてのコモン信号作成用信号を出力する。液晶パネル
コントローラ38から出力される反転パルスは、インバ
ータ36とコモンドライバー39に人力される。
The video signal is transmitted by a sync separation circuit 31 and a Y/C separation circuit 3.
3 is input. The synchronization signal separated in synchronization by the synchronization separation circuit 31 is inputted to the liquid crystal panel controller 38 and the clamp pulse generator 32 in a sine waveform of 10MHz or higher, as shown in FIG. Y/C separation circuit 33
Then, the video signal is separated into a luminance signal and a cross signal, which are input to a video cross signal processing circuit 34. R, G, and B primary color signals are output from the video cross signal processing circuit 34 and input to the brightness, contrast, and gamma correction circuit 35. A clamp pulse from a clamp pulse generator 32 is input to a video cross signal processing circuit 34 and brightness, contrast, and gamma correction 35. The primary color signals R, G, and B from the brightness, contrast, and gamma correction circuit 35 are processed by an inverter circuit 36, and then input from a driver circuit 37 to a source driver circuit 40b as a video signal output. The liquid crystal panel controller 38 inputs the synchronization signal from the synchronization separation circuit 3t and the clock pulse ck, and outputs a gate driver drive signal and a source driver drive signal as panel control signals, and at the same time outputs a frame pulse (synchronized with the signal). FP) or the fourth pulse as an inverted pulse.
A signal for creating a common signal as a horizontal periodic signal of 15 MHz from 0 to 5 (2) as shown in Figure (2) is output. The inverted pulse outputted from the liquid crystal panel controller 38 is manually applied to the inverter 36 and the common driver 39.

コモンドライバー39に入力された反転パルスとしての
第4図■に示す如き0乃至5VのDCレベルを持つ15
KHzの水平周期信号は、第2図に示す端子!0からコ
モン振幅信号としてバッファ増幅器11に入力される。
15 having a DC level of 0 to 5V as shown in FIG.
The KHz horizontal periodic signal is sent to the terminal shown in Figure 2! 0 to the buffer amplifier 11 as a common amplitude signal.

このバッファ増幅器(11)にはバイアス、振幅をコン
トロールするコントロール部(12)が接続されている
。このコントロール部(12)は振幅可変ボリウム(I
3)で設定した設定値をバッファ増幅器(11)に与え
ると共に、バイアス可変ボリウム(14)で設定したバ
イアスを出力回路側から帰還した直流レベルと比較器で
比較し、その比較出力によってバイアスを可変してバッ
ファ増幅器(11)へ与える。バッファ増幅器(11)
に接続した演算増幅器(15)は、その(+)入力端子
に前記バッファ増幅器(!l)からの出力が第4図■に
示す如き一4vをセンターバイアスとする一1v乃至−
7vのDCレベルを持つパルス信号として供給され、か
つ演算増幅器(15)の出力は、容量性の重い負荷を十
分にドライブできるようにバッファ用トランジスタ(Q
υ(Q、)が図示の如く接続されており、その出力点(
a)から(=)入力端子に電圧帰還されている。これに
より演算増幅器(15)とバッファ増幅器(Qυ(Q、
)はボルテージフォロワ18を構成する。このボルテー
ジフォロワは出力回路(18)を成しており、出力点(
a)は液晶パネルのコモン電極に接続されて第4図■に
示す如き一4■をセンターバイアスとする一IV乃至一
7VのDCレベルを持つパルス信号として供給されるが
、一方において抵抗(R1)とコンデンサ(C1)から
成るローパスフィルタ(16)にも接続されている。ロ
ーパスフィルタ(]C6の出力は第4図■に示す如き一
4Vの信号としてフィードバック回路(17)を通して
前記コントロール部(12)へ供給される。フィードバ
ック回路(17)は演算増幅器で構成され、そのプラス
入力端子に前記ローパスフィルタ(I6)の出力が印加
され、マイナス入力端子には電源電圧+Vccを1/2
分圧した電圧Vcc/2が印加される。フィードバック
回路(17)の出力は、第4図■に示す如き一4Vの信
号として、コントロール部(12)の一部を構成する第
1.第2の比較器(第3図の20゜21)の一方の入力
端子へ結合される。尚、この比較器の他方の入力端子に
はバイアス可変ボリウム(14)で設定した直流電圧が
与えられる。この比較器の出力は、第4図■に示す如き
DCレベル、振幅ともVR(13)、(14)により変
動させたパルス信号として、前記ローパスフィルタ(1
6)からフィードバック回路(17)を通して与えられ
る直流電圧と前記バイアス可変ボリウム(14)からの
直流電圧が一致するようにバッファ増幅器(11)へ与
えられるバイアスをコントロールする。
A control section (12) for controlling bias and amplitude is connected to this buffer amplifier (11). This control section (12) has a variable amplitude volume (I
The set value set in step 3) is given to the buffer amplifier (11), and the bias set by the bias variable volume (14) is compared with the DC level fed back from the output circuit side using a comparator, and the bias is varied based on the comparison output. and provides it to a buffer amplifier (11). Buffer amplifier (11)
The operational amplifier (15) connected to the (+) input terminal has the output from the buffer amplifier (!l) as shown in FIG.
It is supplied as a pulse signal with a DC level of 7V, and the output of the operational amplifier (15) is connected to a buffer transistor (Q
υ(Q,) are connected as shown in the figure, and its output point (
The voltage is fed back from a) to the (=) input terminal. This results in an operational amplifier (15) and a buffer amplifier (Qυ(Q,
) constitutes a voltage follower 18. This voltage follower constitutes an output circuit (18), and the output point (
a) is connected to the common electrode of the liquid crystal panel and is supplied as a pulse signal having a DC level of 1 IV to 17 V with a center bias of 14 as shown in FIG. ) and a capacitor (C1). The output of the low-pass filter (]C6 is supplied to the control section (12) through the feedback circuit (17) as a 14V signal as shown in FIG. The output of the low-pass filter (I6) is applied to the positive input terminal, and 1/2 of the power supply voltage +Vcc is applied to the negative input terminal.
A divided voltage Vcc/2 is applied. The output of the feedback circuit (17) is a 14V signal as shown in FIG. It is coupled to one input terminal of a second comparator (20.degree. 21 in FIG. 3). Note that the other input terminal of this comparator is supplied with a DC voltage set by a variable bias volume (14). The output of this comparator is a pulse signal whose DC level and amplitude are varied by VRs (13) and (14) as shown in FIG.
The bias applied to the buffer amplifier (11) is controlled so that the DC voltage applied from 6) through the feedback circuit (17) and the DC voltage from the bias variable volume (14) match.

第2図のブロック図は、第3図に示す回路図で具体的に
構成される。バッファ増幅器2は、作動増幅器19と抵
抗R,,R,,R3,R4で構成される。ボルテージフ
ォロワ18は演算増幅器15と一対のバッファ用トラン
ジスタQ、、Q、より構成される。フィードバック回路
17は、作動増幅器17と抵抗R8より構成される。
The block diagram in FIG. 2 is specifically constructed from the circuit diagram shown in FIG. 3. The buffer amplifier 2 is composed of a differential amplifier 19 and resistors R, , R, , R3, and R4. The voltage follower 18 is composed of an operational amplifier 15 and a pair of buffer transistors Q, , Q. The feedback circuit 17 is composed of a differential amplifier 17 and a resistor R8.

ローパスフィルタ回路16は抵抗R7とコンデンサC1
とよりなり、その直流分をフィードバック回路17の作
動増幅器22へ人力する。フィードバック回路17は作
動増幅器22と抵抗R8よりなり、その出力をコントロ
ール部(12)の第1比較器20.及び第2比較器21
へ入力する。コントロール部12は、第1比較器20.
第2比較器21.抵抗R? 、 Rs 、 R@、 R
lo及びコンデンサC3より構成される。第1比較器2
1に接続した振幅可変ボリウム(13)はコントロール
部(12)よりの出力信号の振幅を調整するのもであり
、第2比較器20に接続したバイアス可変ボリウム14
はコントロール1(12)よりの出力信号のセンターバ
イアスを調整するものである。
The low-pass filter circuit 16 includes a resistor R7 and a capacitor C1.
Therefore, the DC component is input to the operational amplifier 22 of the feedback circuit 17. The feedback circuit 17 consists of a differential amplifier 22 and a resistor R8, and its output is sent to the first comparator 20. of the control section (12). and second comparator 21
Enter. The control section 12 includes a first comparator 20.
Second comparator 21. Resistance R? , Rs, R@, R
It consists of LO and capacitor C3. 1st comparator 2
A variable amplitude volumetric volume (13) connected to the second comparator 20 is used to adjust the amplitude of the output signal from the control unit (12), and a variable bias volume volume 14 connected to the second comparator 20 is used to adjust the amplitude of the output signal from the control unit (12).
is for adjusting the center bias of the output signal from control 1 (12).

端子(10)より入力された反転パルスは、回路11で
、(12)のコントロール部からの制御信号により、増
幅(または縮小)されると同時に、バイアスも制御され
る。増幅回路(12)で作られるバイアスの制御信号は
バイアス可変ボリウム(14)で設定した基準レベルと
ローパスフィルタ(16)で作られる信号のレベルとを
フィードバック回路(17)で比較することによって作
り出され、ボルテージフォロワ(18)の出力が常に一
定になるように(11)の増幅器を制御する。コンデン
サC3は、抵抗R6と共に平滑用のものである。
The inverted pulse inputted from the terminal (10) is amplified (or reduced) in the circuit 11 by a control signal from the control section (12), and at the same time, the bias is also controlled. The bias control signal generated by the amplifier circuit (12) is generated by comparing the reference level set by the bias variable volume (14) with the level of the signal generated by the low-pass filter (16) using the feedback circuit (17). , the amplifier (11) is controlled so that the output of the voltage follower (18) is always constant. The capacitor C3 and the resistor R6 are for smoothing.

コモンドライバー39に入力された反転パルスは第3図
の具体的な回路で安定した振幅及びバイアスが設定され
、液晶パネルLCDに加えられるようになる。
The inverted pulse inputted to the common driver 39 is set to have a stable amplitude and bias in the specific circuit shown in FIG. 3, and is then applied to the liquid crystal panel LCD.

本発明にかかるコモンドライバー回路は、第2図に示す
如きブロック回路よりなり、第3図に具体的回路の他に
、その変形例として第5図の回路図の如く構成してもよ
い。第5図に示す回路では、(51)には反転パルスが
入力され、(52)の演算増幅器に入力される。入力さ
れた反転パルスの振幅は、(53)で調整される。(5
2)の出力は(54)のボルテージフォロワに入力され
、コモン出力として取り出される。またコモン出力はR
,7,C,。
The common driver circuit according to the present invention consists of a block circuit as shown in FIG. 2, and in addition to the specific circuit shown in FIG. 3, it may be configured as a modified example as shown in the circuit diagram of FIG. 5. In the circuit shown in FIG. 5, an inverted pulse is input to (51) and is input to the operational amplifier (52). The amplitude of the input inverted pulse is adjusted in (53). (5
The output of 2) is input to the voltage follower (54) and taken out as a common output. Also, the common output is R
,7,C,.

で構成されるローパスフィルタで直流出力として取り出
され、(56)のコンパレータに入力される。
It is taken out as a DC output by a low-pass filter consisting of , and is input to a comparator (56).

(56)では(57)、(58)で設定されたレベルと
前記ローパスフィルタ出力レベルとの比較を行い、コン
パレータ出力はRls、C13のローパスフィルタを経
て、(55)のボルテージフォロワに加えられる。この
出力は第4図■に示す如き直流で、R1?1cltのロ
ーパスフィルタの出力が常に(58)で設定されたレベ
ルになるように(52)に加えられる。第5図のコンデ
ンサCI+は高周波成分のバイパス用(特に高い周波数
を扱う場合)。コンデンサCI3は(56)のコンパレ
ータ出力の平滑、基準電圧((57)の出力)に落とす
ことにより、出力バウンドを押さえる。コンデンサC1
4はノイズに対する保護用のものである。
At (56), the level set at (57) and (58) is compared with the low-pass filter output level, and the comparator output is applied to the voltage follower at (55) through the low-pass filter of Rls and C13. This output is a direct current as shown in FIG. 4, and is added to (52) so that the output of the low-pass filter of R1?1clt is always at the level set at (58). The capacitor CI+ in Figure 5 is for bypassing high frequency components (especially when handling high frequencies). Capacitor CI3 suppresses output bound by smoothing the output of the comparator (56) and lowering it to the reference voltage (output of (57)). Capacitor C1
4 is for protection against noise.

第5図ではコモン出力がR+y、C+tで平滑され(5
6)のコンパレータに入力される。また、(58)のバ
イアス設定VRはVcc、Veeともパネルのソース電
源電圧と同じ電源ラインから取られている。
In Figure 5, the common output is smoothed by R+y, C+t (5
6) is input to the comparator. Further, the bias setting VR (58) is taken from the same power supply line as the source power supply voltage of the panel for both Vcc and Vee.

(58)で設定されるバイアスは、コモン出力のバイア
スを設定するとともに、直流フィードバックの基準電圧
にもなっており、ソース電源電圧の変動にも追従できる
ようになっている。ソース電源電圧が変動した場合、基
準電圧の変動に応じて動くため、パネルに加わる電圧の
変動が小さくなる。
The bias set in (58) not only sets the bias of the common output but also serves as a reference voltage for DC feedback, so that it can also follow fluctuations in the source power supply voltage. When the source power supply voltage fluctuates, it moves in response to fluctuations in the reference voltage, which reduces fluctuations in the voltage applied to the panel.

回路はすべて直結で構成されるため直流カット用コンデ
ンサは必要ない。第5図の変形例は第4図のものと比較
して第4図と同じような効果を上げる上に、振幅調整を
行うのにボリウムで帰還抵抗(53)を可変するので安
定している。
All circuits are directly connected, so there is no need for a DC cut capacitor. The modified example shown in Fig. 5 not only achieves the same effect as Fig. 4 compared to the one shown in Fig. 4, but also is stable because the feedback resistor (53) is varied with a volume control to adjust the amplitude. .

発明の効果 上記実施例に詳記した如く、本発明にかかるコモンドラ
イバー回路では、ボルテージフォロワ。
Effects of the Invention As detailed in the above embodiments, the common driver circuit according to the present invention includes a voltage follower.

ローパスフィルタ、フィードバック、コントロールの各
回路を備えた簡単な回路構成よりなり、この種回路の信
号処理上悪影響を与える直流分の変動が押さえられて信
頼性が向上する。またコモンバイアス付与を出力回路の
前段から行うため、直流をカットする必要がなく、従っ
て大容量の直流カット用コンデンサが不要となる。
It has a simple circuit configuration that includes a low-pass filter, feedback, and control circuits, and improves reliability by suppressing fluctuations in the DC component that adversely affect signal processing in this type of circuit. Furthermore, since the common bias is applied from the front stage of the output circuit, there is no need to cut off direct current, and therefore a large-capacity capacitor for cutting off direct current is not required.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のコモンドライバー回路を組み込んだ液
晶表示装置の全体の構造を示すブロック図、第2図は本
発明にかかるコモンドライバー回路の一実施例の概略の
構成を示すブロック図、第3図は第2図のブロック図の
詳紬な回路の具体的な構成を示す回路図、第4図は第1
図及び第3図の各部において生じる夫々の信号の波形図
、第5図は第3図の回路図の変形例を示す回路図、第6
図はこの種コモンドライバー回路の従来例のものを示す
回路図である。 (1)・・・バッファ増幅器、 (2)・・・コントロール部、 (3)・・・振幅可変ボリウム、 (4)・・・バイアス可変ボリウム、 (5)・・・演算増幅器、 (6)・・・ローパスフィルタ、 (7)・・・フィードバック回路、 (8)・・・出力回路。
FIG. 1 is a block diagram showing the overall structure of a liquid crystal display device incorporating the common driver circuit of the present invention, FIG. 2 is a block diagram showing the general structure of an embodiment of the common driver circuit according to the present invention, Figure 3 is a circuit diagram showing the detailed circuit configuration of the block diagram in Figure 2, and Figure 4 is a circuit diagram showing the detailed circuit configuration of the block diagram in Figure 1.
Figure 5 is a circuit diagram showing a modification of the circuit diagram in Figure 3; Figure 6 is a circuit diagram showing a modification of the circuit diagram in Figure 3;
The figure is a circuit diagram showing a conventional example of this type of common driver circuit. (1)... Buffer amplifier, (2)... Control section, (3)... Variable amplitude volume, (4)... Variable bias volume, (5)... Operational amplifier, (6)... ...Low pass filter, (7)...Feedback circuit, (8)...Output circuit.

Claims (1)

【特許請求の範囲】[Claims] (1)液晶パネル駆動用のコモンドライバー回路におい
て、容量性負荷を十分にドライブできるバッファ増幅器
又はボルテージフォロワより成る出力回路と、前記出力
回路にコモン信号とコモンバイアスを供給する手段と、
前記コモンバイアスを設定するバイアス設定手段と、前
記出力回路の直流レベルを検出し該検出出力を使って前
記バイアス設定手段によって設定されたコモンバイアス
が常に保持されるようになす制御手段と、から成ること
を特徴とするコモンドライバー回路。
(1) In a common driver circuit for driving a liquid crystal panel, an output circuit consisting of a buffer amplifier or a voltage follower capable of sufficiently driving a capacitive load, and means for supplying a common signal and a common bias to the output circuit;
It consists of a bias setting means for setting the common bias, and a control means for detecting the DC level of the output circuit and using the detected output so that the common bias set by the bias setting means is always maintained. A common driver circuit characterized by:
JP2215496A 1989-08-31 1990-08-14 Common driver circuit Expired - Lifetime JP2587526B2 (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
AU61324/90A AU623802B2 (en) 1989-08-31 1990-08-24 Common driver circuit
KR1019900013281A KR930011105B1 (en) 1989-08-31 1990-08-28 Common driver circuit
MYPI90001494A MY109311A (en) 1989-08-31 1990-08-30 Common driver circuit.
ES90309583T ES2078316T3 (en) 1989-08-31 1990-08-31 EXCITATION CIRCUIT FOR A DISPLAY PANEL.
EP90309583A EP0428250B1 (en) 1989-08-31 1990-08-31 Driver circuit for a display panel
CN90107443A CN1021605C (en) 1989-08-31 1990-08-31 Common driver circuit
US07/851,257 US5283477A (en) 1989-08-31 1992-03-13 Common driver circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP10240689 1989-08-31
JP1-102406 1989-08-31

Publications (2)

Publication Number Publication Date
JPH03155523A true JPH03155523A (en) 1991-07-03
JP2587526B2 JP2587526B2 (en) 1997-03-05

Family

ID=14326557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2215496A Expired - Lifetime JP2587526B2 (en) 1989-08-31 1990-08-14 Common driver circuit

Country Status (4)

Country Link
JP (1) JP2587526B2 (en)
KR (1) KR930011105B1 (en)
BR (1) BR9004303A (en)
DE (1) DE69023203T2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0566740A (en) * 1991-09-04 1993-03-19 Sharp Corp Signal output circuit
JP2007334276A (en) * 2006-06-16 2007-12-27 Chunghwa Picture Tubes Ltd Output buffer for gray-scale voltage source
JP2008046578A (en) * 2006-08-15 2008-02-28 Renei Kagi Kofun Yugenkoshi Voltage buffer and source driver of voltage buffer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0566740A (en) * 1991-09-04 1993-03-19 Sharp Corp Signal output circuit
JP2007334276A (en) * 2006-06-16 2007-12-27 Chunghwa Picture Tubes Ltd Output buffer for gray-scale voltage source
JP2008046578A (en) * 2006-08-15 2008-02-28 Renei Kagi Kofun Yugenkoshi Voltage buffer and source driver of voltage buffer

Also Published As

Publication number Publication date
JP2587526B2 (en) 1997-03-05
KR930011105B1 (en) 1993-11-24
DE69023203D1 (en) 1995-11-30
BR9004303A (en) 1991-09-03
DE69023203T2 (en) 1996-06-20
KR910005564A (en) 1991-03-30

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