JPH03143051A - Signal transmission technique - Google Patents

Abstract

PURPOSE: To provide a high noise margin, and to attain high frequency digital communication minimum in the influence of cross-talk, voltage level shit and high frequency attenuation by providing a high frequency driver, a single end transmission path connected with it, and ECL receiver. CONSTITUTION: A GaAs driver 41 transmits a single end signal to a receiver 42. The driver 41 has a high output voltage Voh and a low output voltage VoI, and a noise margin NML and a noise margin NMH in the receiver 42 are increased. Therefore, the signal is transmitted through the 'single end'. Thus, only the half number of mutual connecting lines can be necessitated, and the completeness of satisfactory and further satisfactory signal trnasmission can be maintained so that improvement can be attained. Also, this technique can be used in a high frequency automatic integrated circuit testing device and a system necessitating signal transmission with high completeness and high frequencies.

Description

[Detailed description of the invention]

FIELD OF INDUSTRIAL APPLICATION The present invention relates to digital transmission between multiplex circuits, more particularly C, G a A S %'i i
This invention relates to a technique and method for single-ended single-stone feeding between ECL circuits using i2. BACKGROUND OF THE INVENTION Differential signal transmission is commonly used when transmitting ECL (i.e. g) between chassis. Minimize the number of connecting wires. Other testers generally have limited performance. 1. There is a problem.The noise threshold is defined as the difference between the maximum or minimum amplitude of the transmitted signal and the level required to detect a high (low) condition. In the figure, the driver 11 transmits a single-ended signal to the receiver 12. The driver 11 has a level output voltage O1 and a high level output voltage V. h. Input voltage h-threshold Vil and high level input voltage threshold l1rf Vh
have. The difference between Vil and Vol at receiver 12 is defined as the low-level noise residual NML. The difference between Vih and Voh (high level noise margin NMI+) is returned to the receiver 1. From the driving chassis to the receiving chassis, Vee and Vcc
(or ground) and the temperature difference. This is the switching threshold of [ECl- fI/
l V b b, and the output voltages rt high and low Voh and VOl of the drive gate are affected. This degrades the noise margin when receiving the single-ended signal n. In addition, the loss in the transmission line between the two 9119s sufficiently attenuates the transmitted signal, causing deterioration of the noise margin. If the oxidation is significant, the accuracy of the [1, Y pulse and ii will also be affected at higher frequencies. By receiving differential drive signals, noise margin issues with respect to voltage and temperature no longer exist because the receiver detects the difference between the phase capture inputs regardless of Vcc, Vbb, or temperature X. Since guaranteed operation of the gate requires a smaller peak-to-peak voltage, the maximum frequency of operation will also increase. The main drawback in transmitting differential digital signals is that twice as many interconnect lines are required. This is a potential problem for Gi space and cost as the number of interconnect lines required is large. In FIG. 2, drive 2; 21 + transmits true and complement signals to the receiver 22, one with the output signal H at VOI and the other at Voh. Receiver 22 uses true and 7Ili signals to detect whether a high or low level is transmitted.
It is necessary to detect the voltage difference between the numbers 0 and 0. When sending digital signals between chassis, it is preferable to transmit them differentially. The main problem is the reduced noise margin with respect to VCC and temperature differences between the chassis when driving single-ended. Crosstalk can also be a problem in signal transmission (;). If a twisted pair is used for a differential signal, then both the true and complement signals are affected in the same way, so there is no crosstalk Get problem. Part 3 In the figure, the driver 31 transmits the differential signal via the twisted pair cable to the receiver 32. Although crosstalk will appear on the twisted pair cable, the true and complement signals are similarly affected and thus the receiver 32 If only the difference between the differentially transmitted signals is detected, the Crosstalk would be a problem since both the signal and complement signal would be similarly affected (-2), the gain of the differential receiver 1ε1 is about 2 I, fS of the single-ended receiver, and thus The maximum frequency of operation of the differential receiver (for single-ended reception) should be twice that of the maximum frequency of operation of the differential receiver. If the slew rate of the human signal is the same for each case, then Therefore, only about half the human signal is required without causing any change in the state of the output. A method for transmitting high frequency digital signals 8 that minimizes the effects of shifting and high frequency attenuation.
Traditional differential signal G transmission methods in that the signal 'J' is transmitted single-ended, thus requiring only half as many signal connections, and at the same time maintaining good or better signal transmission integrity. This method can be used in high frequency automatic integrated circuit testing v4iff and also in systems requiring high integrity, high frequency signal transmission. In VLSI test systems, GaAS gates are used to Primary support for test heads and test systems
Drives the ECL level signal g between the chassis. The timing skew that occurs along this path is important to the tester's timing accuracy. It requires that the test head (made as small as possible and the non-essential parts of the tester such as the formatter, receiver, logic, timing vernier, etc.) be placed on the main frame chassis. Timing skew and pulse width degradation, as well as test head dimensions and interconnect lines, must be kept to a minimum. At one end of the transmission line, Ga
Using single-ended transmission techniques in the AS driver reduces the number of interconnect lines and also helps minimize the size of the test head. The GaAS driver also helps minimize timing skew caused by crosstalk, VCC, and temperature differences. By Komei Ki (the technical advantages presented and their purpose are:
BRIEF DESCRIPTION OF THE DRAWINGS New features of the invention are set forth in the claims. To drive the single end between the example chassis, an r-gabit 10GOO2-gabit 1!7 is used. This is used as a differential quantity (ffl Z, or single-ended line driver).
There are two main advantages to using Goo1- as a driver. The first advantage is that the gate (high frequency device i
? f is composed of, for example, gallium arsenide, and the signal slew rate is therefore much faster than that of ECL.
For example, five times faster. This also makes it less sensitive to timing skew due to Vbb shifts and crosstalk. The second advantage is that the amplitude of signal g is larger than ECL. This makes the signal less sensitive to noise margin issues. The best of both worlds, Ai! 1
Reduces pulse width degradation due to loss along the connection. In FIG. 4, GaAS driver 41 transmits a single-ended signal to receiver 42. In FIG. The driver 41 is the ED shown in FIG.
The L drive driver 1 also has a high VOh and low VOI. This increases the NML and NM input to the receiver 42 compared to the receiver 12 of FIG.
The voltage amplitude of the arsenide (GaAs) part is 1.0 to 1.
The range of 4 volts is σ (I. The electrophoresis amplitude of the ECL part is
It is between the boxes of 0.6 and 10th pole 1-. ECL's worst-case noise margin (approximately 140 mv'c') does not include Vcc or temperature skew between the drive and receiver gates. Skew reduces noise margin in one direction and The worse case noise margin for GaAa is about 325 mV, so there is an increase in noise margin of about 200 mV for the GaAs part.
The period between gate rise and 85 is 150 ps, while ECL
The gate is typically 750 ps. This is GaAs
This means that the gate has a slew rate that is five times greater than the ECL. This makes the 3aAs signal less sensitive to timing skew due to crosstalk and Vbb shifts. The interconnect path also adds to the timing skew because it has losses. If G'J is high, then the rising edge will never reach its highest amplitude until after the falling edge. This causes the falling edge to occur earlier than expected. iff is reached, resulting in a timing skew, which causes pulse width degradation. In Figure 5, an attenuated ECL pulse is shown. The highest amplitude I at which the pulse crosses at the end of the line Yo, VOh of the driver
smaller than When a falling wheeze occurs, H to vbb,
? In the interval, the maximum amplitude is small, so it is less than <C. In Figure 6, a damped GaAs pulse is shown. Its amplitude at the end of the line is less than the Voh of the driver, but when the falling edge approaches The time is less because the edge rate of GaAS is significantly faster than ECL. GaAS Shinkyu should experience less degradation since the slew rate is much faster. The difference between the amplitude and the amplitude at which the falling edge occurs is proportional to the slew rate of the signal. Also, the rise/ls'7 fall times of GaAs are extremely fast, so the highest operating frequency

[Yo faster. In connection with the above description, the following sections are further disclosed. (1) A driver in a support chassis that has a frequency response greater than the input signal to the driver, a single-ended transmission line connected to the high-frequency driver, and a test line connected to the single-ended transmission line. Transmission line system between the test system support chassis and the test head, including the ECL receiver in the head. (2) J3 in the transmission line system described in (1)
The high frequency driver I includes a GaAS device. (3) In the transmission line system described in (1), the high frequency yil driver has a high frequency 7i
In order to compensate for the switching threshold error due to loss, a large amount of signal is provided. (4) In the transmission line system described in <1), the high-frequency driver #J is designed to provide high-speed [Transmission]J provides transmission. (5) (1) In the method described at the top, the test signal is a digital communication station. (6) A GaAs trap fIJ device in the support chassis, a single-ended transmission line connected to the GaAS drive: 5:, and an ECL receiver in the test head connected to the single-ended transfer line. including the transmission line system between the test system's support chassis and the test head. (7) (In the transmission line system described in paragraph 61, the l!2 frequency V, the driver has a standard voltage difference and a high frequency 0
It provides a large signal amplitude to compensate for switching threshold errors due to switching errors. (In the transmission line system described in Section 81(6),
High frequency drive: S is signal crosstalk or 1. (Provides high-speed, low-level transmission to minimize pulse degradation and timing errors due to quasi-Xr signal differences.) (9) Connect the test system to the test head with a single-ended transmission line, Frequency drive: between the test system and the test head, including driving the signal 0 with S, transmitting it to the test head, and receiving the signal 7 through the ECL receiver with the ECL receiver. A method of transmitting a test signal. (10) In the method described in (9), the high frequency driver is GaAs equipped. (11) In the method described in (9), the high frequency driver is GaAs equipped.
S drive #! J devices provide large signal amplitudes to compensate for switching threshold errors due to reference voltage differences and high frequency n losses. (12) (In the method described in paragraph 91, the high-frequency VJ device provides high-speed signal transmission to minimize pulse degradation and timing errors due to signal crosstalk or voltage differences. ( 13) In the method described in section f9), the test credit is the digital previous month. (14) In the transmission system described at the top of m,!
The frequency response of the 8-movement wave, tit, increases the input signal by a factor of 5. (15) Digital single-ended transmission between two chassis (for high-frequency and high-integrity pulse transmission, a single-end 113
The EC, which is located on the moon, is powered by one person and provides a higher-speed, higher-amplitude signal that requires less connection lines than conventional differential signal transmission technology. Brief description of the area Figure 1 shows a conventional single-ended ECL transmission line. Figure 2 is a diagram of a conventional TFI differential ECI transmission line. FIG. 3 is a diagram showing a differential ECL transmission line using twisted pairs. FIG. 4 is a diagram showing a single-end GaAS transmission line of the present invention. FIG. 5 shows a theoretical ECL pulse compared to an attenuated ECL pulse. FIG. 6 shows a theoretical GaAs pulse compared to an attenuated GaAS pulse. Mainly? LQ description 11.21, 31, 41: Driver 12.22, 32, 42: Receiver

Claims (1)

[Claims] (1) A driver in a support chassis with a frequency response greater than or equal to the input signal to the driver, a single-ended transmission line connected to the high-frequency driver, and a test head connected to the single-ended transmission line. A transmission line system between the support chassis of the test system and the test head, including the ECL receiver in the test system.