JPH03136586A - Compression coder - Google Patents

Compression coder

Info

Publication number
JPH03136586A
JPH03136586A JP1276874A JP27687489A JPH03136586A JP H03136586 A JPH03136586 A JP H03136586A JP 1276874 A JP1276874 A JP 1276874A JP 27687489 A JP27687489 A JP 27687489A JP H03136586 A JPH03136586 A JP H03136586A
Authority
JP
Japan
Prior art keywords
signal
circuit
filter
block
inter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1276874A
Other languages
Japanese (ja)
Inventor
Mitsuo Nishiwaki
西脇 光男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1276874A priority Critical patent/JPH03136586A/en
Publication of JPH03136586A publication Critical patent/JPH03136586A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/80Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
    • H04N19/82Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation involving filtering within a prediction loop
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

PURPOSE:To efficiently eliminate noise generated in an inter-frame prediction encoding loop by applying ON/OFF control to a bank limit filter so as to apply band limit to an inter-frame prediction decoding signal when lots of picture elements with a larger amplitude difference (distortion) exist between an input signal and a decoding signal. CONSTITUTION:A subtractor 2 calculates an inter-frame prediction error, a prediction error signal 2a is subject to orthogonal conversion by an orthogonal conversion circuit 3, quantized at a quantizer 4 and converted into a format to be sent to a multiplex circuit 14 and sent to a compression decoder. An arithmetic circuit 9 calculates a difference absolute value between an input television signal 1a and an inter-frame prediction decoding signal 6a obtained through decoding a coded signal, outputs a selection signal 9a to apply on/off control of a spatial filter 11. Noise is eliminated from a signal distorted by orthogonal conversion and quantization by passing it through a band pass filter in the spatial filter 11.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はテレビジョン信号の圧縮符号化装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a compression encoding apparatus for television signals.

〔従来の技術〕[Conventional technology]

動画像テレビジ3ン信号を低速度の伝送路で伝送するた
めの圧縮符号化技術として、フレーム間予測符号化(動
き補償付フレーム間予測符号化もある)により動いた部
分(予測誤差信号)のみを伝送する技術がある。さらに
、情報圧縮するために、フレーム間予測符号化により発
生する予測誤差信号をコサイン変換のような直交変換符
号化を用い、電力の大きい変換成分のみを有意な成分と
して符号化伝送するハイブリット符号化技術があり、動
画像テレビジョン信号の大幅な情報圧縮を実現している
。しかしながら、直交変換により変換された高周波成分
は、一般に電力が小さく、伝送されない場合が生ずる。
As a compression coding technology for transmitting video television signals over low-speed transmission channels, only moving parts (prediction error signals) are processed using interframe predictive coding (also known as interframe predictive coding with motion compensation). There is technology to transmit. Furthermore, in order to compress information, orthogonal transform coding such as cosine transform is used for the prediction error signal generated by interframe predictive coding, and hybrid coding is performed in which only transform components with large power are coded and transmitted as significant components. technology, and has achieved significant information compression in video television signals. However, the high frequency components transformed by orthogonal transformation generally have low power and may not be transmitted.

従って、フレーム間予測符号化を用いた場合に予測符号
化ループ内に高周波成分が残り、復号信号に雑音として
出力される。
Therefore, when interframe predictive coding is used, high frequency components remain in the predictive coding loop and are output as noise in the decoded signal.

上記問題を解決するために、従来の圧縮符号化装置では
、フレーム間予測値生成源である予測復号信号に対して
帯域制限フィルタ(空間的に高周波成分をカットするフ
ィルタ:予測符号化ループ内にあるためループ内フィル
タといわれる)を用い、動いた部分に対して帯域制限フ
ィルタを施し高周波成分をカットしている。また、動い
た部分の検出としては、動き補償フレーム間予測符号化
時検出される動ベクトルを用いていた。
In order to solve the above problem, conventional compression encoding devices use a band-limiting filter (a filter that spatially cuts high frequency components: a filter that spatially cuts high frequency components) for the predictive decoded signal, which is the interframe predicted value generation source, in the predictive encoding loop. (This is why it is called an in-loop filter.) A band-limiting filter is applied to the moving parts to cut out high-frequency components. Furthermore, to detect a moving part, a motion vector detected during motion-compensated interframe predictive coding was used.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来の圧縮符号化装置は、ループ内フィルタの
オン・オフ制御のために動き部分を検出する必要がある
ため、動き検出回路が必要となる。また、動き検出の誤
りやループ内フィルタの特性によっては、完全に雑音が
とれずループ内に残る可能性がある。
The conventional compression encoding device described above requires a motion detection circuit because it is necessary to detect a moving part for on/off control of the in-loop filter. Further, depending on errors in motion detection or characteristics of the in-loop filter, noise may not be completely removed and may remain in the loop.

〔課題を解決するための手段〕 本発明の圧縮符号化装置は、テレビジョン信号をフレー
ム間予測符号化して得た予測誤差信号を直交変換符号化
し、変換された成分を量子化して伝送する圧縮符号化装
置において、フレーム間予測復号信号を帯域制限するフ
ィルタと、前記入力テレビジョン信号と前記フレーム間
予測復号信号との差分絶対値を求める第1の手段と、前
記差分絶対値があらかじめ定めた第1のしきい値を越え
る画素の画素数をあらかじめ定めたブロック単位に演算
する第2の手段と、前記第1のしきい値を越える画素の
画素数があらかじめ定めた第2のしきい値を越えたとき
に前記フィルタ圧力を前記ブロック単位に選択し越えな
いときには前記フレーム間予測復号信号を前記ブロック
単位に選択する第3の手段と、この第3の手段により選
択された信号からフレーム間予測値を生成する第4の手
段と、前記第3の手段を制御する選択信号を前記ブロッ
ク毎に伝送する第5の手段とを有している。
[Means for Solving the Problems] The compression encoding device of the present invention performs compression encoding in which a prediction error signal obtained by interframe predictive encoding of a television signal is orthogonally transformed encoded, and the transformed components are quantized and transmitted. In the encoding device, a filter for band-limiting the interframe predictive decoded signal, a first means for determining an absolute difference value between the input television signal and the interframe predictive decoded signal, and a first means for determining the absolute difference value between the input television signal and the interframe predictive decoded signal, and a second means for calculating the number of pixels exceeding the first threshold for each predetermined block; and a second threshold in which the number of pixels exceeding the first threshold is predetermined. a third means for selecting the filter pressure for each block when the filter pressure exceeds the predetermined value; and selecting the interframe predictive decoded signal for each block when the filter pressure does not exceed the predetermined value; It has a fourth means for generating a predicted value, and a fifth means for transmitting a selection signal for controlling the third means for each of the blocks.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.

入力端子1に入力テレビジョン信号1aが入力し、減算
器2と遅延回路7に接続される。減算器2では予測誤差
信号が演算され、予測誤差信号2aは直交変換回路3に
接続され、変換成分3aが量子化器4において量子化さ
れ、量子化された変換成分4aは多重化回路14に接続
されるとともに逆直交変換回路5に接続される。逆直交
変換回路5により逆変換された予測誤差信号5aは加算
器6で予測値8aを加算されフレーム間予測復号信号6
aとして演算回路9.遅延回路lOおよび空間フィルタ
11に接続される。遅延回路10で遅延したフレーム間
予測復号信号10aとフィルタ処理されたフレーム間予
測復号信号11aは選択回路12に接続され、選択され
た復号信号12aは予測値生成回路13に接続される。
An input television signal 1a is input to an input terminal 1, which is connected to a subtracter 2 and a delay circuit 7. A prediction error signal is calculated in the subtracter 2, the prediction error signal 2a is connected to an orthogonal transform circuit 3, a transform component 3a is quantized in a quantizer 4, and the quantized transform component 4a is sent to a multiplexing circuit 14. It is connected to the inverse orthogonal transform circuit 5 as well. The prediction error signal 5a inversely transformed by the inverse orthogonal transform circuit 5 is added with a predicted value 8a by an adder 6 to produce an interframe predictive decoded signal 6.
a as an arithmetic circuit 9. Connected to delay circuit IO and spatial filter 11. The interframe predictive decoded signal 10a delayed by the delay circuit 10 and the filtered interframe predictive decoded signal 11a are connected to a selection circuit 12, and the selected decoded signal 12a is connected to a predicted value generation circuit 13.

生成された予測値13aは減算器2と遅延回路8に接続
され、遅延回路8で遅延した予測値8aは加算器6に接
続される。遅延回路7で遅延したPCMテレビジョン信
号7aは演算回路9に接続され、演算回路9から選択信
号9aが出力し、選択回路12および多重化回路14に
接続される。多重化回路14からは多重化信号14aが
出力端子15に出力される。
The generated predicted value 13a is connected to the subtracter 2 and the delay circuit 8, and the predicted value 8a delayed by the delay circuit 8 is connected to the adder 6. The PCM television signal 7a delayed by the delay circuit 7 is connected to an arithmetic circuit 9, and a selection signal 9a is output from the arithmetic circuit 9, which is connected to a selection circuit 12 and a multiplexing circuit 14. A multiplexed signal 14a is outputted from the multiplexing circuit 14 to an output terminal 15.

次に、具体的動作を説明する。減算器2はフレーム間予
測誤差を演算するものであり、前フレームとの差分演算
が行なわれる。演算された予測誤差信号2aは直交変換
回路3において直交変換される。画像信号の直交変換符
号化でよく用いられる例としては、discrete 
cosine変換符号化(D CT)がある。DCTは
、時間軸上の画像信号を周波数軸上の信号に変換するも
のであり、予測誤差信号2aをあらかじめ定めたnライ
ンXm画素からなるブロックに分割し、このブロックご
とに数値列をコサイン関数を用いて直交変換するもので
ある。画像信号においてはコサイン変換された成分のう
ち低周波成分に電力が集中するため、低周波成分の°量
子化を細く、高周波成分を粗く量子化することにより発
生情報量を抑圧することが一般的に行われている。従っ
て、直交変換された各成分は量子化器4で量子化され、
多重化回路14により伝送するためのフォーマットに変
換され、圧縮復号装置に伝送されるものである。多重化
回路14は、量子化された信号をハフマン符号等により
可変長符号化し、伝送するためのフレームを構成すると
ともに、後述する選択信号9aおよびその他のモード符
号をも多重化する。
Next, the specific operation will be explained. The subtracter 2 calculates an interframe prediction error, and performs a difference calculation with the previous frame. The calculated prediction error signal 2a is orthogonally transformed in an orthogonal transform circuit 3. An example often used in orthogonal transform encoding of image signals is discrete
There is cosine transform coding (DCT). DCT converts an image signal on the time axis into a signal on the frequency axis, and divides the prediction error signal 2a into blocks each consisting of predetermined n lines and Xm pixels, and converts a numerical sequence into a cosine function for each block. This is an orthogonal transformation using . In image signals, power is concentrated in the low frequency components of the cosine-transformed components, so it is common to suppress the amount of generated information by quantizing the low frequency components finely and the high frequency components coarsely. is being carried out. Therefore, each component subjected to orthogonal transformation is quantized by the quantizer 4,
The data is converted into a format for transmission by the multiplexing circuit 14 and transmitted to the compression/decoding device. The multiplexing circuit 14 variable-length encodes the quantized signal using a Huffman code or the like to configure a frame for transmission, and also multiplexes a selection signal 9a and other mode codes, which will be described later.

方、量子化された変換成分4aは、フレーム間予測値信
号の生成源とするため、逆直交変換回路5において直交
変換回路3の逆変換が施され、周波数軸上の信号から時
間軸上の信号(予測誤差信号)へと変換され、加算器6
において予測値8aを加算することによりフレーム間予
測復号信号6aとしてテレビジョン信号を複合する。
On the other hand, in order to use the quantized transform component 4a as a generation source of an interframe predicted value signal, the inverse transform of the orthogonal transform circuit 3 is performed in the inverse orthogonal transform circuit 5, and the signal on the time axis is converted from the signal on the frequency axis. signal (prediction error signal), and adder 6
By adding the predicted value 8a, the television signal is decoded as an interframe predictive decoded signal 6a.

空間フィルタ11は、直交変換および量子化により歪ん
だ信号を帯域制限フィルタを通すことにより雑音を除去
するためのフィルタであり、一般的に、電力の小さい高
周波成分に雑音が多くなり視覚的に悪影響を及ぼす傾向
があるため、高周波成分を除去する低域通過フィルタを
用いる。また、直交変換は高能率符号化するために2次
元直交変換が行われるため、フィルタも空間(2次元)
フィルタを用いるのが一般的である。
The spatial filter 11 is a filter that removes noise by passing a signal distorted by orthogonal transformation and quantization through a band-limiting filter, and generally there is a lot of noise in high-frequency components with low power, which is visually harmful. Therefore, a low-pass filter is used to remove high frequency components. In addition, since orthogonal transformation is a two-dimensional orthogonal transformation for high-efficiency encoding, the filter is also spatial (two-dimensional).
It is common to use a filter.

遅延回路10は空間フィルタ11での遅延を補償するた
めの回路である。
The delay circuit 10 is a circuit for compensating for the delay in the spatial filter 11.

選択回路12は選択信号9aによりフィルタ処理された
信号11aまたはフィルタ処理されていない信号10a
のいずれか一方を選択し、予測値生成回路13へ供給す
る。
The selection circuit 12 selects a filtered signal 11a or an unfiltered signal 10a using the selection signal 9a.
Either one is selected and supplied to the predicted value generation circuit 13.

予測値生成回路13は、単純フレーム間予測符号化の場
合は、フレームメモリを用いて減算器2に1フレーム前
の信号を供給するための遅延メモリとなり、動き補償付
フレーム間予測符号化の場合には、動ベクトル信号に応
じて遅延が変化する可変遅延メモリとなる。
In the case of simple inter-frame predictive coding, the predicted value generation circuit 13 uses a frame memory to serve as a delay memory for supplying the subtracter 2 with a signal of one frame before, and in the case of motion-compensated inter-frame predictive coding, This is a variable delay memory whose delay changes depending on the motion vector signal.

遅延回路7および遅延回路8は信号遅延を合わせるだめ
の遅延補償用のメモリである。
Delay circuit 7 and delay circuit 8 are delay compensation memories for adjusting signal delays.

演算回路9は選択回路12を制御する選択信号9aを発
生するための回路であり、入力テレビジョン信号1aと
符号化された信号を復号して得られるフレーム間予測復
号信号6aとの差分絶対値を計算し、あらかじめ定めた
ブロック単位に、差分絶対値の値があらかじめ定めた第
1のしきい値を越える値を示す画素の画素数を演算し、
各ブロック中の第1のしきい値を越える値を示す画素の
画素数が第2しきい値を越えたならば当該ブロックの信
号に対して信号11aを、越えないときには信号10a
をそれぞれ選択するように選択信号9aを出力する。
The arithmetic circuit 9 is a circuit for generating a selection signal 9a that controls the selection circuit 12, and generates the absolute value of the difference between the input television signal 1a and the interframe predictive decoded signal 6a obtained by decoding the encoded signal. and calculate the number of pixels whose absolute difference value exceeds a predetermined first threshold value for each predetermined block;
If the number of pixels showing a value exceeding the first threshold value in each block exceeds the second threshold value, signal 11a is applied to the signal of the block; otherwise, signal 10a is applied.
A selection signal 9a is output so as to select each of them.

空間フィルタ11のオン・オフ制御単位となるブロック
は、一般的に、直交変換のためのブロック(nラインx
m画素)と同一ブロックとし、各ブロックの直交変換成
分の量子化による歪の発生に対応させている。例えば、
直交変換ブロックを8ライン×8画素とすれば、フィル
タ制御のブロックも8ライン×8画素とし、直交変換符
号化のブロックと1対1に対応させている。
The block serving as the on/off control unit of the spatial filter 11 is generally a block for orthogonal transformation (n lines x
m pixels), and the generation of distortion due to quantization of orthogonal transform components of each block is handled. for example,
If the orthogonal transform block is 8 lines x 8 pixels, the filter control block is also 8 lines x 8 pixels, and is in one-to-one correspondence with the orthogonal transform coding block.

演算回路9の一例のブロック図を第2図に示す。A block diagram of an example of the arithmetic circuit 9 is shown in FIG.

第2図において、減算器901は入力テレビジョン信号
7aとフレーム間予測復号化信号6aとの差分演算を行
い差分値901aを算出し、絶対値変換回路902にお
いて絶対値902aに変換する。絶対値への変換は、R
OMによるコード変換で実現できる。差分絶対値902
aは、比較期903によりしきい値1と大小判定され、
しきい値lを越える(有効画素)か否かにより“1”又
は“O”のコードに変換され、走査変換回路904に供
給される。
In FIG. 2, a subtracter 901 calculates a difference between an input television signal 7a and an interframe predictive decoded signal 6a to calculate a difference value 901a, which is converted into an absolute value 902a in an absolute value conversion circuit 902. Conversion to absolute value is R
This can be achieved by code conversion using OM. Absolute difference value 902
a is determined to be larger than the threshold value 1 by the comparison period 903,
Depending on whether the pixel exceeds the threshold l (effective pixel) or not, it is converted into a code of “1” or “O” and is supplied to the scan conversion circuit 904.

ブロック単位にフィルタ制御を行うために、第3図(a
)に示すTV走査で入力した信号を、走査変換回路90
4において、第3図(b)に示すブロック走査に信号に
変換する。走査変換された有効・無効表示信号904a
は、計数回路905において、ブロック毎に有効画素の
数を計数される。
In order to perform filter control on a block-by-block basis, it is necessary to
) is input to the scan conversion circuit 90.
4, the signal is converted into a block scanning signal as shown in FIG. 3(b). Scan-converted valid/invalid display signal 904a
A counting circuit 905 counts the number of effective pixels for each block.

計数回路905はリセット信号によりブロック毎に計数
値がリセットされる。計数回路905において計数され
たブロック当りの有効係数値905aは比較器906に
おいてしきい値2との大小比較がなされ、しきい値2を
越えた場合に、空間フィルタ11の出力信号11aを選
択する様に選択信号906aを発生する。選択信号90
6aは、走査変換回路907により、ブロック走査から
TV走査に変換され、選択信号9aとして選択回路12
に供給される。
The count value of the counting circuit 905 is reset for each block by a reset signal. The effective coefficient value 905a per block counted by the counting circuit 905 is compared in magnitude with a threshold value 2 in a comparator 906, and when it exceeds the threshold value 2, the output signal 11a of the spatial filter 11 is selected. Similarly, a selection signal 906a is generated. selection signal 90
6a is converted from block scanning to TV scanning by a scan conversion circuit 907, and is sent to the selection circuit 12 as a selection signal 9a.
is supplied to

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、フレーム間予測復号信号
を帯域制限するフィルタを設け、あらかじめ定めたブロ
ック単位にPCMテレビジョン信号とフレーム間予測復
号信号との差分絶対値を求め、入力信号と復号信号との
振幅差(歪)の大きい画素が多く存在したときにフレー
ム間予測復号信号を帯域制限するように帯域制限フィル
タをオン・オフ制御することにより、直交変換符号化の
量子化によりフレーム間予測符号化ループ内に発生する
雑音を効率よく除去できるとともに、従来のように動き
検出回路を設けなくともループ内の帯域制限フィルタを
制御できる効果がある。
As explained above, the present invention provides a filter that limits the band of the interframe predictive decoded signal, calculates the absolute difference value between the PCM television signal and the interframe predictive decoded signal in predetermined block units, and calculates the absolute value of the difference between the input signal and the decoded signal. By controlling the band-limiting filter on and off to limit the band of the inter-frame predictive decoded signal when there are many pixels with large amplitude differences (distortion) from the signal, the quantization of orthogonal transform coding It is possible to efficiently remove noise generated in the predictive coding loop, and also to be able to control the band-limiting filter in the loop without providing a motion detection circuit as in the conventional case.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すブロック図、第2図は
第1図の演算回路9の一例を示すブロック図、第3図(
a) 、 (b)はブロック走査の説明のための図であ
る。 1・・・・・・入力端子、2・・・・・・減算器、3・
・・・・・直交変換回路、4・・・・・・量子化器、5
・・・・・・逆直交変換回路、6・・・・・・加算器、
7,8,10・・・・・・遅延回路、9・・・・・・演
算回路、11・・・・・・空間フィルタ、12・・・・
・・選択回路、13・・・・・・予測値生成回路、14
・・・・・・多重化回路、15・・・・・・出力端子、
901・・・・・・減算器、902・・・・・・絶対値
変換回路、903,906・・・・・・比較器、904
,907・・・・・・走査変換回路、905・・・・・
・計数回路。
FIG. 1 is a block diagram showing one embodiment of the present invention, FIG. 2 is a block diagram showing an example of the arithmetic circuit 9 of FIG. 1, and FIG.
Figures a) and (b) are diagrams for explaining block scanning. 1...Input terminal, 2...Subtractor, 3.
...Orthogonal transform circuit, 4...Quantizer, 5
...Inverse orthogonal transform circuit, 6...Adder,
7, 8, 10...Delay circuit, 9...Arithmetic circuit, 11...Spatial filter, 12...
... Selection circuit, 13 ... Predicted value generation circuit, 14
...Multiplex circuit, 15...Output terminal,
901...Subtractor, 902...Absolute value conversion circuit, 903, 906...Comparator, 904
, 907... Scan conversion circuit, 905...
・Counting circuit.

Claims (1)

【特許請求の範囲】[Claims] テレビジョン信号をフレーム間予測符号化して得た予測
誤差信号を直交変換符号化し、変換された成分を量子化
して伝送する圧縮符号化装置において、フレーム間予測
復号信号を帯域制限するフィルタと、前記入力テレビジ
ョン信号と前記フレーム間予測復号信号との差分絶対値
を求める第1の手段と、前記差分絶対値があらかじめ定
めた第1のしきい値を越える画素の画素数をあらかじめ
定めたブロック単位に演算する第2の手段と、前記第1
のしきい値を越える画素の画素数があらかじめ定めた第
2のしきい値を越えたときに前記フィルタ出力を前記ブ
ロック単位に選択し越えないときには前記フレーム間予
測復号信号を前記ブロック単位に選択する第3の手段と
、この第3の手段により選択された信号からフレーム間
予測値を生成する第4の手段と、前記第3の手段を制御
する選択信号を前記ブロック毎に伝送する第5の手段と
を有することを特徴とする圧縮符号化装置。
A compression encoding device that orthogonally transform encodes a prediction error signal obtained by interframe predictive encoding of a television signal, quantizes and transmits the transformed component, and a filter that band-limits the interframe predictive decoded signal; a first means for calculating an absolute difference value between an input television signal and the interframe predictive decoded signal; and a block unit in which the number of pixels for which the absolute difference value exceeds a predetermined first threshold is predetermined. a second means for calculating the first
When the number of pixels exceeding a threshold exceeds a predetermined second threshold, the filter output is selected for each block, and when the number does not exceed a second threshold, the interframe predictive decoded signal is selected for each block. a fourth means for generating an inter-frame predicted value from the signal selected by the third means; and a fifth means for transmitting a selection signal for controlling the third means for each block. A compression encoding device characterized by having means.
JP1276874A 1989-10-23 1989-10-23 Compression coder Pending JPH03136586A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1276874A JPH03136586A (en) 1989-10-23 1989-10-23 Compression coder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1276874A JPH03136586A (en) 1989-10-23 1989-10-23 Compression coder

Publications (1)

Publication Number Publication Date
JPH03136586A true JPH03136586A (en) 1991-06-11

Family

ID=17575610

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1276874A Pending JPH03136586A (en) 1989-10-23 1989-10-23 Compression coder

Country Status (1)

Country Link
JP (1) JPH03136586A (en)

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