JPH03136572A - Reader - Google Patents

Reader

Info

Publication number
JPH03136572A
JPH03136572A JP1275602A JP27560289A JPH03136572A JP H03136572 A JPH03136572 A JP H03136572A JP 1275602 A JP1275602 A JP 1275602A JP 27560289 A JP27560289 A JP 27560289A JP H03136572 A JPH03136572 A JP H03136572A
Authority
JP
Japan
Prior art keywords
input
circuit
given
subtraction
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1275602A
Other languages
Japanese (ja)
Inventor
Yuji Tanaka
勇司 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP1275602A priority Critical patent/JPH03136572A/en
Publication of JPH03136572A publication Critical patent/JPH03136572A/en
Pending legal-status Critical Current

Links

Landscapes

  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To reduce the manufacture cost and to make the size of the reader small without need of a ROM having been employed for a conventional reader by correcting an electric signal corresponding to the lightness with a simple arithmetic circuit. CONSTITUTION:A data Vin is given to a B1 input of a multiplier circuit 11 and an A2 input of an adder circuit 12. A constant (a) from a register 16 is given to an A1 input of the multiplier circuit 11, the A1 input and the B1 input are subject to multiplication processing and the result of product is given to an A4 input of a subtraction circuit 14. A constant (b) from a register 17 is given to a B2 input of the adder circuit 12, the A2 input and the B2 input are subject to addition processing and the result of sum is given to a B3 input of a division circuit 13. A constant (c) from a register 18 is given to an A3 input of the division circuit 13, the A3 input and the B3 input are subject to division processing and the result of division is given to a B4 input of the subtraction circuit 14. The subtraction circuit 14 applies subtraction processing to the A4 input and the B4 input and the result of subtraction is given to an A5 input of an adder circuit 15. A constant (d) from a register 19 is given to a B5 input of the adder circuit 15, the A5 input and the B5 input are subject to addition processing and the output from the adder circuit 15 is a data Vout after gradation correction.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ファクシミリ装置などの画像処理装置におい
て好適に実施される読取装置に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a reading device suitably implemented in an image processing device such as a facsimile machine.

従来の技術 画像処理装置に用いられる受光素子の出力値と、明るさ
との間には、はぼ比例関係が成立するが、人間の明るさ
に対する惑じと明るさとの間には、対数関数的関係が成
立する。したがって、受光素子の出力値をそのまま使用
して画像を作成すると、人間が見たイメージとのずれが
生じることになり、前記出力値(階調データ)を補正す
る必要がある。
Although there is an approximately proportional relationship between the output value of the light-receiving element used in conventional image processing devices and the brightness, there is a logarithmic relationship between the human confusion about brightness and the brightness. A relationship is established. Therefore, if an image is created using the output value of the light-receiving element as it is, there will be a deviation from the image seen by a human, and it is necessary to correct the output value (gradation data).

第3図は、従来の階調補正回路の基本的構成を示すブロ
ック図である。CCD (電荷結合素子)などで実現さ
れる読取手段1からの出力値は、A/D(アナログ/デ
ジタル)変換器2に与えられ、たとえば8ビツトのデジ
タルデータに変換される。
FIG. 3 is a block diagram showing the basic configuration of a conventional gradation correction circuit. An output value from a reading means 1 implemented by a CCD (charge-coupled device) or the like is applied to an A/D (analog/digital) converter 2 and converted into, for example, 8-bit digital data.

このデジタルデータは、アドレスデータとしてROM(
リードオンリメモリ)3に与えられる。ROM3には、
アドレス「0」〜アドレスr255Jに階調補正用デー
タが記憶されており、前記A/D変換器2からのデータ
をアドレスデータとしてROM3に与えることによって
、階調補正されたデータが出力されることになる。
This digital data is stored in the ROM (
read-only memory) 3. In ROM3,
The gradation correction data is stored in address "0" to address r255J, and by giving the data from the A/D converter 2 to the ROM 3 as address data, the gradation corrected data is output. become.

発明が解決しようとする課題 上述のような階調補正回路においては、ROM3が必要
であるため、ゲートアレイなどのように内部にROMと
同様な機能を持つ回路を組込むことが困難な場合、外部
にROM3を取付け、さらにROM3とのデータの送受
信を行うための端子が必要となり、製造コストが高くつ
くという問題がある。
Problems to be Solved by the Invention The gradation correction circuit as described above requires ROM3, so if it is difficult to incorporate a circuit with the same function as a ROM internally, such as in a gate array, an external The problem is that the ROM 3 is attached to the ROM 3, and a terminal for transmitting and receiving data to and from the ROM 3 is required, which increases the manufacturing cost.

本発明の目的は、製造コストを低減させるとともに、回
路構成を簡略化することができる読取装置を提供するこ
とである。
An object of the present invention is to provide a reading device that can reduce manufacturing costs and simplify the circuit configuration.

課題を解決するための手段 本発明は、複数の受光素子が配列されて構成され、各受
光素子毎に明るさに対応した電気信号を導出する読取手
段と、 前記読取手段からの出力を演算して予め定める明るさに
対応する電気信号に補正する演算回路とを含むことを特
徴とする読取装置である。
Means for Solving the Problems The present invention comprises a plurality of light receiving elements arranged and reading means for deriving an electrical signal corresponding to brightness for each light receiving element, and calculating the output from the reading means. The reading device is characterized in that it includes an arithmetic circuit that corrects the electric signal to an electric signal corresponding to a predetermined brightness.

作  用 本発明に従えば、読取手段は複数の受光素子が配列され
て構成され、各受光素子毎に明るさに対応した電気信号
を導出する。この電気信号は、演算回路に与えられる。
Function According to the present invention, the reading means is constructed by arranging a plurality of light receiving elements, and derives an electric signal corresponding to brightness for each light receiving element. This electrical signal is given to an arithmetic circuit.

演算回路は、前記読取手段からの電気信号を予め定める
明るさに対応する電気信号に補正する。
The arithmetic circuit corrects the electrical signal from the reading means into an electrical signal corresponding to a predetermined brightness.

したがって、従来のようにROMを用いて読取手段から
の電気信号を補正する必要がなくなり、簡単な演算回路
によって補正を行うことができる。
Therefore, there is no need to use a ROM to correct the electrical signal from the reading means as in the conventional case, and the correction can be performed using a simple arithmetic circuit.

これによって、読取装置の製造コストの低減とともに、
読取装置の小形化も可能となる。
This reduces the manufacturing cost of the reading device and
It also becomes possible to downsize the reading device.

実施例 第1図は、本発明の一実施例である読取装置の基本的構
成を示すブロック図である。複数の受光素子6が配列さ
れて構成される読取手段7からの出力は、A/D変換器
8によってデジタルデータに変換され、さらにシェーデ
ィング補正回路9によってシェーディング補正が行われ
る。シェーディング補正とは、読取手段7を構成するレ
ンズなどの光学系の光学的特性や受光素子の光学的特性
などが原因で、読取った画像は中心部分の明るさに比べ
て周辺部分が暗くなるので、画像全体の明るさをフラッ
トにするために行う補正である。
Embodiment FIG. 1 is a block diagram showing the basic configuration of a reading device which is an embodiment of the present invention. The output from the reading means 7, which is composed of a plurality of light receiving elements 6 arranged in an array, is converted into digital data by an A/D converter 8, and further subjected to shading correction by a shading correction circuit 9. Shading correction refers to the fact that due to the optical characteristics of the optical system such as the lens that constitutes the reading means 7 and the optical characteristics of the light-receiving element, the peripheral parts of the read image are darker than the brightness of the central part. , is a correction performed to flatten the brightness of the entire image.

シェーディング補正後のデータVinは、演算回路10
によってデータVoutに補正される。
The data Vin after shading correction is processed by the arithmetic circuit 10.
is corrected to data Vout by.

演算回路10は、以下の第1式に従ってデータVout
を算出する。
The arithmetic circuit 10 calculates data Vout according to the first equation below.
Calculate.

上記第1式は、階調補正に用いられる対数間数の近似式
として用いることができる。
The first equation above can be used as an approximate equation for a logarithmic number used for gradation correction.

第2図は、明るさに対する受光素子6の出力値の変化お
よび明るさに対する人間の感じ方の変化を示すグラフで
ある。受光素子6と明るさとの間にはほぼ比例関係が成
立するが、人間の感じ方と明るさとの間には、対数間数
的な関係が成立する。
FIG. 2 is a graph showing changes in the output value of the light receiving element 6 with respect to brightness and changes in how humans perceive brightness. A nearly proportional relationship holds true between the light receiving element 6 and brightness, but a logarithmic relationship holds true between the human perception and brightness.

したがって、原稿を受光素子6によって読取り、その出
力値に基づいて作成した画像と、人間が前記原稿を見た
ときのイメージとの間にずれが生じてしまう、このずれ
を補正するために上記第1式データVinは、乗算回路
11のB1人力と加算回路12のA2人力とに与えられ
る1乗算回路11のA1人力には、レジスタ16からの
定数aが与えられ、乗算回路11はA1人力とB1人力
との間に乗算処理を行い、演算結果は減算回路14のA
4人力に与えられる。加算回路12のB2入力には、レ
ジスタ17からの定数すが与えられ、加算回路12はA
2人力とB2人力との間に加算処理を行い、演算結果は
除算回路13の83人力に与えられる。
Therefore, a deviation occurs between the image created based on the output value of an original read by the light-receiving element 6 and the image when a person views the original.In order to correct this deviation, the above-mentioned Formula 1 data Vin is given to the B1 human power of the multiplier circuit 11 and the A2 human power of the adder circuit 12. The constant a from the register 16 is given to the A1 human power of the 1 multiplier circuit 11; A multiplication process is performed between B1 and human power, and the calculation result is sent to A of the subtraction circuit 14.
Given to 4 people. The B2 input of the adder circuit 12 is given a constant value from the register 17, and the adder circuit 12
Addition processing is performed between the 2-manpower and the B2-manpower, and the calculation result is given to the 83-manpower of the division circuit 13.

除算回路13のA3人力にはレジスタ18からの定数C
が与えられ、除算回路16はA3人力と83人力との間
に除算処理を行い、演算結果は減算回路14の84人力
に与えられる。減算回路14はA4人力と84人力との
間に減算処理を行い、演算結果は加算回路15のA5人
力に与えられる。
Constant C from register 18 is input to A3 of divider circuit 13.
is given, the division circuit 16 performs a division process between A3 manpower and 83 manpower, and the calculation result is given to 84 manpower of the subtraction circuit 14. The subtraction circuit 14 performs subtraction processing between the A4 manpower and the 84 manpower, and the calculation result is given to the A5 manpower of the addition circuit 15.

加算回路15の85人力にはレジスタ19からの定数d
が与えられ、加算回路15はA5人力とB5人力との間
に加算処理を行い、この加算回路15からの出力値がt
li調補正補正後−タVoutとなる。
The constant d from the register 19 is added to the 85 input of the adder circuit 15.
is given, the adder circuit 15 performs addition processing between A5 human power and B5 human power, and the output value from this adder circuit 15 is t.
After the Li tone correction, the value becomes -ta Vout.

またレジスタ16.17,18.19が出力する定数a
、b、c、dをCPU (中央演算処理袋W)などを用
いて変更できるようにすることによって、受光素子6の
光学的特性に応じた正確な階調補正を行うことができる
。また、必要に応じて前記定数a、b、c、dをr□、
とすることによって、演算回路10をさらに簡略化する
こともできる。
Also, the constant a output by registers 16.17 and 18.19
, b, c, and d can be changed using a CPU (central processing unit W) or the like, thereby making it possible to perform accurate gradation correction according to the optical characteristics of the light-receiving element 6. Also, if necessary, the constants a, b, c, d can be changed to r□,
By doing so, the arithmetic circuit 10 can be further simplified.

以上のように本実施例によれば、簡単な演算回路によっ
て階調データの補正を行うようにしたので、従来のよう
にROMを用いる必要がなくなり、製造コストを削減す
ることができる。また、読取装置のゲートアレイなどに
前記演算回路を組込むことが可能となり、読取装置の小
形化も可能となる。
As described above, according to this embodiment, since the gradation data is corrected by a simple arithmetic circuit, there is no need to use a ROM as in the past, and manufacturing costs can be reduced. Furthermore, it becomes possible to incorporate the arithmetic circuit into a gate array or the like of the reading device, and the size of the reading device can also be reduced.

発明の効果 以上のように本発明によれば、簡単な演算回路によって
明るさに対応した電気信号の補正を行うようにしたので
、従来のようにROMを用いる必要はなく、製造コスト
を削減するとともに、読取装置の小形化も可能となる。
Effects of the Invention As described above, according to the present invention, a simple arithmetic circuit is used to correct the electrical signal corresponding to the brightness, so there is no need to use a ROM as in the past, and manufacturing costs are reduced. At the same time, it is also possible to downsize the reading device.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例である読取装置の基本的構成
を示すブロック図、第2図は明るさに対する受光素子6
の出力値の変化および明るさに対する人間の感じ方の変
化を示すグラフ、第3図は従来の階調補正回路の構成を
示すブロック図である。 6・・・受光素子、7・・・読取手段、10・・・演算
回路、11・・・乗算回路、12.15・・・加算回路
、13・・・除算回路、14・・・減算回路、16.1
7,18゜19・・・レジスタ
FIG. 1 is a block diagram showing the basic configuration of a reading device which is an embodiment of the present invention, and FIG. 2 shows a light receiving element 6 for brightness.
FIG. 3 is a block diagram showing the configuration of a conventional gradation correction circuit. 6... Light receiving element, 7... Reading means, 10... Arithmetic circuit, 11... Multiplication circuit, 12.15... Addition circuit, 13... Division circuit, 14... Subtraction circuit , 16.1
7,18゜19...Register

Claims (1)

【特許請求の範囲】 複数の受光素子が配列されて、構成され、各受光素子毎
に明るさに対応した電気信号を導出する読取手段と、 前記読取手段からの出力を演算して予め定める明るさに
対応する電気信号に補正する演算回路とを含むことを特
徴とする読取装置。
[Scope of Claims] Reading means configured by arranging a plurality of light receiving elements and deriving an electrical signal corresponding to the brightness for each light receiving element, and a predetermined brightness by calculating the output from the reading means. A reading device comprising: an arithmetic circuit that corrects an electric signal corresponding to the electric signal.
JP1275602A 1989-10-23 1989-10-23 Reader Pending JPH03136572A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1275602A JPH03136572A (en) 1989-10-23 1989-10-23 Reader

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1275602A JPH03136572A (en) 1989-10-23 1989-10-23 Reader

Publications (1)

Publication Number Publication Date
JPH03136572A true JPH03136572A (en) 1991-06-11

Family

ID=17557729

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1275602A Pending JPH03136572A (en) 1989-10-23 1989-10-23 Reader

Country Status (1)

Country Link
JP (1) JPH03136572A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6125202A (en) * 1993-08-27 2000-09-26 Mitsubishi Denki Kabushiki Kaisha Image processing device for modifying tone characteristics of image data

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6125202A (en) * 1993-08-27 2000-09-26 Mitsubishi Denki Kabushiki Kaisha Image processing device for modifying tone characteristics of image data

Similar Documents

Publication Publication Date Title
US7356198B2 (en) Method and system for calculating a transformed image from a digital image
US8036457B2 (en) Image processing apparatus with noise reduction capabilities and a method for removing noise from a captured image
US7548262B2 (en) Method, apparatus, imaging module and program for improving image quality in a digital imaging device
US20180260945A1 (en) Image processing apparatus and image processing method
CN111861922A (en) Method and device for adjusting color correction matrix and storage medium
CN112153356A (en) Image parameter determination method, image sensor, device, electronic device and storage medium
EP0442369A2 (en) Gradation correcting apparatus
JPH0418865A (en) Gamma correction circuit
JP4677699B2 (en) Image processing method, image processing device, photographing device evaluation method, image information storage method, and image processing system
CN114331907A (en) Color shading correction method and device
JPH1065973A (en) Solid-state image pickup device
CN113066020A (en) Image processing method and device, computer readable medium and electronic device
JPH03136572A (en) Reader
JPH0530350A (en) Solid-state image pickup device
JPS62140033A (en) Photometric apparatus
Parulski et al. A digital color CCD imaging system using custom VLSI circuits
TWI768282B (en) Method and system for establishing light source information prediction model
JP3476843B2 (en) Edge enhancement circuit
JPH0789368B2 (en) Image processing device
JPH10164371A (en) Image data processor and image data processing method
JPH077440B2 (en) Image processing device
JP2006101231A (en) White balance adjustment device, color adjustment device, white balance adjustment method, and color adjustment method
JP3105936B2 (en) Image reading device
CN114120893A (en) COB correction method, device and system
CN117201950A (en) Hue adjustment method, hue adjustment device, and readable storage medium