JPH0313592U

JPH0313592U -

Info

Publication number: JPH0313592U
Application number: JP7173589U
Authority: JP
Priority date: 1989-06-21
Filing date: 1989-06-21
Publication date: 1991-02-12

Description

[Brief explanation of drawings]

第１図はこの考案の機能ブロツク図、第２図は
実施例のブロツク構成図、第３図は登録処理を示
すフローチヤート、第４図は点検処理を示すフロ
ーチヤート、第５図は第４図におけるレポート出
力例を示す図である。１……ＣＰＵ、２……キー入力部、２ａ……置
数キー、２ｂ……時間帯情報キー、３……ＲＯＭ
、４……ＲＡＭ、６……印字部、Ｍ１……時間帯
別メモリ、Ｍ３……時間帯情報設定メモリ、ＳＷ
……モード切替スイツチ。 Fig. 1 is a functional block diagram of this invention, Fig. 2 is a block diagram of an embodiment, Fig. 3 is a flowchart showing the registration process, Fig. 4 is a flowchart showing the inspection process, and Fig. 5 is a flowchart showing the inspection process. It is a figure which shows the report output example in a figure. 1...CPU, 2...Key input section, 2a...Number key, 2b...Time zone information key, 3...ROM
, 4...RAM, 6...Printing section, M1...Time zone specific memory, M3...Time zone information setting memory, SW
...Mode changeover switch.

Claims

[Scope of Claim for Utility Model Registration] A setting storage means for setting and storing time zones; a totalizing means for summing the input classification data for each category for each time period set and stored in the setting storage means; A storage means for storing the cumulative data accumulated by the cumulative totaling means in correspondence with classification data and time period data, and outputting each cumulative data in the storage means in correspondence with classification data and time period data. A data processing device characterized by comprising: an output means for outputting data;