JPH03131061A - Input circuit - Google Patents

Abstract

PURPOSE:To increase resistance to external noise by inserting a capacitance composed of a substrate, a gate film and a gate material and a resistor between an input terminal and a MIS type semiconductor input element at a first stage in a MIS type semiconductor integrated circuit having two layers or more of metallic wiring layers. CONSTITUTION:A low-pass filter by a capacitance consisting of a substrate, a gate film and a gate material and a resistor is inserted between the input terminal of a MIS type semiconductor integrated circuit and a MIS type semiconductor input element at a first stage, thus removing impulsive noises caused by foreign electromagnetic waves, etc., then preventing the malfunction of the integrated circuit. When impulsive noises are input to the input terminal 1, noises are not propagated to the input element at the first stage directly by a capacitance-resistance circuit 3, and energy having potential exceeding supply potential (5: VDD, 6: VSS) is absorbed to a power supply on the VDD side or the VSS side by the diode of an input protective circuit and the MIS type element during that time.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an input circuit for an MIS type semiconductor integrated circuit, and more particularly to an input circuit with improved resistance to external noise.

[Summary of the Invention] A low-pass filter is constructed between the input terminal of the MIS type semiconductor integrated circuit and the first-stage MIS type element by the capacitance and resistance of the base, gate film, and gate material, and a low-pass filter is formed between the input terminal of the MIS type semiconductor integrated circuit and the first stage MIS type element. Eliminates impulsive noise and prevents malfunction of integrated circuits.

[Prior Art] Conventionally, countermeasures for MIS type semiconductor integrated circuits include an input protection circuit to prevent electrostatic damage, a Schmitt trigger input circuit, and the use of polysilicon for wiring layers.

In addition, since the input response of the MIS type element itself was slow, external noise immunity did not pose a practical problem. Due to the loss of the filtering effect of the wiring layer due to two-layer metal wiring and automatic placement and wiring technology, external noise immunity has been reduced, which has become a practical problem.The present invention eliminates such drawbacks and improves external noise immunity. The present invention provides an input circuit with

[Means for Solving the Problems 1] The present invention provides a low-pass filter using capacitance and resistance formed by a substrate, a gate film, and a gate material between an input terminal of an MIS type semiconductor integrated circuit and a first-stage MIS type semiconductor input element. By inserting this, impulse noise caused by external electromagnetic waves etc. is removed and malfunction of the integrated circuit is prevented.

[Example] Fig. 1 shows a schematic diagram of an implementation circuit of the present invention, and Fig. 2(a) shows a schematic diagram of an implementation circuit of the present invention.
1(b) shows a mask layout diagram and a cross-sectional structure of capacitance and resistance formed by the substrate, gate film, and gate material of the present invention, which is the capacitance-resistance circuit 3 of FIG. 1. As shown in Figure 2, 13
: A gate material made of polycrystalline silicon, 14: A gate film which is a thin insulating film, and 17: An N-substrate to which Voo is applied, constitute a capacitance and a resistance. These are manufactured in a manufacturing process for manufacturing normal MIS type semiconductor devices. That is, the resistor is constructed by bending a polycrystalline silicon gate material having a higher resistivity than the metal wiring 11 such as Aff as shown in FIG. 2 to lengthen the wiring. Further, a capacitance is formed between the gate material 13 and the substrate 17 with the gate film 14 interposed therebetween.

Figure 1, 1: When impulsive noise is input to the input terminal, 3: The capacitor/resistance circuit prevents the noise from directly propagating to the first stage input element, and during that time, the power supply potential (5:
Energy with a potential exceeding Vl, , 6: V, , ) is removed by the diode and MIS type element of the input protection circuit
It is absorbed into the power supply on the OO side or the V,3 side. The residual energy of the noise that falls within the ti source voltage passes through the capacitance/resistance circuit and propagates to the first stage input element, but due to the low-pass filter characteristics of the capacitance/resistance circuit, the noise that reaches the first stage input element is It no longer has a potential that can invert the first stage input element.

In this embodiment, a complementary MIS inverter circuit is used as the first stage input element, but of course, if a Schmitt trigger circuit is used, the noise tolerance will be further improved. Furthermore, by applying this embodiment to an output circuit with minute output capability,
It is also possible to absorb external noise energy with the output protection circuit, reduce noise propagation to the internal circuit, and prevent malfunction of the internal circuit.

In this example, ■. . Although a capacitor is formed between the control source and the gate material, a capacitor may be formed between the gate material and the P well to which (2) is applied.

[Effect of the invention] According to the present invention, M
The impulsive external noise resistance of IS-type semiconductor integrated circuits has been improved so that it no longer poses a practical problem, and the case in which the integrated circuit is mounted can be made of only plastic parts, shortening the manufacturing period and lowering the cost of parts. I can do it.

Furthermore, since it can be manufactured in the same manufacturing process as a normal MIS type semiconductor integrated circuit, it has the advantage of not causing an increase in the price of semiconductor integrated circuits.

[Brief explanation of the drawing]

FIG. 1 is a schematic diagram of an implementation circuit of the present invention, and FIG. 2(a) (
b) is a mask layout diagram of capacitance and resistance due to the substrate, gate film, and gate material of the present invention (a), and A-A in (a)
Structural cross-sectional view between ' (b). 4 ・ 5 ・ 6 ・ 11 ・ 12 ・ 13 ・ 14 ・ 15 ・ l 6 ・ l 7 ・・Input terminal・Input protection circuit・Capacitance/resistance circuit by substrate, gate film, and gate material・First stage input element・Positive side power supply・Negative side power supply ・Metal wiring layer ・Contact hole ・Gate material ・Gate film ・Second field insulation film ・Field insulation film ・Semiconductor substrate and above

Claims (1)

[Claims] In an MIS type semiconductor integrated circuit having two or more metal wiring layers, capacitance and resistance are inserted between the input terminal and the first-stage MIS type semiconductor input element using a substrate, a gate film, and a gate material. input circuit.