JPH0312736A - Method and device for processing merge - Google Patents

Abstract

PURPOSE:To facilitate a merge process even if the number of records is unknown in a record train by adding a final record identifier and a train identifier to each record of a sorted record train, discriminating the train to be selected next with the train identifier and discriminating the end of a record train with a record identifier respectively. CONSTITUTION:An input circuit 1 reads the records out of a memory 21, and a sorting circuit 2 sorts the maximum K units of records. These sorted records are outputted from an output circuit 5 via a discriminating circuit 3. Each record includes a sort data KEY, a record identifier SID, and a final record identifier EOS. The SIDs included in each i-th record string are all equal to (i). The final record of a train has its EOS equal to 1 and other records have the EOSs equal to 0 respectively. A discriminating circuit 3 discriminates the outputs of the circuit 2 into three types. An output circuit 5 collects the sorting data received from the circuit 3, a new data train identifier 9 received from a control circuit 7, and a final record identifier 17 to produce an output record. Then the circuit 7 controls an entire merge process. In such a constitution, the merge process is facilitated even if the number of records is unknown in a record train.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to merging processing of merging a plurality of pre-sorted record strings into a single record string, and particularly relates to merging of a plurality of merged outputs. The present invention relates to a merge processing method and apparatus suitable for multi-stage merge processing.

[Conventional technology]

Generally, merging processing is performed by re-sorting multiple sorted record strings stored in memory into a single record string using a sorting circuit.Normally, this merging processing consists of two processing phases. . In the first processing phase, the first record is read from each of a plurality of record strings stored in the memory and input to the sorting circuit. The sorting circuit selects the smallest or largest record from the plurality of input records and outputs it as the first merge result. The remaining records are held in the sorting circuit.Next, in the second processing phase, the second record of the record string to which the record output as the merge result belongs is read from the memory and input to the sorting circuit.

The sorting circuit selects the smallest or largest record from the held records and the input records, and outputs it as the second merge result. Thereafter, the merging process is completed by repeating this second processing phase until all records of the plurality of record strings are read from the memory.

Conventionally, in performing the above second processing phase.

An identifier (for example, a bank address) for identifying the record string to which the record belongs is added to the record input to the sorting circuit in advance, and by referring to the identifier of the record output from the sorting circuit, the next The record column to which the record to be read from memory belongs is determined.

Note that, as a known document related to this type of merging process, for example, Japanese Patent Laid-Open No. 61-42031 can be cited.

[Problem to be solved by the invention]

The above-mentioned conventional technology does not consider detecting the completion of output of all records in a certain record string, and either sets the number of records included in each record string to be constant, or
Alternatively, if the number of records is different, it is necessary to know the number in advance. If the number of records included in each data string is unknown, merging processing is impossible. For example, always have the value 110 I
It is conceivable to place + sort data (key) to indicate the end of the record string, but since "0'" cannot be included as the data expressed by the record, and the record with the value 11011 is to be sorted ( Problems such as sorting results (judgment that the record string is at the end), time loss, etc. occur.

SUMMARY OF THE INVENTION An object of the present invention is to provide a merging method and apparatus that allows easy merging even if the number of records included in each record string is unknown.

Another object of the present invention is to provide a merge processing method and apparatus that can easily implement multi-stage merge processing for further merging a plurality of merge output record strings.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a method for merging multiple pre-sorted record columns to output one sorted record column. The present invention is characterized in that a final record identifier indicating whether or not the record is the last record in the record string to which the record belongs, and a record string identifier for identifying the record string to which the record belongs are added to the record. Furthermore, each record in the record string to be sorted into one record string is outputted with a record string identifier that identifies the record string and a final record identifier that indicates whether or not it is the final record. .

[For production]

The record string to which the record to be read from the memory belongs is determined based on the record string identifier of the record output from the sorting circuit, and the corresponding record is read from the memory. This operation is repeated and the number of times a record with a final record string identifier indicating the end of the record string is output is counted. When this count value matches the number of record strings to be merged, it means that there are no unprocessed records left, so the merge process is terminated. As a result, even if the number of records included in each record string is unknown, merging processing can be easily performed without placing sort data such as the value 110 I+ at the end of the record string.

In addition, by adding a record string identifier and a final record identifier to each record in a sorted record string, multi-stage merging processing that further merges record strings resulting from multiple merges can be easily performed using the same processing format. can be realized.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. Each contains an arbitrary number of records (K>
The record string 1) is stored in the memory 21. The input circuit 1 gives the start address of the selected record string to the address line 23, reads the code of the selected record string from the memory 21 via the data line 22, and divides the records read from the memory 21 into the maximum number of records. Records are sorted by a sorting circuit 2 capable of sorting records, and output from an output circuit 5 to an output line 10 via a data discrimination circuit 3. Each record has a KEY as shown in Figure 2.

It consists of parts SID and EO5, which are sort data, record string identifier, and final record identifier, respectively. The record string identifier SID included in the i-th record string (i=1, 2, . . . , K) among the book record strings stored in the memory 21 is all i. Also, the last record of each of the K record strings has a final record identifier EO5 of 1, and for other records, EO5 is 0.
It is.

The data discrimination circuit 3 discriminates the output records from the sorting circuit 2 into sort data KEY, record string identifier SID, and final record EO5, and sends them to the output circuit 5, selectors 1 and 8, and control circuit 7, respectively. In the output circuit 5, the discrimination circuit 3
The sort data KEY from , the new data string identifier 9 given from the control circuit 7 and the new final record identifier 17 are put together to create an output record. A control circuit 7 controls the entire merge process.

Next, the operation of the present merge processing apparatus will be explained with reference to FIGS. 3 and 4. Since the difference between ascending order sorting and descending order sorting is not important in explaining the operation, ascending order sorting will be explained hereafter, but descending order sorting is also possible in the same way. FIG. 3 is a diagram showing a time chart of merge processing. Also, the fourth
The figure is a flowchart showing control of merge processing. The merge process consists of two phases: merge 1 and merge 2.

In the merge 1, the first records of each record string are taken out one by one from the memory 21 and stored in the sorting circuit 2. The control circuit 7 has a counter for counting record strings, and has a selector 1 controlled by a signal 1; A19.
8, the count value 20 is set in the input circuit 1 as the record string identification signal 24, and the signal line 14 is connected to the GE
Send T signal. The input circuit 1 has address registers corresponding to the record strings stored in the memory 21, selects the address register corresponding to the record string identification signal 24, and inputs the address register to the memory via the address line 23. 21
Output to. When the input circuit 1 receives the GET signal, it manually inputs the record read from the memory 21 to the output data line 22.

Furthermore, the input circuit 1 updates the contents of the address register corresponding to the record string identification signal 24 so that it becomes the address of the record having the next smallest value in the corresponding record string, and the input circuit 1 updates the contents of the address register corresponding to the record string identification signal 24 so that it becomes the address of the record having the next smallest value in the corresponding record string. Be prepared in case a request comes. Next, the control circuit 7 sends a PUSH signal to the sorting circuit 2 from the signal line 15. In response to this signal, the sorting circuit 2 reads the Lou code from the input circuit 1 and compares it with the record held internally up to that point.

The control circuit 7 adds ■ to the internal counter, compares it with the upper limit value, and repeats the above operation while the counter shows the following value. Each record column in memory 21 is sorted in advance.

The first record read in So 1-Circuit 2 will have the respective minimum value in each record string.

When merge 1 is completed, records with different numbers of 510 are stored in sort 1 to circuit 2, and sort circuit 2 sorts these records and selects the smallest record from among them. decide. Since the input record is the smallest record in each record string, the smallest record determined in merge 1 is the smallest record among all records. When sorting circuit 2 receives a request to retrieve records, it outputs the smallest record out of the maximum number of records it holds internally, so the first record output in the subsequent merge 2 is the smallest record out of all the records. It is.

In merge 2, the roux code is taken out from the sorting circuit 2 and outputted from the output circuit 5 via the data discrimination circuit 3, and then the next record is taken out from the memory 21 by the input circuit 1, stored in the sorting circuit 2, and sorted (merged). This operation is repeated until EO8 are output from the sorting circuit 2.

The control circuit 7 first controls the selector 18 via the signal line 19 so that the output SID of the data discrimination circuit 3 becomes the record identification signal 24 of the input circuit 1, and also initializes an internal counter. Next, the control circuit 7 sends the signal line 1 to the sorting circuit 2.
When a POP signal is sent from the sorting circuit 6, the sorting circuit 2 outputs the smallest record among the records stored therein to the data discrimination circuit 3. The data discrimination circuit 3 discriminates the input record into SID, KEY, and EO8, and outputs them to signal lines 18, 13.12, respectively. The output circuit 5 outputs the sort data KEY from the data discrimination circuit 3, the new data string identifier 9 and the new final data identifier 1 from the control circuit 7.
7 and outputs it from the output line 10 as data in the record format shown in FIG. Here, the new data string identifier 9 is set to a fixed value by the control circuit 7. The fixed value indicates a record string obtained by merging records.

The new final data identifier 17 is the number of EOs as described below.
This is a signal that becomes 1 when 8 is output, and the Kth E
It is 1 only for output data corresponding to O8, and is O for other output data.

The control circuit 7 adds 1 to the internal counter when the output EO8 of the data discrimination circuit 3 is 1. A record with EO8 of 1 is the last record in the record string and is the largest record in this record string, so the fact that this record was output means that all the record strings to which this record belonged are in memory. 21. When the internal counter reaches a value greater than K, the control port/path 7 sets the new final data identifier 17 to 1, indicating that the output data is the last record of the partial record sequence being created. Since all of the record columns have been output, the merge process ends.

If EO8 is O, the output record is the data of the record string indicated by SID, and there are still records to be processed in the record string. At this time, candidates for the next smallest record to be output include the record in the sorting circuit 2 or the next record in the record string indicated by the SID in the memory 21. Therefore, in order to compare these records, the output S of the data discrimination circuit 3
The next record in the record string indicated by the ID must be read from the memory 21 and input to the sorting circuit 2 manually.

At the beginning of merge 2 in the time chart in Figure 3, the SID
The sorting circuit 2 outputs a key whose value is i, and this E
Since O5 is O, the control circuit 7 provides the GET signal to the input circuit 1. At this time, 5ID(i) is given to the input circuit 1 as the record identification signal 24 from the data discrimination circuit 3 via the selector 18, so the input circuit 1 is set to 1]
The input circuit 1 selects the address register of the record string, outputs the address to the memory 21, takes out the next code from the (address of the first record).

Subsequently, the control circuit 7 connects the signal line 15 to the PUS II
It is output to the double signal sorting circuit 2. As a result, the record is taken into the sorting circuit 2. In sorting circuit 2,
Compares the record held internally with the record imported and determines the next record to be output. In FIG. 3, the next output record is the record of the fifth record string. Thereafter, similar operations are repeated, and in FIG. 3, when the last record of the i-th record string is taken out from the sorting circuit 2, EO8 becomes 1. At this time, the control circuit 7 adds 1 to the internal counter and continues < G E T
.

The PUSH signals are not output, and only the POI) signal is output to the sorting circuit 2. The sorting circuit 2 outputs the smallest record held internally.

By repeating the above series of operations until the internal counter of the control circuit 7 counts EO3, merging of record strings is accomplished.

FIG. 5 shows an example of the configuration of the input circuit 1. The input circuit 1 includes a record buffer 101, an address register 102 . It consists of an adder 103. The record string identification signal 24 selects one of the registers in the address register 102 and outputs its value to the address line 23. When the GET signal 14 is input from the control circuit 7, the data on the output data line 22 is taken into the record buffer 101. At this time, an address updated by the record length by the adder 103 is set in the corresponding register of the address register 102 selected by the record string identification signal 24.

FIG. 6 shows an example of the configuration of the output circuit 5. Registers 501 that hold output records are KEY and SID.

The KEY output signals 13 . New data string identifier 9 from control circuit 7. The new final data identifier 17 is input. These three signals are output together to the output line 10.

FIG. 7 shows an example of the configuration of the sorting circuit 2. Saw 1-Circuit 2
is configured by arranging K/2 sort cells 201 in series, each consisting of a comparison transfer unit 203, a first memory 202, and a second memory 204. Sort control signal PUS (not shown)
H,POP determines the data transfer direction of all sort cells. That is, when the PUSH signal is applied, each saw 1-cell transfers the record in the first or second memory having the larger value to the right. At this time, each saw 1-cell is connected to the left cell or the input terminal 20.
Manually input record 1- from 6 to the memory vacated by the transfer,
At the same time, the remaining memory records and human records are compared. When the POP signal is input, each sorting cell conversely transfers the record in the first or second memory having a smaller value to the left side, and outputs the smallest record from the output terminal 205. At this time, each sort cell manually inputs records from the right cell to the memory vacated by the transfer, and at the same time compares the input record with the remaining memory. In this way, the sort circuit 2 compares and transfers the maximum number of records input from the sort input terminal 206 at the same time as the input,
When an output request comes, the smallest record among the manually input records is output from the output terminal 205.

Although one embodiment of the present invention has been described above, the present invention is not limited to the above embodiment. , output the output data string to memory, or input the last record and record string identifier at any position in the data as long as it does not affect sorting.
Many modifications are possible, such as setting it to n or adding record string identifiers only before and after the sorting circuit.

[Results of invention]

As is clear from the above description, the following effects can be obtained according to the present invention.

(1) Merge processing is possible even when the number of records included in each data string is unknown, and control can be changed as the record string ends with a relatively small amount of hardware.

(2) It is easy to make the output data string and the input data string of the merging processing device have the same format, and it is easy to perform multi-stage merging in which a plurality of merge results are collected and further merged.

(3) It is easy to determine the last record of a record string to be merged, and the end of the record string can be easily controlled with relatively little hardware.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of an embodiment of a merge processing device of the present invention,
Fig. 2 is a diagram showing an example of a record format, Fig. 3 is a timing chart for explaining the operation of Fig. 1, Fig. 4 is a flowchart of the control circuit of Fig. 1, and Fig. 5 is a diagram of the control circuit of Fig. 1. FIG. 6 is a specific configuration diagram of the input circuit, FIG. 6 is a specific configuration diagram of the output circuit of FIG. 1, and FIG. 7 is a specific configuration diagram of the sorting circuit of FIG. 1. 1... Input circuit, 2... Sorting circuit. 3...Data discrimination circuit, 5...Output circuit, 7...
- Control circuit, 21...Memory, KEY...Sort data, SID...Record string identifier, EO8...Last record identifier. 2nd Ward Figure 3 (TF, T PLle3?I oP oS jTLlow-=Jlgom-----day 11-"shi day-,
-f" u-++++++ 71L++* =
i-, -JTIJ low-0,--1''1-111□? - Sea 1 Merge 2 □
N4 Figure-1 Figure 5 Figure 6

Claims (3)

[Claims] (1) In a method of merging multiple pre-sorted record strings to output one sorted record string, each record in the plurality of pre-sorted record strings is given the information in the record string to which the record belongs. a final record identifier indicating whether it is the final record of
Adding a record string identifier that identifies the record string to which the record belongs, determining the record string of the next record to be selected using the record string identifier of the output record, and determining the end of the record string using the final record identifier. A merge processing method characterized by: (2) For each record in a record string that is sorted into one record string, a record string identifier that identifies the record string and a final record string identifier that indicates whether or not it is the last record are added and output. A merge processing method according to claim (1). (3) In a merge processing device that merges multiple pre-sorted record strings and outputs one sorted record string, each record is the last record in the record string to which it belongs. A memory that stores K (K>1) sorted record strings to which a final record identifier indicating whether or not the record belongs and a record string identifier that identifies the record string to which the record belongs; , sorting means for selecting and outputting the largest or smallest record among them; in the first stage, the first record of each record string is read from the memory and inputted to the sorting means;
In the step, reading the next record of the record string corresponding to the record string identifier of the record output from the sorting means from the memory and inputting it to the sorting means;
A merge processing device comprising: control means that repeats this process until K records whose final record identifier indicates the end of the record string are output.