JPH03127252A - Memory patch method for multiprocessor system - Google Patents

Abstract

PURPOSE:To omit the necessity to always monitor the restart of a processor by loading the patch data into the memory of a relevant processor and restarting this processor if a processor requiring the application of a patch is included among those processors that undergone the IPL (initial program loading). CONSTITUTION:When a desired patch to be applied to a memory only is pro duced, a maintenance console 6 rewrites the memory of the corresponding proces sor based on a command. Furthermore, the patch is registered into a patch control table 8. If an IPL control processor 1 detects a fault of a processor 3, for example, the processor 1 applies the IPL to the processor 3 and then refers to the table 8 after the end of the IPL. Thus, the processor 1 loads the patch data to the memory of the relevant processor and restarts this processor when a processor requiring the application of a patch is included among those processors that undergone the IPL. Thus, it is possible to always monitor the restart of the processor.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an initial program load (IPL) method of a multiprocessor system, more specifically, an IP
Memory hatching method at L time (prior art) Conventionally, the memory hatching method of this type of multiprocessor system is such that after the IPL to the processor is finished and restarted,
The memory was rewritten using commands from the system's maintenance console.

(Problem to be Solved by the Invention) Therefore, in the conventional memory patching method for multiprocessor systems, if a processor becomes IPLed due to a failure, the memory patch disappears, so it is necessary to constantly monitor the restart of the processor. did not become.

Furthermore, in the case of patching a program that is started upon restart, there is a drawback that there is no other way than to rewrite the IPLed program in the hard disk drive.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned drawbacks, and to provide a memory patching method for a multiprocessor system that does not require constant VP monitoring for restarting a processor and can also load a memory patch into a program that is started when restarting. be.

(Means for Solving the Problems) In order to achieve the above object, a memory patching method for a multiprocessor system according to the present invention includes a hard disk device that stores a program to be IPLed, and an IPL control that automatically restarts with lPLL when a failure occurs. A multiprocessor system comprising a processor and a plurality of processors whose IPL is controlled by the IPL control processor, and when the IPL control processor detects a failure in another processor, automatically performs IPL on that processor and restarts it. , a second table in which a plurality of patch input addresses, number of patch data bytes, and patch data can be registered in correspondence with patch management numbers; and a first table in which patch management numbers to be patched can be registered in correspondence with processor numbers. After IPL of the IPL control processor and after IPL of other processors, by referring to the first and second tables, there is a processor to which a patch should be applied among the IPLed processors. At that time, the patch data is loaded into the memory of that processor and restarted.

(Example) Hereinafter, the present invention will be explained in more detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a memory patching method for a multiprocessor system according to the present invention.

The IPL control processor 1 has memory patch management data 8.
A hard disk device 7 and a maintenance console 6 are connected. This IPL control processor 1, and the processors 2, 3 .
4 and 5 are connected in a loop path to form a multiprocessor system.

Figure 2 shows the Memo 9 patch management table, and the second table 8a in Figure 2 (a) is a table in which multiple patch input addresses, number of patch data bytes, and patch data can be registered in association with patch management numbers. be. Same figure (b)
The first table 8b is a table in which input optical processor numbers of each patch can be registered.

When a patch that you want to apply only to the memory occurs, use a command from the maintenance console 6 to rewrite the memory of the corresponding process, and then rewrite the memory of the corresponding process, and then update the two tables 8a and 8.
Register the patch in b.

Here, if the IPL control processor l detects a failure in the processor 3, the IPL control processor l performs an IPL on the processor 3, and after the IPL is completed,
With reference to , the patch management number of the patch to be installed is obtained from the processor 3's brochure+j number. Then, using the obtained patch management number, the patch input address, the number of patch data bytes, and the patch data are obtained by referring to the table 8a, and this patch is loaded into the memory of the processor 3 and restarted.

(Effects of the Invention) As explained above, the present invention stores, in the hard disk drive of the IPL control processor, the patch input address, the number of bytes of patch data, the input optical processor number, in addition to the program to be IPLed. It is configured to load patch data into memory and restart after IPL, so there is no need to constantly monitor the restart of the processor, and the memory patch is also loaded into the program that is started when restarting. It has the effect of being able to

[Brief Description of the Drawings] Fig. 1 is a block diagram showing an embodiment of a memory patching method for a multiprocessor system according to the present invention, and Fig. 2 shows configuration of memory patch management data referred to for loading patches into memory. It is a figure showing an example of a table. l...I P L f! i11 control processor 2.3,
4.5...Processor 6...Maintenance console 7...Hard disk device 8...Memory hatch management data 8a...Second table 8b...First table

Claims (1)

[Claims] A hard disk drive that stores the program to be IPLed, and an IPL that automatically IPLs and restarts when a failure occurs.
a control processor; and an IPL control processor for the IPL control processor;
comprising a plurality of processors controlled by the IPL control processor, and when the IPL control processor detects a failure in another processor,
In a multiprocessor system that automatically performs an IPL on a processor and restarts the processor, a second table is provided in the hard disk device in which a plurality of patch input addresses, number of patch data bytes, and patch data can be registered in association with patch management numbers; , a first table in which a patch management number to be patched corresponding to the processor number can be registered, and after the IPL of the IPL control processor and after the IPL of other processors, by referring to the first and second tables, the IPL A memory patch method for a multiprocessor system characterized in that when there is a processor to which a patch should be applied among the processed processors, patch data is loaded into the memory of that processor and the processor is restarted.