JPH0312520B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a stereo reproduction sound field expansion circuit for expanding a stereo reproduction sound field.

[Technical background of the invention and its problems]

Conventionally, there has been a circuit of this type as shown in FIG. In the figure, a difference signal between signals A and B input to the two left and right input channels L and R, respectively, is obtained, and this difference signal is added to a delay circuit with a delay time τ and a phase shifter 1 with a phase shift amount ψ. A phase shift delay is applied to the signal, and the resulting signal is added to the original signals of input channels L and R in an arbitrary ratio to output signals A' and R' to the two left and right output channels L' and R'.
Output B′ respectively.

As mentioned above, the difference signal between the two left and right input channels L and R originally contains a lot of delay and reverberation between the channels, but since a phase shift delay is added to this, it becomes even more audible. The sound field will sound as if it has expanded.

However, the delay circuits and phase shifters used in the circuits are expensive, especially those using BBDs (bucket bridge devices) in the delay circuits. Furthermore, if the delay time τ and the phase shift amount ψ are not set appropriately, the result will be unnatural, and it will be difficult to select the band and set the addition level. especially,
Those using BBD had problems such as narrow bands and a lack of high-frequency information, which is important for characterizing the direction of sound.

Therefore, as an example of a stereo reproduction sound field expansion circuit that can obtain a large, natural sound field expansion effect using a simple and inexpensive means without using a delay circuit or a phase shifter, Fig. The following are possible.

In the circuit shown in Figure 4, L and R are input channels where stereo left and right channel signals A and B are input, respectively.L' and R' are input channels where stereo left and right channel signals A' and B', which have been subjected to sound field expansion processing, are respectively input. This is the output channel for output. Reference numeral 10 denotes a difference signal detection circuit that takes the difference between left and right channel signals A and B input to input channels L and R, respectively, and outputs a difference signal; 12a and 12b denote left and right channel signals A that are input to input channels L and R, respectively. , B, respectively, and 14a and 14b are constant circuits that multiply the difference signal from the difference signal detection circuit 10 by a constant and output the result, and one of the circuits 14b acts as a phase inversion circuit that multiplies a constant and at the same time inverts the phase. 16a, 16b
is an adder circuit, one of which 16a adds and mixes the output signal of the low-pass filter 12a and the output signal of the constant circuit 14a, and outputs the resultant signal to the output channel L' as a left channel signal A', and the other 16b adds and mixes the output signal of the low-pass filter 12a and the output signal of the constant circuit 14a, and outputs the resultant signal to the output channel L' as the left channel signal A'. The output signal, a constant, and the output signal of the phase inversion circuit 14b are added together and outputted to the output channel R' as a right channel signal B'.

With the above configuration, the left and right output channels L′,
Channel signals A' and B' expressed by the following equations (1) and (2), respectively, are output to R'.

A'=|A| _LPF +K(A-B)...(1) B'=|B| _LPF +K(B-A)...(2) In equations (1) and (2), | | _LPF is a signal passed through low-pass filters 12a and 12b, respectively, and K is a constant multiplied by constant circuits 14a and 14b.

Figure 5 shows the output channel with the above configuration.
It is a graph showing the distribution of channel signals A' and B' obtained at L' and R', and is a graph showing the distribution of channel signals A' and B' obtained at L' and R'.
Localization signal component that passed through 12b |A| _LPF , |B|
Due to _{the LPF} X, the difference signal components K(A-B), K(B-
A), are respectively indicated by Y.

In addition, w _L and w _H in the figure are low-pass filters 12a,
The lower frequency and upper frequency of the cut-off region are respectively shown when 12b is a lug lead type. Note that Y decreases in the low frequency range because the difference signal contains almost no low frequency components.

With the above configuration, the delay and reverberation components included in the difference signal component create a sense of expansion, and by adding this difference signal component to each channel, the sense of expansion is expanded. However, this difference signal component is from 300Hz to
Since the signal is distributed over 1KHz, adding the difference signal component to each channel signal would significantly disrupt the tonal balance. Furthermore, as the difference signal component increases, the central localization of the low frequency component and the human voice is lost. Therefore, it is for this reason that the channel signal is passed through a low-pass filter such as 12a and 12b.If you add a difference signal component to the channel signal that has passed through a low-pass filter that has a lag lead characteristic that passes approximately 300Hz to 1KHz or less, You can get a solid sound field with central localization without losing balance. Incidentally, in order to suppress the distorted sound caused by mistracking of records, etc., the constant K in the above equations (1) and (2) may be given a frequency characteristic such that the high frequency range decreases.

FIG. 6 shows a specific circuit example of the circuit _{configuration} shown in FIG.
Together with R _4a , R _4b , R _5a , and R _5b , the difference signal detection circuit is
Arithmetic circuits Q ₂ and Q ₃ form an adder circuit, and arithmetic circuit Q ₄ forms a phase inversion circuit together with resistors R ₈ and R ₉ .
R _1a , R _1b , R _2a , R _2b , R _3a , R _3b and capacitors Ca and Cb form a first-order low-pass filter with lag lead characteristics, and resistors R _6a , R _7a , R _6b and
R _7b each form a constant circuit. In this circuit, R _4a , R _4b = R _5a , R _5b , R ₈
= R ₉ , the transfer characteristics are as shown in equations (3) and (4) below.

−A′=R ₆ /R ₁ +R ₂・1+jw/w _H /1+jw/w _L・A+R ₆ /R ₇ (A−B) …(3) −B′=R ₆ /R ₁ +R ₂・1+jw /w _H /1+jw/w _L・B+R ₆ /R ₇ (B-A) ...(4) In the above formula, w _L = 1/C (R ₁ R ₂ /R ₁ +R ₂ +R ₃ ) w _H = 1/CR ₃ , and the subscripts a and b attached to each resistor are omitted. It can be seen that these equations (3) and (4) correspond to the above equations (1) and (2), respectively.

Figure 7 shows the arithmetic circuit in the circuit of Figure 6.
An example will be shown in which the arithmetic circuit Q ₄ forming the phase inversion circuit is omitted by using the non-inverting input of Q ₃ . In this case, the resistance is set as R ₂ R ₁ to make the mixing ratio of the difference signal equal to channel L.
The values of R ₈ and R ₉ may be adjusted.

In addition, as another example of a stereo reproduction sound field expansion circuit configured without using a delay circuit or a phase shifter, the eighth
The one shown in the figure can be considered.

In the stereo reproduction sound field expansion circuit shown in Fig. 8,
L and R are input channels, L' and R' are output channels, 12a and 12b are low-pass filters with lag lead characteristics, 16a and 16b are adder circuits, 1
8a and 18b are constant circuits, and 20a and 20b are constant/phase inversion circuits.

In the above, channel signals A and B input to input channels L and R, respectively, are supplied to the constant circuit 1.
After being multiplied by a constant in 8a and 18b, the signals are applied to the first inputs of adder circuits 16a and 16b, and the high-frequency components are attenuated by low-pass filters 12a and 12b, and then the second inputs of adder circuits 16a and 16b are multiplied by constants. can also be added to the input. Addition circuit 16a, 1
A constant/phase inversion circuit 20 is connected to the third input of 6b.
Channel signals B and A whose phases are inverted and multiplied by a constant are applied by signals a and 20b, respectively. Addition circuits 16a, 16b are circuits 12a, 12b, 18a, 18b, 20a,
Channel signals A' and B', which are obtained by mixing the signals from 20b, are output to output channels L' and R'.

In the circuit shown in FIG. 8, the above equations (1) and (2) also hold, and the same effect as in the first example can be obtained.

FIG _. 9 shows _a specific circuit example of _the circuit configuration shown in FIG _.
Together with R _4b and R _5b , it constitutes a phase inversion circuit.

The stereo reproduction sound field expansion circuit described above with reference to FIGS. 6, 7, and 9 does not use a delay circuit or a phase shifter, and uses simple and inexpensive means to greatly expand the sound field without causing an unnatural feeling. effect can be obtained.

However, since each of the above-mentioned circuits needs to include at least three arithmetic circuits as constituent elements, it is not sufficient from the viewpoint of simplifying the circuit configuration and reducing costs thereby.

[Purpose of the invention]

The present invention has been made in order to eliminate the drawbacks of the conventional ones described above, and aims to further simplify the circuit configuration and reduce costs without sacrificing the large sound field expansion effect that does not give an unnatural feeling. The purpose of this invention is to provide a stereo reproduction sound field expansion circuit.

[Embodiments of the invention]

Embodiments of the present invention will be described below based on the drawings.

FIG. 1 is a circuit diagram showing an embodiment of a stereo reproduction sound field expansion circuit according to the present invention, in which L and R are stereo left and right channel signals A,
Input channels L' and R', into which signal B is input, are output channels that output stereo left and right channel signals A' and B', respectively, which have been subjected to sound field expansion processing. Q ₁₀ and Q ₁₁ are arithmetic circuits that perform addition and subtraction. In addition, resistors R _11a , R _12a , Ca and R _11b and R _12b ,
Cb each constitutes a lug-lead first-order low-pass filter, and resistors R _13a and R _14a and R _13b and R _14b constitute a constant circuit, respectively.

With the above configuration, the left and right output channels L′,
For R′, the following equations (5) and (6) are used, which are rewritten from the above equations (3) and (4).
Channel signals A′ and B′ respectively represented by are output.

A′=l{(1+jw/w _H /1+w/w _L )A+K′(A−
B)}...(5) B'=l{(1+jw/w _H /1+w/w _L )B+K'(B-
A)}...(6) In the above equation (5), if w≪w _L (<w _H ), then A'=l{A+K'(A-B)} = l(1+K')A-K' lB ……(7) If w≫w _H (>w _L ) and w is sufficiently large, A′=l{mA+K′(A-B)} =l(m+K′)A-K′lB ...(8) becomes. Note that l, K', and mb are constants, and m is expressed as m=w _H /w _L (9), which is the remaining amount ratio of the original signal of high frequency. The concept of the above signal processing level is illustrated in FIG. 2.

In the circuit of Fig. 1, when w≪w _L now,
The signal A' of the output channel L' is A' = (1 + R _14a / R _13b ) A - R _14a / R _13b B ... (10) When w≫w _H , the output channel
The signal A′ of L′ is A′=R _12a /R _11a +R _12a・(1+R _14a /R _13b )A−R _14
b /R _13b B ...(11) becomes. Comparing equations (7), (8) and (10), (11), K'l=R _14a /R _13a = R _14b /R _13b ...(12) l(1+K')=(1+R _14a /R _13a ) ... (13) l (m + K') = R _12a / R _11a + R _12a (1 + R _14a / R _13a ) ... (14) is obtained, and from the equations (12) to (14), l = 1 K' = R _14a / R _13a = R _14b / R _13b , m = R _12a −K'R _11a /
It becomes R _11a + R _12a . Also, A′=R _12a +1/jwCa/R _11a +R _12a +1/jwCa (1+K
′)−K′B=1+jwCa(R _12a −K′R _11a )/1+jwCa(R
_11a + R _12a )L+K'(A-B), so compare this equation with the above equation (6) and get w _L = 1/Ca (R _11a + R _12a ), w _H = 1/Ca (R _12a −K′R _11a ) = 1/mCa(R _11a +R _12a ).

_{Here ,} when _the remaining amount ratio m of the above formula (6) is calculated _{for FIG .} w _L respectively
If w _H ′, w _L ′, then w _H = 1/CaR _12a w _L = 1/Ca(R _11a + R _12a ), so m=w _L ′+K′(w _L −w _H )/w _H ′ becomes.

According to experiments, the best position is obtained when K'=1 to 2 and m=about 1/2 to 1/3. Also, w _L is several hundred ~
Set to 1KHz.

By substituting the above constants into equations (5) and (6), the following equation is obtained.

A′=1+jwmCa(R _11a +R _12a )/1+jwCa(R _1
1a +R _12a )・A+R _14a /R _13a (A-B) B′=1+jwmCb(R _11b +R _12b )/1+jwCb(R _1
1b +R _12b )・B+R _14b /R _13b (B-A) [Effects of the Invention] According to the present invention described above, instead of using a delay circuit or a phase shifter, two arithmetic circuits and a small number of resistors and To obtain an effective stereo reproduction sound field expansion circuit which is constituted by a capacitor, has a simple configuration, is inexpensive, and does not give an unnatural feeling.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the stereo reproduction sound field expansion circuit according to the present invention, FIG. 2 is a graph showing the processed signal level of the circuit of FIG. 1, and FIG. 3 is a block diagram showing an example of a conventional circuit. Figure 4 is a circuit configuration diagram that can be considered to solve the problem of the conventional circuit shown in Figure 3, Figure 5 is a graph showing the processed signal level of the circuit configuration shown in Figure 4, and Figure 6 is a graph showing the processed signal level of the circuit configuration shown in Figure 4. A circuit diagram showing a specific circuit configuration, Figure 7 is a circuit diagram with a part of Figure 6 changed, and Figure 8 is another circuit diagram that can be considered to solve the problem of the conventional circuit in Figure 3. , FIG. 9 is a circuit diagram showing a specific circuit of the circuit configuration of FIG. 8. L, R...Input channel, L', R'...Output channel, _Q10 , _Q11 ...Arithmetic circuit, _R11a , _R12a ,
R _11b , R _12b , R _13a , R _14a , R _13b , R _14b ...Resistance,
Ca, Cb...Capacitor, _R11a , _R12a , Ca...Low pass filter, _R11b , R12b, Cb...Low pass filter, _{R13a , R14a ...} Constant circuit, _R13b , _R14b
...Constant circuit.

Claims (1)

[Claims] 1. Two input channels L and R, two output channels L' and R', and the input channel L and the output channel.
two arithmetic circuits Q ₁₀ and Q ₁₁ provided between the input channel R and the output channel R', respectively; between the +input of the arithmetic circuit Q ₁₀ and the input channel L; The first order of two lug leads are provided between the positive input of the arithmetic circuit Q ₁₁ and the input channel R, and each consists of resistors R _11a and R _12a and a capacitor Ca, and resistors R _11b and R _12b and a capacitor Cb. a low pass filter, the input channel L and the output channel
R', and between the input channel R and the output channel L', each having a resistor.
two constant circuits each consisting of R _13b and R _14b and resistors R _13a and R _14a , and between the connection point between the resistors R _13a and R _14a of the constant circuit and the resistors R _13a and R _14a of the constant circuit. The connection point is connected to the - input of the arithmetic circuits _Q11 and _Q10, respectively, and the signal A input to one L of the two input channels L and R and the signal B input to the other R A stereo sound field expansion circuit characterized in that it processes and outputs signals A' and B' represented by the following formulas to two output channels L' and R', respectively. A'=1+jwmCa(R _11a +R _12a )/1+jwCa(R _11a +R _12a
)・A +R _14a /R _13a (A-B) B' = 1 + jwmCb (R _11b + R _12b ) / 1 + jwCb (R _11b + R _12b
)・B +R _14b /R _13b (B-A) However, m = R _12a −K′R _11a /R _11a +R _12a K′=R _14a /R _13a = R _14b /R _13b