JPH03123332U - - Google Patents
Info
- Publication number
- JPH03123332U JPH03123332U JP3110890U JP3110890U JPH03123332U JP H03123332 U JPH03123332 U JP H03123332U JP 3110890 U JP3110890 U JP 3110890U JP 3110890 U JP3110890 U JP 3110890U JP H03123332 U JPH03123332 U JP H03123332U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- field strength
- level
- detection circuit
- strength detection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000926 separation method Methods 0.000 claims description 8
- 238000001514 detection method Methods 0.000 claims description 7
- 230000005684 electric field Effects 0.000 claims description 3
- 230000007423 decrease Effects 0.000 claims 1
- 239000000203 mixture Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
Landscapes
- Noise Elimination (AREA)
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
Description
第１図及び第２図はこの考案に係るＦＭ受信機
の雑音低減回路の実施例を示し、第１図はブロツ
ク図、第２図は雑音低減状態を示す特性図である
。第３図乃至第６図は従来例を示し、第３図はブ
ロツク図、第４図は特性図、第５図はハイカツト
回路及びＭＰＸセパレーシヨン回路の制御を示す
ブロツク図、第６図Ａは電界強度に対するハイカ
ツト制御電圧及びセパレーシヨン制御電圧を示す
特性図、第６図Ｂはハイカツト制御電圧に対する
ハイカツト量を示す特性図、第６図Ｃはセパレー
シヨン制御電圧に対するセパレーシヨン量を示す
特性図である。
主な符号の説明、１……受信アンテナ、２……
フロントエンド、３……ＩＦアンプ、４……ＦＭ
検波回路、５……ハイカツト回路、６……ＭＰＸ
セパレーシヨン回路、６ａ……強制モノラル回路
、７……オートサーチ回路、８……オートサーチ
制御回路、９……電界強度検出回路、１０……Ｓ
メータ。
1 and 2 show an embodiment of a noise reduction circuit for an FM receiver according to this invention, FIG. 1 is a block diagram, and FIG. 2 is a characteristic diagram showing a noise reduction state. 3 to 6 show conventional examples, FIG. 3 is a block diagram, FIG. 4 is a characteristic diagram, FIG. 5 is a block diagram showing control of the high cut circuit and MPX separation circuit, and FIG. 6A is a block diagram. A characteristic diagram showing the high-cut control voltage and separation control voltage with respect to the electric field strength, FIG. 6B is a characteristic diagram showing the high-cut amount with respect to the high-cut control voltage, and FIG. 6C is a characteristic diagram showing the separation amount with respect to the separation control voltage. be. Explanation of main symbols, 1...Receiving antenna, 2...
Front end, 3...IF amplifier, 4...FM
Detection circuit, 5...high cut circuit, 6...MPX
Separation circuit, 6a...forced monaural circuit, 7...auto search circuit, 8...auto search control circuit, 9...field strength detection circuit, 10...S
meter.
Claims (1)
レベルを検出する電界強度検出回路と、電界強度
検出回路からの出力信号によつてオートサーチ回
路を制御するオートサーチ制御回路と、電界強度
検出回路の出力レベルによつて制御されるハイカ
ツト回路と、ＭＰＸ回路のステレオセパレーシヨ
ンを電界強度検出回路の出力信号によつて制御す
るセパレーシヨンブレンド回路とで構成されるＦ
Ｍ受信機の雑音低減回路において、 前記オートサーチ制御回路にオートサーチ停止
レベル判定手段と、強制モノラル駆動手段とを設
け、電界強度が弱電界になつて電界強度検出回路
より出力するレベルがオートサーチ動作の停止レ
ベルになると、ステレオセパレーシヨンを強制的
にモノラルレベルにし、更に、電界強度レベルが
低下するとハイカツト回路の動作を開始するよう
に構成したことを特徴とするＦＭ受信機の雑音低
減回路。[Claims for Utility Model Registration] A field strength detection circuit that detects a field strength level by inputting an IF signal from an IF amplifier, and an auto search control that controls an auto search circuit using an output signal from the field strength detection circuit. A high-cut circuit that is controlled by the output level of the field strength detection circuit, and a separation blend circuit that controls the stereo separation of the MPX circuit by the output signal of the field strength detection circuit.
In the noise reduction circuit of the M receiver, the auto search control circuit is provided with an auto search stop level determination means and a forced monaural drive means, and the level output from the field strength detection circuit when the electric field strength becomes weak is automatically searched. A noise reduction circuit for an FM receiver, characterized in that the stereo separation is forcibly set to a monaural level when the operation stops, and furthermore, when the electric field intensity level decreases, the high-cut circuit starts operating.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3110890U JPH03123332U (en) | 1990-03-28 | 1990-03-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3110890U JPH03123332U (en) | 1990-03-28 | 1990-03-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03123332U true JPH03123332U (en) | 1991-12-16 |
Family
ID=31533839
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3110890U Pending JPH03123332U (en) | 1990-03-28 | 1990-03-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03123332U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008171810A (en) * | 2007-01-10 | 2008-07-24 | Syspotek Corp | Liquid concentration control, and supply apparatus |
-
1990
- 1990-03-28 JP JP3110890U patent/JPH03123332U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008171810A (en) * | 2007-01-10 | 2008-07-24 | Syspotek Corp | Liquid concentration control, and supply apparatus |
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