JPH03119325A - Production of electrochromic element - Google Patents

Production of electrochromic element

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Publication number
JPH03119325A
JPH03119325A JP1256982A JP25698289A JPH03119325A JP H03119325 A JPH03119325 A JP H03119325A JP 1256982 A JP1256982 A JP 1256982A JP 25698289 A JP25698289 A JP 25698289A JP H03119325 A JPH03119325 A JP H03119325A
Authority
JP
Japan
Prior art keywords
layer
film
insulating layer
electrode
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1256982A
Other languages
Japanese (ja)
Inventor
Shinichi Kawate
信一 河手
Ryoji Fujiwara
良治 藤原
Etsuro Kishi
悦朗 貴志
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP1256982A priority Critical patent/JPH03119325A/en
Publication of JPH03119325A publication Critical patent/JPH03119325A/en
Pending legal-status Critical Current

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  • Electrochromic Elements, Electrophoresis, Or Variable Reflection Or Absorption Elements (AREA)

Abstract

PURPOSE:To obtain the EC element having a high response speed by forming insulating layers initially at a high substrate temp., then at a low temp. CONSTITUTION:The lamination of the insulating layers 4 is executed at the high substrate temp. then at the low substrate temp. at the time of forming the boundary with a 1st electrochromic layer 3. Namely, the insulating layers 4 are formed at the high substrate temp. in the initial period of the vapor deposition and are thereafter formed at the low substrate temp. The high substrate temp. refers to 90 to 180 deg.C, more preferably 90 to 120 deg.C. Advantage is taken out the characteristics at the time of the film formation at the respective temps. and simultaneously, the drawbacks in the film formation are eliminated by changing the substrate temp. at the time of the vapor deposition of the insulating layers 4 in such a manner. The EC element which has the excellent response speed and the good adhesive strength between the layers is obtd. in this way.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はエレクトロクロミック(以下ECという)素子
の製造方法に関し、更に詳しくは絶縁層の形成方法に特
徴を有するEC素子の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for manufacturing an electrochromic (hereinafter referred to as EC) element, and more particularly to a method for manufacturing an EC element characterized by a method for forming an insulating layer.

(従来の技術) EC現象とは、電圧を加えた時に生ずる可逆的な電気化
学反応(酸化・還元反応)の誘起により、物質の光吸収
域が変化し、物質が着色又は消色する現象をいう。
(Prior art) EC phenomenon is a phenomenon in which the light absorption range of a substance changes and the substance becomes colored or decolored due to the induction of reversible electrochemical reactions (oxidation/reduction reactions) that occur when voltage is applied. say.

かかるEC現象を利用する電気化学同着・消色素子をE
C素子と称し、例えば、可変NDフィルタ、防眩ミラー
、数字表示素子、X−Yマトリックスデイスプレィ、光
学シャッタ、絞り機構等に応用が期待されている。
Electrochemical adsorption/quenching molecules utilizing such EC phenomenon are called E.
It is called a C element and is expected to be applied to, for example, variable ND filters, anti-glare mirrors, numeric display elements, XY matrix displays, optical shutters, aperture mechanisms, etc.

上記従来のEC素子は、一般に第2図に示す如く、透明
な基板1の上に透明導電体膜よりなる第一電極2、陽極
側着色層である第一のECC84誘電体膜からなる絶縁
層4、陰極側着色層である第二のECC50び第二電極
6を順次積層してなるものである。
As shown in FIG. 2, the conventional EC element described above generally has a first electrode 2 made of a transparent conductive film on a transparent substrate 1, and an insulating layer made of a first ECC84 dielectric film which is a colored layer on the anode side. 4. The second ECC 50, which is a colored layer on the cathode side, and the second electrode 6 are sequentially laminated.

上記の構造において、基板lは一般的にはガラス板によ
って形成されるが、ガラスに限らず、アクリル板、ポリ
スチレン板、ポリカーボネート板等の透明なプラスチッ
ク板でもよい。
In the above structure, the substrate l is generally formed of a glass plate, but is not limited to glass, and may be a transparent plastic plate such as an acrylic plate, a polystyrene plate, or a polycarbonate plate.

陽極側着色層である第−EC層3は、例えば酸化イリジ
ウム(Ire、) 、酸化ニッケル(Nip、)、三酸
化クロム(Cr*0□)等によって形成される。誘電体
からなる中間絶縁層4は1例えば、五酸化タンタル(T
a*Os)、二酸化硅素(SiO□)等により代表され
る酸化物或は弗化リチウム(LiF)、弗化マグネシウ
ム(Mgh)等に代表される弗化物を用いて形成される
The -EC layer 3, which is a colored layer on the anode side, is formed of, for example, iridium oxide (Ire), nickel oxide (Nip), chromium trioxide (Cr*0□), or the like. The intermediate insulating layer 4 made of a dielectric material is made of, for example, tantalum pentoxide (T
a*Os), silicon dioxide (SiO□), or a fluoride such as lithium fluoride (LiF), magnesium fluoride (Mgh), etc.

又、陰極側着色層である第二EC層5は、三酸化タング
ステン(WOs)、二酸化タングステン(WO□)、二
酸化モリブデン(MOOI) 、三酸化モリブデン(M
oOs) 、五酸化バナジウム(vtos)等を用いて
形成される。
The second EC layer 5, which is a colored layer on the cathode side, is made of tungsten trioxide (WOs), tungsten dioxide (WO□), molybdenum dioxide (MOOI), molybdenum trioxide (M
oOs), vanadium pentoxide (vtos), etc.

以上の様な構造をもつ全固体型EC素子は、第一電極2
と第二電極6との間に電圧を印加することによりEC素
子中で電気化学的反応が起きて物質の光波長域が変化し
、着色・消色なする。
The all-solid-state EC element with the above structure has a first electrode 2
By applying a voltage between the material and the second electrode 6, an electrochemical reaction occurs in the EC element, and the light wavelength range of the substance changes, causing coloring and decoloring.

かかる着色機構は、例えば、ECC50の水素イオンH
+と電子e−とのダブルインジェクションによるブロン
ズ形成にあると云われている。
Such a coloring mechanism is, for example, the hydrogen ion H of ECC50.
It is said that bronze is formed by double injection of + and electron e-.

例えば、EC物質としてWO2を用いた場合には次の(
1)式で表される酸化還元反応 WOs + xH”+ xe−−e H1lWO3(1
)に従って形成された夕、ングステンブロンズH,WO
3が青色に呈色する。一方、ここで印加電圧を逆転すれ
ば、消色状態になる。
For example, when WO2 is used as the EC substance, the following (
1) Redox reaction WOs + xH"+ xe--e H1lWO3(1
) formed in accordance with Ngsten Bronze H, WO
3 turns blue. On the other hand, if the applied voltage is reversed here, a colorless state is achieved.

(1)式の様な反応は、全固体型のEC素子においては
、素子内部の絶縁層によって、水素イオンH゛が供給さ
れて着色する。
In the reaction shown in equation (1), in an all-solid-state EC element, hydrogen ions H' are supplied by an insulating layer inside the element and the element is colored.

上記の如き従来技術のEC素子の形成工程においては、
第−EC層3上に真空蒸着法等により一定の条件で絶縁
層4を積層していた。
In the process of forming the conventional EC element as described above,
The insulating layer 4 was laminated on the -EC layer 3 under certain conditions by vacuum evaporation or the like.

(発明が解決しようとしている問題点)上記の如き従来
のEC素子は、第−EC層3の表面形状が第2図の如く
凹凸に富み、熱的に不安定な場合には、 (1)層3の表面形状が凹凸であるので、絶縁層4の形
成が低温で行われると、両者の界面の接合が適切でなく
、EC素子の特性劣化を生ずる。
(Problems to be Solved by the Invention) In the conventional EC element as described above, when the surface shape of the -th EC layer 3 is uneven as shown in Fig. 2 and is thermally unstable, (1) Since the surface of the layer 3 is uneven, if the insulating layer 4 is formed at a low temperature, the interface between the two will not be properly bonded, resulting in deterioration of the characteristics of the EC element.

(2)絶縁層4の形成が高温で行なわれると、眉3が熱
的に不安定である為、EC素子の特性劣化を生ずる。
(2) If the insulating layer 4 is formed at a high temperature, the eyebrows 3 are thermally unstable, resulting in deterioration of the characteristics of the EC element.

という問題点があり、EC素子としての応答速度が十分
得られなかった。
Due to this problem, a sufficient response speed as an EC element could not be obtained.

具体的には、第−EC層3が陽極酸化法によるIrOx
膜で、絶縁層4が電子ビーム法によるTa2es膜の場
合には、Ta*Osの膜蒸着時に輻射熱等の影響で80
℃以上の熱がIrOx膜に断続的に5分間以上加わると
、Ir(1+膜の一部が徐々に還元されて金属的になり
、EC素子の特性劣化を生ずる。又、その程度は、温度
が高く時間が長いほど大きくなる。この問題点を解決す
る為には、基板を冷却して80℃以下に保てばよい。
Specifically, the -EC layer 3 is made of IrOx by an anodic oxidation method.
In the case where the insulating layer 4 is a Ta2es film formed by electron beam method, 80
When heat of ℃ or more is applied intermittently to the IrOx film for 5 minutes or more, a part of the Ir(1+ film is gradually reduced and becomes metallic, causing deterioration of the characteristics of the EC element.The extent of this will depend on the temperature The higher the temperature and the longer the time, the larger the temperature becomes.In order to solve this problem, the substrate should be cooled and kept at 80° C. or lower.

しかしながら、蒸着当初、Ir(1+膜3と絶縁層4と
の界面を形成する場合、IrOx膜の表面形状が複雑な
為、基板温度が90℃以下であると、蒸着粒子に与られ
るエネルギーが小さく、膜同士の密着力が低下し、空間
が生じる等して、着・消色に必要なイオンの輸送が困難
になって、特性劣化を生じてしまうという欠点がある。
However, when forming the interface between the Ir(1+ film 3 and the insulating layer 4) at the beginning of vapor deposition, the surface shape of the IrOx film is complex, so if the substrate temperature is below 90°C, the energy imparted to the vapor deposited particles is small. However, there is a drawback that the adhesion between the films decreases, creating spaces, etc., making it difficult to transport the ions necessary for coloring and decoloring, resulting in deterioration of characteristics.

以上の通り、絶縁層4を一定の基板温度の条件で形成す
ると、EC素子としての応答速度が不十分であるという
欠点があった。
As described above, when the insulating layer 4 is formed under the condition of a constant substrate temperature, there is a drawback that the response speed as an EC element is insufficient.

従って本発明の目的は、上記従来例の絶縁層成膜上の問
題点を解決し、成膜時に第−EC層の劣化がな(、良好
な特性かを有するEC素子を提供することである。。
Therefore, an object of the present invention is to solve the above-mentioned problems in forming an insulating layer in the conventional example, and to provide an EC element having good characteristics without deterioration of the first EC layer during film formation. ..

(問題を解決する為の手段) 上記目的は以下の本発明によって達成される。(Means to solve the problem) The above objects are achieved by the present invention as described below.

即ち、本発明は、基板上の導電体膜よりなる第一電極と
、陽極側着色層である第−EC層と、−誘電体膜よりな
るイオン良導体の電子絶縁層と、陰極側着色層である第
二EC層と、導電体膜よりなる第二電極とを順次積層す
るEC素子の製造方法において、上記絶縁層の積層を、
上記第−EC層との界面を形成する際には高い基板温度
で、その後は低い基板温度で行うことを特徴とするEC
素子の製造方法である。
That is, the present invention comprises a first electrode made of a conductive film on a substrate, an -EC layer which is a colored layer on the anode side, an electronic insulation layer of a good ionic conductor made of a -dielectric film, and a colored layer on the cathode side. In a method for manufacturing an EC element in which a certain second EC layer and a second electrode made of a conductive film are sequentially laminated, the lamination of the insulating layers is
EC characterized in that the interface with the -EC layer is formed at a high substrate temperature, and thereafter at a low substrate temperature.
This is a method for manufacturing an element.

(作  用) 上述の通り、絶縁層の蒸着時の基板温度を変えることに
より、夫々の温度における成膜時の特徴を生かすと共に
、同時に成膜上の欠点をなくすることによって、従来例
よりも応答速度に優れ且つ各層間の密着力が良好なEC
素子が提供される。
(Function) As mentioned above, by changing the substrate temperature during vapor deposition of the insulating layer, the characteristics of film formation at each temperature are utilized, and at the same time, the defects in film formation are eliminated, thereby making the process more efficient than conventional methods. EC with excellent response speed and good adhesion between each layer
An element is provided.

(好ましい実施態様) 次に好ましい実施態様を挙げて本発明を更に具体的に説
明する。
(Preferred Embodiments) Next, the present invention will be described in more detail by citing preferred embodiments.

本発明で製造されるEC素子は、第1図に示す様に、そ
の構成は従来例と同様であり、又、各構成要素である透
明基板l、第一電極2、第−EC層3、中間絶縁層4、
第二ECC50び第二電極等も従来例と同様な材料及び
方法で形成及び積層される。
As shown in FIG. 1, the EC element manufactured by the present invention has the same structure as the conventional example, and each component is a transparent substrate l, a first electrode 2, a -th EC layer 3, intermediate insulating layer 4,
The second ECC 50, second electrode, etc. are also formed and laminated using the same materials and methods as in the conventional example.

本発明の特徴はその絶縁層の形成方法に特徴があり、絶
縁層4を形成する工程において、第−EC層との界面を
形成する場合、即ち、蒸着の初期には高い基板温度で絶
縁層4を形成し、その後は低い基板温度で形成する。こ
こで高い基板温度とは、90℃乃至180℃、より好ま
しくは90℃乃至120℃である。
The present invention is characterized by the method of forming the insulating layer. In the step of forming the insulating layer 4, when forming the interface with the -EC layer, that is, in the early stage of vapor deposition, the insulating layer is formed at a high substrate temperature. 4 is formed, and the subsequent formations are performed at a low substrate temperature. Here, the high substrate temperature is 90°C to 180°C, more preferably 90°C to 120°C.

又、高い基板温度を保持する時間は、あまり長すぎると
EC素子が熱劣化を生じる為短時間とする必要がある。
Further, the time period for which the high substrate temperature is maintained needs to be short because if it is too long, the EC element will suffer thermal deterioration.

好ましくは、0.5分間乃至5分間程度がよい。Preferably, the time is about 0.5 minutes to 5 minutes.

上記の如(第−EC層との界面に高い基板温度で絶縁層
を形成後は、残りの絶縁層は低い基板温度で行う。ここ
で低い基板温度とは、好ましくは40℃乃至80℃程度
であり、より好ましくは40℃乃至60℃である。
As described above (after forming an insulating layer at a high substrate temperature at the interface with the -EC layer), the remaining insulating layers are formed at a low substrate temperature. Here, the low substrate temperature is preferably about 40°C to 80°C. The temperature is more preferably 40°C to 60°C.

又、上記において高い基板温度で蒸着する絶縁層は、全
体の絶縁層の1乃至10%程度の厚みであるのが好まし
い。
Further, in the above, the insulating layer deposited at a high substrate temperature preferably has a thickness of about 1 to 10% of the entire insulating layer.

又、絶縁層の厚みに対する基板温度の勾配は直線的に低
下させてもよいし、又、段階的に低下させてもよい。基
板温度の設定は温度コントローラにより行うのが好まし
い。
Further, the gradient of the substrate temperature with respect to the thickness of the insulating layer may be reduced linearly or stepwise. Preferably, the substrate temperature is set using a temperature controller.

第1図はこの様な本発明において、絶縁層4を基板温度
を変えて形成したEC素子の断面を模式的に示す図であ
る。4aは、表面が凹凸の第−EC層3と接合面が良好
になる高い温度で、且つ熱劣化を生じない時間内で形成
した絶縁層の一部であり、4bは、第−EC層3が熱劣
化を生じない程度の低い温度で形成した絶縁層の残りの
部分である。
FIG. 1 is a diagram schematically showing a cross section of an EC element in which the insulating layer 4 is formed by changing the substrate temperature in the present invention. 4a is a part of an insulating layer formed at a high temperature to form a good bonding surface with the -EC layer 3 having an uneven surface, and within a time period that does not cause thermal deterioration; 4b is a part of the insulating layer formed on the -EC layer 3 having an uneven surface This is the remaining portion of the insulating layer formed at a low temperature that does not cause thermal deterioration.

(実施例) 次に従来例及び実施例を挙げて本発明を更に具体的に説
明する。
(Example) Next, the present invention will be described in more detail with reference to conventional examples and examples.

従来例1 第3図及び第4図示の装置を用いて金属イリジウム膜か
ら陽極酸化によりIrL膜を形成した。
Conventional Example 1 An IrL film was formed from a metal iridium film by anodic oxidation using the apparatus shown in FIGS. 3 and 4.

第3図において、31はITO付ガラス基板上に電子ビ
ーム法により成膜した400人の厚さの金属イリジウム
膜(膜厚は膜剥がれを起こすことなく作成する為に、通
常500Å以下で、300人乃至400人が好ましい)
であり、32は参照電極5EC133は白金電極、34
はO,OINの1(、SO,水溶液である。
In Fig. 3, 31 is a metal iridium film with a thickness of 400 Å formed on a glass substrate with ITO by the electron beam method (the film thickness is usually 500 Å or less, and 300 Å or less in order to create the film without peeling). (preferably 400 people)
32 is a reference electrode 5EC133 is a platinum electrode, 34
is O, OIN 1(, SO, aqueous solution.

以上の如き陽極酸化セルを、第4図に示す如きガラスセ
ルの駆動装置で駆動して金属イリジウム膜31を陽極酸
化してIrOx膜を形成する。45はポテンシオスタッ
ト、46はポテンシャルスィーパ−である。
The anodic oxidation cell as described above is driven by a glass cell driving device as shown in FIG. 4, and the metal iridium film 31 is anodized to form an IrOx film. 45 is a potentiostat, and 46 is a potential sweeper.

電位の振幅は下記第1表に示した様に、段階的に増加さ
せて速度0.  IV/sec、で掃引を行ないIrO
x膜3を作成した。
As shown in Table 1 below, the amplitude of the potential is increased stepwise until the speed is 0. IrO was swept at IV/sec.
x film 3 was created.

更に絶縁層としてTa、0.膜4を基板温度100℃、
蒸着速度1.5人/sec、で3,000人の厚みに蒸
着した。次に第2EC層5としてWO2膜を4.000
人、第2電極6として半透明Au膜を300人の厚みに
電子ビーム法により室温(40℃以下)で逐次蒸着して
得られるのが、第2図に示す従来例1の全固体EC素子
である。
Furthermore, as an insulating layer, Ta, 0. The film 4 was heated to a substrate temperature of 100°C.
The film was deposited to a thickness of 3,000 people at a deposition rate of 1.5 people/sec. Next, as the second EC layer 5, a WO2 film with a thickness of 4.000
The all-solid-state EC device of Conventional Example 1 shown in FIG. It is.

この素子に第一電極2を基準として、+1,5Vの直流
電圧を第一電極2と第二電極6との間に印加したところ
、250 m5ec、でΔ0D=0.43の濃度変化を
示した。
When a DC voltage of +1.5V was applied between the first electrode 2 and the second electrode 6 to this element with the first electrode 2 as a reference, a concentration change of Δ0D=0.43 was observed at 250 m5ec. .

上記EC素子のIr(1+膜は、100℃の熱が30分
間以上加わった為、膜の一部が還元されて金属的になる
という特性劣化が生じてしまい、素子としての応答速度
は十分ではなかった。
The Ir(1+ film of the above EC element) was exposed to heat at 100°C for more than 30 minutes, resulting in deterioration in characteristics such as part of the film being reduced and becoming metallic, resulting in insufficient response speed as an element. There wasn't.

従来例2 絶縁層を形成する際の基板温度を50℃とし、他は従来
例1と同様にして第2図に示すAEC素子を作成した。
Conventional Example 2 The AEC element shown in FIG. 2 was produced in the same manner as in Conventional Example 1 except that the substrate temperature was 50° C. when forming the insulating layer.

このEC素子に第一電極2を基準として、+1.5Vの
直流電圧を第一電極2と第二電極6との間に印加したと
ころ、250 m5ec、で△0D=0.49の濃度変
化を示した。
When a DC voltage of +1.5V was applied between the first electrode 2 and the second electrode 6 to this EC element with the first electrode 2 as a reference, a concentration change of Δ0D=0.49 occurred at 250 m5ec. Indicated.

又、絶縁層とIr(1+膜との界面を形成する際に基板
温度が低かった為、膜同士の密着力が弱く、且つイオン
の輸送が困難になり、素子としての応答速度は十分では
なかった。
In addition, because the substrate temperature was low when forming the interface between the insulating layer and the Ir(1+ film), the adhesion between the films was weak and transport of ions was difficult, resulting in insufficient response speed as an element. Ta.

実施例1 従来例1と同様に第1電極2上に第−EC層であるIr
Ox膜3を作成した。その上に、第1図に示す様に、I
rOx膜3との界面を形成する絶縁層4aとして、Ta
*Os膜4を基板温度120℃、蒸着速度1.5人/s
ec、の条件で1.5分間蒸着し、135人の厚みのT
a*Os膜4aを積層する。次に第2EC層5との界面
を形成する絶縁層4bを基板部属70℃、蒸着速度1.
5人/see、の条件で2,865人の厚みに蒸着し、
合計膜厚3.000人の絶縁層4を電子ビーム法により
積層し、その後は従来例1と同様にして本発明のEC素
子を作成した。
Example 1 Similar to Conventional Example 1, Ir as the -EC layer is formed on the first electrode 2.
Ox film 3 was created. On top of that, as shown in Figure 1, I
As the insulating layer 4a forming the interface with the rOx film 3, Ta
*Os film 4 was deposited at a substrate temperature of 120°C and a deposition rate of 1.5 people/s.
It was deposited for 1.5 minutes under the conditions of
An a*Os film 4a is stacked. Next, the insulating layer 4b forming the interface with the second EC layer 5 is deposited on the substrate at a temperature of 70°C and a deposition rate of 1.
Deposited to a thickness of 2,865 people under the conditions of 5 people/see,
An insulating layer 4 having a total thickness of 3,000 layers was laminated by an electron beam method, and then the same procedure as in Conventional Example 1 was carried out to produce an EC element of the present invention.

このEC素子に第一電極2を基準として、+1.5Vの
直流電圧を第一電極2と第二電極6との間に印加したと
ころ、250 o+sec、でΔ0D=0.65の濃度
変化を示し、応答速度が向上していた。
When a DC voltage of +1.5V was applied between the first electrode 2 and the second electrode 6 to this EC element with the first electrode 2 as a reference, a concentration change of Δ0D=0.65 was observed at 250 o+sec. , the response speed was improved.

実施例2 実施例1と同様にして、IrO+を膜3と界面を形成す
る絶縁層4aとして、Ta5ks膜を基板温度90℃で
1分間蒸着し、90人の厚みのTag’s膜を積層する
6次に第2EC層との界面を形成する絶縁層4bを基板
温度60℃で2,910人の厚みに蒸着し、合計膜厚3
,000人の絶縁層4を形成し、その後は実施例1と同
様にして本発明のEC素子を作成した。
Example 2 In the same manner as in Example 1, IrO+ is used as an insulating layer 4a forming an interface with the film 3, a Ta5ks film is deposited for 1 minute at a substrate temperature of 90°C, and a Tag's film with a thickness of 90 mm is laminated. 6 Next, an insulating layer 4b forming an interface with the second EC layer is deposited to a thickness of 2,910 layers at a substrate temperature of 60°C, resulting in a total film thickness of 3.
,000 insulating layer 4 was formed, and thereafter, the same procedure as in Example 1 was carried out to produce an EC element of the present invention.

このEC素子に第一電極2を基準として、+1.5Vの
直流電圧を第一電極2と第二電極6の間に印加したとこ
ろ、250 a+gec、で△0D=0.71の濃度変
化を示し、応答速度が向上していた。
When a DC voltage of +1.5V was applied between the first electrode 2 and the second electrode 6 to this EC element with the first electrode 2 as a reference, a concentration change of Δ0D=0.71 was observed at 250 a+gec. , the response speed was improved.

実施例3 実施例1と同様にして、IrOx膜3と界面を形成する
絶縁層4aとして、Ta*Os膜を基板温度100℃で
0.5分間蒸着し、45人の厚みのTaxes膜を積層
する0次に第2EC層との界面を形成する絶縁層4bを
基板温度50℃で2,955人の厚みに蒸着し、合計膜
厚3,000人の絶縁層4を形成し、その後は実施例1
と同様にして本発明のEC素子を作成した。
Example 3 In the same manner as in Example 1, a Ta*Os film was deposited for 0.5 minutes at a substrate temperature of 100°C as an insulating layer 4a forming an interface with the IrOx film 3, and a 45-layer Taxes film was laminated. Next, the insulating layer 4b that forms the interface with the second EC layer is deposited to a thickness of 2,955 layers at a substrate temperature of 50° C. to form an insulating layer 4 with a total thickness of 3,000 layers. Example 1
An EC element of the present invention was produced in the same manner as described above.

このEC素子に第一電極2を基準として、+1.5Vの
直流電圧を第一電極2と第二電極6の間に印加したとこ
ろ、250 m5ec、で△0D=0.78の濃度変化
を示し、応答速度が向上していた。
When a DC voltage of +1.5V was applied between the first electrode 2 and the second electrode 6 to this EC element with the first electrode 2 as a reference, a concentration change of Δ0D=0.78 was observed at 250 m5ec. , the response speed was improved.

(発明の効果)。(Effect of the invention).

以上説明した様に、絶縁層を形成する際に、最初は、高
い基板温度で、その後は低い温度で絶縁層を形成するこ
とによって、従来例よりも応答速度の速いEC素子を作
成することが出来た。
As explained above, when forming the insulating layer, by forming the insulating layer at a high substrate temperature first and then at a lower temperature, it is possible to create an EC element with faster response speed than conventional examples. done.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の製造方法により作成されたEC素子の
断面図であり、第2図は従来例の製造方法により作成さ
れたEC素子の断面図であり、第3図は陽極酸化に用い
るガラスセルを示し、第4図はガラスセルの駆動装置で
あり、第5図は掃弓波形である。 1:基板 2:第一電極 3:第−EC層(陽極側) 4:絶縁層 5:第二EC層(陰極側) 6:第二電極 31.41:金属イリジウム膜 32.42:参照電極(SEC) 33.43:対向電極(白金) 34:硫酸(H,SO,)水溶液 45:ポテンシオスタット 46:ボテンシオスイーバー 第 第2図
FIG. 1 is a cross-sectional view of an EC element manufactured by the manufacturing method of the present invention, FIG. 2 is a cross-sectional view of an EC element manufactured by a conventional manufacturing method, and FIG. 3 is a cross-sectional view of an EC element manufactured by a conventional manufacturing method. A glass cell is shown, FIG. 4 is a driving device for the glass cell, and FIG. 5 is a sweeping waveform. 1: Substrate 2: First electrode 3: -EC layer (anode side) 4: Insulating layer 5: Second EC layer (cathode side) 6: Second electrode 31.41: Metal iridium film 32.42: Reference electrode (SEC) 33.43: Counter electrode (platinum) 34: Sulfuric acid (H, SO,) aqueous solution 45: Potentiostat 46: Potentio siveber Fig. 2

Claims (3)

【特許請求の範囲】[Claims] (1)基板上の導電体膜よりなる第一電極と、陽極側着
色層である第一エレクトロクロミック層と、誘電体膜よ
りなるイオン良導体の電子絶縁層と、陰極側着色層であ
る第二エレクトロクロミック層と、導電体膜よりなる第
二電極とを順次積層するエレクトロクロミック素子の製
造方法において、上記絶縁層の積層を、上記第一エレク
トロクロミック層との界面を形成する際には高い基板温
度で、その後は低い基板温度で行うことを特徴とするエ
レクトロクロミック素子の製造方法。
(1) A first electrode made of a conductive film on a substrate, a first electrochromic layer that is a colored layer on the anode side, an electronic insulating layer that is a good ionic conductor made of a dielectric film, and a second colored layer on the cathode side. In a method for manufacturing an electrochromic device in which an electrochromic layer and a second electrode made of a conductive film are sequentially laminated, the lamination of the insulating layer is performed using a high substrate when forming an interface with the first electrochromic layer. 1. A method for manufacturing an electrochromic device, characterized in that the process is carried out at a low temperature and thereafter at a low substrate temperature.
(2)第一エレクトロクロミック層が陽極酸化イリジウ
ム膜である請求項1に記載のエレクトロクロミック素子
の製造方法。
(2) The method for manufacturing an electrochromic device according to claim 1, wherein the first electrochromic layer is an anodized iridium film.
(3)絶縁層が五酸化タンタル膜である請求項1に記載
のエレクトロクロミック素子の製造方法。
(3) The method for manufacturing an electrochromic device according to claim 1, wherein the insulating layer is a tantalum pentoxide film.
JP1256982A 1989-10-03 1989-10-03 Production of electrochromic element Pending JPH03119325A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1256982A JPH03119325A (en) 1989-10-03 1989-10-03 Production of electrochromic element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1256982A JPH03119325A (en) 1989-10-03 1989-10-03 Production of electrochromic element

Publications (1)

Publication Number Publication Date
JPH03119325A true JPH03119325A (en) 1991-05-21

Family

ID=17300081

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1256982A Pending JPH03119325A (en) 1989-10-03 1989-10-03 Production of electrochromic element

Country Status (1)

Country Link
JP (1) JPH03119325A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110764331A (en) * 2019-10-16 2020-02-07 中国科学院上海硅酸盐研究所 Ultrafast response and overcharge prevention electrochromic device and preparation method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110764331A (en) * 2019-10-16 2020-02-07 中国科学院上海硅酸盐研究所 Ultrafast response and overcharge prevention electrochromic device and preparation method thereof
CN110764331B (en) * 2019-10-16 2021-02-12 中国科学院上海硅酸盐研究所 Ultrafast response and overcharge prevention electrochromic device and preparation method thereof

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