JPH03115492U - - Google Patents
Info
- Publication number
- JPH03115492U JPH03115492U JP2463490U JP2463490U JPH03115492U JP H03115492 U JPH03115492 U JP H03115492U JP 2463490 U JP2463490 U JP 2463490U JP 2463490 U JP2463490 U JP 2463490U JP H03115492 U JPH03115492 U JP H03115492U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- unit
- output line
- line
- delay circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001934 delay Effects 0.000 claims 2
- 230000003111 delayed effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Headphones And Earphones (AREA)
Description
第１図は本考案のヘツドホン装置の一実施例の
構成を示すブロツク図、第２図は第１図の実施例
の動作を説明するタイミングチヤートである。
１……加算回路、２，７，２１，２２……ロー
パスフイルタ、３……電力増幅器、４，８……ス
イツチ、５……コネクタ、６……ユニツト、９…
…マイクロホン増幅器、１０……遅延回路、１１
……発振回路、１３……切り換え回路、１７……
本体、１８……入力線、１９……出力線。
FIG. 1 is a block diagram showing the configuration of an embodiment of the headphone device of the present invention, and FIG. 2 is a timing chart illustrating the operation of the embodiment of FIG. 1... Addition circuit, 2, 7, 21, 22... Low pass filter, 3... Power amplifier, 4, 8... Switch, 5... Connector, 6... Unit, 9...
...Microphone amplifier, 10...Delay circuit, 11
...Oscillation circuit, 13...Switching circuit, 17...
Main body, 18...input line, 19...output line.
Claims (1)
するユニツトと、 前記ユニツトに供給する信号を伝達する入力線
と、 前記ユニツトから出力される信号を伝達する出
力線と、 前記入力線と出力線とを、可聴周波数の２倍以
上の周波数で交互にオン、オフさせる切り換え回
路と、 前記出力線の信号を遅延する遅延回路と、 前記遅延回路により遅延された信号を、前記ユ
ニツトに供給する信号に加算して前記入力線に出
力する加算回路とを備えることを特徴とするヘツ
ドホン装置。[Claims for Utility Model Registration] A unit having the functions of both a speaker and a microphone, an input line for transmitting a signal to be supplied to the unit, an output line for transmitting a signal output from the unit, and the input line. a switching circuit that alternately turns on and off the output line and the output line at a frequency that is twice or more an audible frequency; a delay circuit that delays the signal of the output line; and a delay circuit that delays the signal of the output line, and sends the signal delayed by the delay circuit to the unit. 1. A headphone device comprising: an adder circuit that adds a signal to a supplied signal and outputs the resultant signal to the input line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2463490U JPH03115492U (en) | 1990-03-12 | 1990-03-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2463490U JPH03115492U (en) | 1990-03-12 | 1990-03-12 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03115492U true JPH03115492U (en) | 1991-11-28 |
Family
ID=31527596
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2463490U Pending JPH03115492U (en) | 1990-03-12 | 1990-03-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03115492U (en) |
-
1990
- 1990-03-12 JP JP2463490U patent/JPH03115492U/ja active Pending