JPH03115416U - - Google Patents

Info

Publication number
JPH03115416U
JPH03115416U JP2409290U JP2409290U JPH03115416U JP H03115416 U JPH03115416 U JP H03115416U JP 2409290 U JP2409290 U JP 2409290U JP 2409290 U JP2409290 U JP 2409290U JP H03115416 U JPH03115416 U JP H03115416U
Authority
JP
Japan
Prior art keywords
gain control
gain
input terminal
resistor
operational amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2409290U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2409290U priority Critical patent/JPH03115416U/ja
Publication of JPH03115416U publication Critical patent/JPH03115416U/ja
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路図である。 1……ゲインコントロール用抵抗器群、2……
フイードバツク抵抗器、3……ゲインコントロー
ラ、4……アナログスイツチ、5……演算増幅器
、6……信号入力端子、7……コモン入力端子、
8……信号出力端子、9……ゲインコントロール
入力端子、10……プラス電源入力端子、11…
…マイナス電源入力端子、12……ICケース。
FIG. 1 is a circuit diagram of an embodiment of the present invention. 1... Gain control resistor group, 2...
Feedback resistor, 3... Gain controller, 4... Analog switch, 5... Operational amplifier, 6... Signal input terminal, 7... Common input terminal,
8... Signal output terminal, 9... Gain control input terminal, 10... Plus power input terminal, 11...
...Minus power input terminal, 12...IC case.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 演算増幅器と、この演算増幅器の入力に接続さ
れたゲインコントロール用の抵抗器群と、抵抗器
群の内の各抵抗器を有効/無効にするアナログス
イツチと、アナログスイツチをコントロールする
ゲインコントローラと、前記増幅器のゲインを決
定するフイードバツク抵抗器と、ゲインコントロ
ーラに入力されるゲインコントロールのゲインコ
ントロール入力端子と、ゲインコントロール用の
抵抗器群に接続され、アナログ信号の入力をする
信号入力端子と、もう1つのアナログ信号を入力
するコモン入力端子と、増幅後のアナログ信号を
出力する信号出力端子とを含むことを特徴とする
演算増幅器用IC。
an operational amplifier, a group of gain control resistors connected to the input of the operational amplifier, an analog switch that enables/disables each resistor in the resistor group, and a gain controller that controls the analog switch; a feedback resistor that determines the gain of the amplifier; a gain control input terminal for gain control that is input to the gain controller; a signal input terminal that is connected to the gain control resistor group and inputs an analog signal; An operational amplifier IC characterized by comprising a common input terminal for inputting one analog signal and a signal output terminal for outputting an amplified analog signal.
JP2409290U 1990-03-09 1990-03-09 Pending JPH03115416U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2409290U JPH03115416U (en) 1990-03-09 1990-03-09

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2409290U JPH03115416U (en) 1990-03-09 1990-03-09

Publications (1)

Publication Number Publication Date
JPH03115416U true JPH03115416U (en) 1991-11-28

Family

ID=31527067

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2409290U Pending JPH03115416U (en) 1990-03-09 1990-03-09

Country Status (1)

Country Link
JP (1) JPH03115416U (en)

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